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1.
《Microelectronic Engineering》2007,84(5-8):822-824
Hydrogen silsesquioxane (HSQ) is a high-resolution negative-tone inorganic resist with an established resolution below 10 nm. Using 100 keV electron beam lithography, we report the achievement of isolated 6 nm wide lines in 20 nm thick HSQ layers on silicon substrates. We also achieved 10 nm lines and spaces in a 10 nm HSQ layer. This is the smallest pitch (20 nm) achieved to date using HSQ resist. Experiments in order to investigate the effect of KOH based developer on ultimate resolution have been also performed and resulted in 7 nm wide lines. These results, in combination with the good etching resistance of HSQ, prove the versatility of HSQ for nanolithography.  相似文献   

2.
《Solid-state electronics》2006,50(9-10):1618-1624
The effects of RF-Plasma hydrogenation and applied mechanical strain on the crystallization of silicon layers deposited on plastic substrates have been investigated where the maximum temperature remained below 170 °C for the entire process. The structural properties of the samples have been studied by optical, scanning-electron and transmission-electron microscopy where the nano-crystallinity of the silicon layers has been confirmed. The maximum average diameter of the silicon grains was 4.5 nm and occurred for an applied tensile strain of 4%. In addition, a thin-film transistor on a plastic substrate has been fabricated and found to possess an electron mobility of 2.4 cm2/V s.  相似文献   

3.
Micron length nanowires with varying widths were patterned in half-metallic La2/3Sr1/3MnO3 (LSMO) thin films of different thicknesses, using a thin negative-tone electron beam lithography (EBL) process. Patterns were realized in the high resolution hydrogen silsesquioxane (HSQ) inorganic resist and successfully transferred to the manganite via an energetic argon ion beam etching (IBE). We have obtained wires with widths down to 65 nm and length up to 4 μm that exhibit transport properties comparable with those of unpatterned thin films.  相似文献   

4.
In order to comparatively study the growth and characterization of silicon oxide films on Si-based substrates, top-cut solar grade silicon (SOG-Si) containing Si3N4 rods and SiC lumps were used as raw materials and respectively heated at 1773 K and 1873 K under Ar gas. The samples were investigated by Focus Ion Beam/Scanning Electron Microscope (FIB/SEM) and Energy Dispersive Spectroscopy (EDS). Results indicated that silicon oxides with different morphologies successfully grew on the substrates via various mechanisms. Passive oxidation was evident in the formation of a dense SiO2 surface layer on the base material at 1773 K, while active oxidation was evident in the formation of SiO2 with particle, rod, and nanowire-like morphologies, which was the re-oxidation product of SiO at 1873 K under the active-to-passive transition. Si, SiC, and Si3N4 have the similar oxidation tendency to form silicon oxides under either passive or active regimes.  相似文献   

5.
Flexible, plastic chemical sensors were fabricated using a thin polymer gate dielectric layer and polymer electrodes patterned via selective wetting directly on the surface of the organic semiconductor film. Low-voltage transistors based on DDFTTF with PEDOT:PSS electrodes had a mobility as high as 0.05 cm2/Vs with an on–off ratio of 1.2 × 104 on ITO/PET substrates. These devices demonstrated stable operation in water with sensor characteristics similar to those reported on rigid silicon substrates, with sub-ppm detection for cysteine and 2,4,6-trinitrobenzene (TNB).  相似文献   

6.
Hybrid light emitting diodes (HyLED) with a structure of FTO/ZnO/F8BT/MoO3/Au/Ag is fabricated and the influence of surface roughness of cathode (FTO/ZnO) is investigated. The roughness of FTO could be decreased from 9.2 nm to 2.2 nm using a mild polishing process. The ZnO film, deposited by spray pyrolysis, functions as an electron injection layer. The roughness of the FTO/ZnO surface is found also highly dependent on the ZnO thickness. For thin ZnO films (20 nm), polishing results in better efficacy and power efficiency of LED devices, with nearly a two times improvement. For thick ZnO films (210 nm), the overall FTO/ZnO roughness is almost independent of the FTO roughness, hence both polished and unpolished substrates exhibit identical performance. Increasing ZnO thickness generally improves the electron injection condition, leading to lower turn on voltage and higher current and power efficiencies. However, for too large ZnO thickness (210 nm) the ohmic loss across the film dominates and deteriorates the performance. While the polished substrates show less device sensitivity to ZnO thickness and better performance at thin ZnO layer, best performance is obtained for unpolished substrates with 110 nm ZnO thickness. Larger interface area of ZnO/F8BT and enhanced electric filed at sharp peaks/valleys could be the reason for better performance of devices with unpolished substrates.  相似文献   

7.
We demonstrate the growth of vertically aligned nanorod arrays of copper phthalocyanine (CuPc) using the oblique angle deposition technique in high vacuum. High density nanorods with diameters down to 20 nm have been achieved with either stationary or rotational substrates. X-ray diffraction reveals the polycrystalline nature of the CuPc nanorods. Photovoltaic cells have been fabricated by spin-coating [6,6]-phenyl-C61-butyric acid methyl ester (PCBM) onto the CuPc nanorod films to form the active region, and scanning electron micrographs show excellent infiltration of PCBM molecules into the gaps between the CuPc nanorods. A maximum power conversion efficiency of ηp = (1.8 ± 0.1)% under 1 sun AM 1.5G illumination has been achieved in a device with ~40 nm long CuPc nanorods deposited on a 20 nm thick flat CuPc film, approximately twice of that of optimized bilayer CuPc/PCBM devices.  相似文献   

8.
The formation of pyramidal structures by anisotropic etching of 〈1 0 0〉-oriented monocrystalline silicon wafer surfaces is an effective method to reduce reflection losses originating on the front side of conventional silicon solar cells and silicon-heterojunction (SHJ) solar cells. One of the most common methods of texturization used in the solar-cell industry is based on aqueous solutions of NaOH or KOH and isopropyl alcohol (IPA). However, IPA is toxic and relatively expensive, so efforts are being made to replace it. Among the potential alternatives, solutions based on Na2CO3 and Na2CO3/NaHCO3 mixtures have been proposed. In the present study, solutions of Na2CO3 and Na2CO3/NaHCO3 mixtures were prepared in order to form pyramidal structures on silicon wafer surfaces. It was not possible to obtain uniform and completely textured surfaces by using aqueous solutions consisting only of Na2CO3. NaHCO3 must be added in order to achieve uniform textured surfaces with low hemispherical reflectance suitable for SHJ solar-cell applications. Textured surfaces with good uniformity and low average hemispherical reflectance (15.4%) were prepared from 〈1 0 0〉 silicon substrates with relatively low etching times (25 min). Good surface passivation (lifetime >600 μs and implicit open-circuit voltage of 690±10 mV) on these p-type textured wafers were achieved.  相似文献   

9.
In this paper, silicon nanowires (SiNWs) was fabricated by a combination of metal-assisted chemical etching (MACEtch) and nanosphere lithography. We get the silicon nanowires with different specific surface area by changing the etching time. The microscopic structure of the silicon nanowires is observed by field emission scanning electron microscope (FESEM). The gas sensing performances of the SiNWs with different specific surface area have been systematically examined by measuring the resistance change towards the concentrations of NO2 in the range of 1–5 ppm at room temperature (RT, 300 K), the gas sensor composed of SiNWs showed perfect gas sensitive property and possessed a short response–recovery time. The main reason of these excellent attributes is quite likely that high specific surface area of the SiNWs, and NO2 sensing mechanism of the SiNWs was also further explained, which can be attributed to the oxygen in the air and detected NO2 extract electrons from the surface of the SiNWs, and the resistivity of SiNWs changed with the changing of space-charge layer under the of SiNWs surface.  相似文献   

10.
《Organic Electronics》2008,9(5):816-820
We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on silicon substrates and using organic thin films as the dielectric layers. These insulating thin films were produced by different methods, including spin-coating (polymethylmethacrylate), thermal evaporation (pentacene) and Langmuir–Blodgett deposition (cadmium arachidate). Gold nanoparticles, deposited at room temperature by chemical self-assembly, were used as charge storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A maximum memory window of 2.5 V was achieved by scanning the applied voltage of an Al/pentacene/Au nanoparticle/SiO2/p-Si structure between 9 and −9 V.  相似文献   

11.
We report on high-mobility top-gate organic field-effect transistors (OFETs) and complementary-like inverters fabricated with a solution-processed molecular bis(naphthalene diimide)-dithienopyrrole derivative as the channel semiconductor and a CYTOP/Al2O3 bilayer as the gate dielectric. The OFETs showed ambipolar behavior with average electron and hole mobility values of 1.2 and 0.01 cm2 V?1 s?1, respectively. Complementary-like inverters fabricated with two ambipolar OFETs showed hysteresis-free voltage transfer characteristics with negligible variations of switching threshold voltages and yielded very high DC gain values of more than 90 V/V (up to 122 V/V) at a supply voltage of 25 V.  相似文献   

12.
Tin dioxide (SnO2) ultralong nanobelts were fabricated on silicon substrate by metal catalyzed Chemical Vapor Deposition (CVD) approach. An optical bandgap of 3.66 eV was calculated by optical absorbance data. Three Raman active modes peaks were observed at 474.4, 633 and 774.4 cm−1. Room temperature photoluminescence (PL) exhibited an orange emission at 600 nm. A vapor–liquid–solid (VLS) process based growth mechanism for the formation of SnO2 nanobelts was proposed and discussed briefly. Electrical transport characteristics of nanobelts were studied in dark and under ultraviolet (UV) laser. The fabricated device exhibited high photo-response properties under UV light, indicating their potential application as photo-switches and UV detectors.  相似文献   

13.
14.
Thin films of alumina (Al2O3) were deposited over Si 〈1 0 0〉 substrates at room temperature at an oxygen gas pressure of 0.03 Pa and sputtering power of 60 W using DC reactive magnetron sputtering. The composition of the as-deposited film was analyzed by X-ray photoelectron spectroscopy and the O/Al atomic ratio was found to be 1.72. The films were then annealed in vacuum to 350, 550 and 750 °C and X-ray diffraction results revealed that both as-deposited and post deposition annealed films were amorphous. The surface morphology and topography of the films was studied using scanning electron microscopy and atomic force microscopy, respectively. A progressive decrease in the root mean square (RMS) roughness of the films from 1.53 nm to 0.7 nm was observed with increase in the annealing temperature. Al–Al2O3–Al thin film capacitors were then fabricated on p-type Si 〈1 0 0〉 substrate to study the effect of temperature and frequency on the dielectric property of the films and the results are discussed.  相似文献   

15.
In this work, we demonstrate the fabrication of silicon nanowires down to 22 nm wide using trilayer nanoimprint lithography and wet etching. Using the same template prepared by E-beam lithography (EBL), nanowires with top width of 22 nm and 75 nm are fabricated on boron-doped top silicon layer of SOI substrate. The two samples are tested in 250 ppm NO2 ambient for gas detection. The 22 nm wide one shows a much higher relative sensitivity than the 75 nm wide one. The simulation which calculates the carrier density by solving Poisson equation was carried out and the results well explain the sensitivity disparity between the two samples.  相似文献   

16.
Hydrophilic silicon (0.9 nm) and germanium (2.7 nm) quantum dots (QDs), synthesized utilizing micelles to control particle size, were coated with silica using liquid phase deposition. The use of dodecyltrimethylammonium bromide as a surfactant yielded uniform spheres (Si@SiO2=57 nm; Ge@SiO2=32 nm), which could then be arrayed in three dimensions using a vertical deposition method on quartz plates. The silica coated QDs were characterized by UV–visible spectroscopy, X-ray photoelectron spectroscopy, atomic force microscopy, and transmission electron microscopy. The thin films were characterized by UV–visible spectroscopy, scanning electron microscopy, and the measurement of a photocurrent.  相似文献   

17.
La1−xSrxMnO3 manganite films with x=0.15, 0.33 and 0.4 were deposited onto silicon substrates by pulsed laser deposition in an 80/20 Ar/O2 atmosphere at room temperature. After being deposited, the films were annealed at 900 °C in air in order to obtain the desired crystalline phase. Structural characterizations using X-Ray diffraction showed polycrystalline compounds having the predominant peaks corresponding to the perovskite structure. Morphological studies carried out by scanning electron microscopy revealed a very rough surface and led to deducing the nature of the growth process. Spectral ellipsometry was performed between 1.5 and 5 eV range at room temperature, showing electronic transitions near to 2.2 and 4.7 eV in a range of thicknesses between 94 and 107 nm.  相似文献   

18.
We have modeled and characterized scaled Metal–Al2O3–Nitride–Oxide–Silicon (MANOS) nonvolatile semiconductor memory (NVSM) devices. The MANOS NVSM transistors are fabricated with a high-K (KA = 9) blocking insulator of ALD deposited Al2O3 (8 nm), a LPCVD silicon nitride film (8 nm) for charge-storage, and a thermally grown tunneling oxide (2.2 nm). A low voltage program (+8 V, 30 μs) and erase (?8 V, 100 ms) provides an initial memory window of 2.7 V and a 1.4 V window at 10 years for an extracted nitride trap density of 6 × 1018 traps/cm3 eV. The devices show excellent endurance with no memory window degradation to 106 write/erase cycles. We have developed a pulse response model of write/erase operations for SONOS-type NVSMs. In this model, we consider the major charge transport mechanisms are band-to-band tunneling and/or trap-assisted tunneling. Electron injection from the inversion layer is treated as the dominant carrier injection for the write operation, while hole injection from the substrate and electron injection from the gate electrode are employed in the erase operation. Meanwhile, electron back tunneling is needed to explain the erase slope of the MANOS devices at low erase voltage operation. Using a numerical method, the pulse response of the threshold voltages is simulated in good agreement with experimental data. In addition, we apply this model to advanced commercial TANOS devices.  相似文献   

19.
We directly observed reductions in the effective minority-carrier lifetime (τeff) of n-type crystalline silicon (c-Si) substrates with silicon-nitride passivation films caused by potential-induced degradation (PID). We prepared PID-test samples by encapsulating the passivated substrates with standard photovoltaic-module encapsulation materials. After PID tests applying − 1000 V to the c-Si samples from the glass surface, the τeff was decreased, which probably pertains to Na introduced into the c-Si. After PID tests applying + 1000 V, the sample, on the other hand, showed a considerably rapid τeff reduction, probably associated with the surface polarization effect. We also performed recovery tests of predegraded samples, by applying a bias opposite to that used in a degradation test. The τeff of a sample predegraded by applying + 1000 V was rapidly completely recovered by applying − 1000 V, while those of predegraded by applying − 1000 V show only slight and insufficient τeff recovery.  相似文献   

20.
Self-assembled GaAs nanowires were grown by molecular beam epitaxy (MBE) on un-pretreated Si(111) substrates under different As4/Ga flux ratios (V/III ratios). It has been found that the fraction of vertical wires would be nearly 100% when the As4/Ga ratio arrives 90. The transmission electron microscopy (TEM) and micro-photoluminescence (PL) spectra results have indicated that the GaAs nanowires grown under a larger V/III ratio (90) have a pure ZB structure. Field-effect transistors (FET) based on single nanowire were fabricated with GaAs nanowires grown under the larger V/III ratio (90). The characteristics of the FET reveal a hole concentration of 3.919×1017 cm−3 and a hole mobility of 0.417 cm2 V−1s−1. Photodetectors based on single nanowire and multiple nanowires structure with a metal-semiconductor-metal (MSM) electrode configuration have been proposed and demonstrated. All the photodetectors operating at room temperature exhibit good photoconductive performance, excellent stability, reproducibility and superior peak responsivity (87.67 A/W under 5 V for single nanowire photodetector).  相似文献   

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