Reduction of power converter EMI emission using soft-switchingtechnique

Measurements of conducted and radiated electromagnetic interference (EMI) emission from hard-switched and soft-switched buck, boost, and flyback converters of similar power ratings are presented. Results indicate that EMI emission can be substantially reduced by using a soft-switching technique in power converters. Thus, the soft-switching technique provides a practical and useful solution to reduce EMI emission from switched-mode power circuits. A comparison of EMI emission on the three classes of converters is also included. The flyback converter is found to be the least EMC friendly among the converters tested     

Reduction of power supply EMI emission by switching frequencymodulation

Electromagnetic interference (EMI) emission is always of grave concern for power electronic circuit designers. Due to rapid switching of high current and high voltage, interference is a serious problem in switching power circuits. Here, the effect of frequency modulation on power supply EMI noise is investigated. Significant reduction of emission is possible with the proposed scheme     

低EMI/EMC辐射的开关转换器可减轻ADAS设计负担

本文介绍了一种带低 EMI/EMC 辐射的开关转换器——Silent Switcher 2 DC/DC转换器,以减轻 工程师在设计汽车ADAS系统时的负担.     

Research on periodic switching frequency modulation for conducted EMI suppressing in power converter

This paper is devoted to explore modulation techniques with deterministic profiles reducing the peak EMI in a power converter. In this paper, the effect of primary modulation parameters such as modulation profile, modulation index and modulation frequency on peak EMI suppression is numerically simulated and discussed while a fully integrated spread spectrum clock generator (SSCG) with triangular modulation is presented whose major advantages are good robustness, small size and low-power consumption. The proposed SSCG has been applied to a fly-back switching converter and the results of the experiment confirm the proposed circuit.     

混沌抑制开关变换器电磁干扰的研究

以电流型Boost开关变换器为研究对象,分析了变换器的混沌工作模式及其电磁兼容性,运用统计分析方法推导出混沌状态的电感电流纹波平均值及其功率谱计算公式.对混沌与周期工作模式的时域和频域特性进行对比分析,得出混沌工作模式可以改善开关变换器的电磁兼容性,但电感电流纹波相应增加,从而降低变换器的效率.仿真结果验证了理论分析.     

Conducted EMI evolution of power SiC MOSFET in a Buck converter after short-circuit aging tests

The electromagnetic compatibility (EMC) study is an indispensable step in the development cycle of power system modules. In power applications using normally off transistors, short-circuit mode can be recurrent during operation, especially when powering converters. In this paper, we present a study on the evolution of conducted interferences (in common and differential mode voltages) generated by a static converter after an aging test of silicon carbide (SiC) MOSFET transistors from the first generation of CREE subjected to repetitive short-circuit operations. This work presents an experimental investigation of the repetitive short-circuit aging effect of N Channel power SiC MOSFETs on the amplitude of resonances in the interference spectra after aging tests. Experimental results are presented and analyzed.     

EMI reduction in switched power converters using frequency Modulation techniques

Frequency-modulation techniques have been used to reduce electromagnetic interference (EMI) produced by the clock of digital systems working in the range of hundreds of megahertz. The working principle consists of modulating the original constant clock frequency in order to spread the energy of each single harmonic into a certain frequency band, thus reducing the peak amplitude of EMI at harmonic frequencies. Nowadays, the switching frequency of power converters has increased up to values that make interesting the application of such techniques to reduce EMI emissions due to switching of power circuits. This paper presents the theoretical principles of frequency modulation using deterministic profiles for the modulating function. It shows the effectiveness of such methods in terms of EMI reduction for different modulation profiles and other parameters. The method is compared with other methods using random modulation. Tests carried out on a buck converter are presented for experimental validation of the method. A short discussion on optimal modulation profiles and parameters is also included.     

电磁带隙结构的应用——PCB中电源接地层构造的EMI低减

在印制电路板的设计中,供电系阻抗谐振所引起的噪声和电磁干扰问题一直是设计人员关注的焦点.而电磁带隙结构(EBG)是一种由介质、金属或其混合体单元按周期性排列所构成的阵列结构,对特定频段内的电磁波呈现带阻特性.因此适当的EBG结构可以降低供电系阻抗、减少谐振峰的个数,从而有效地减轻供电系的电磁干扰问题.文中综合运用基于腔模模型的快速算法和分解元法计算了由两种不同介质材料组合构成的EBC结构对供电系阻抗特性的影响.旨在说明EBG对EMI低减的作用和贡献.     

应用左手材料实现PCB的EMI低减

在印刷电路板的设计中,供电系阻抗谐振引起的噪声和电磁干扰(EMI)问题一直是设计人员关注的焦点。左手特性材料(LHM),因为其具有独特的电磁特性,目前已成为研究的焦点。本文综合运用基于腔模模型的快速算法和分解元法进行计算机仿真,研究表明由左、右手材料组合构成的电磁带隙结构能够实现理想的EMI低减,具有更加优异的性能。     

A unity power factor converter using half-bridge boost topology

A single-phase high-efficiency near-unity power-factor (PF) half-bridge boost converter circuit, which has been proposed earlier by other researchers, is presented with detailed analysis. This converter is capable of operating under variable PF. However, the focus of this paper is in achieving unity PF operation only. The efficiency of this circuit is high because there is only one series semiconductor on-state voltage drop at any instant. The existence of an imbalance in the voltages of the two DC-link capacitors, which was noted before, is confirmed here. The cause for the imbalance is analyzed using appropriate models, and a control method to eliminate it is discussed in detail. Analysis and design considerations for the power circuit using the fixed-band hysteresis current control (HCC) technique are provided. The analytical results are verified through simulation using switched and averaged circuit models of the scheme and also through experimental work. At 90-V AC input and 300-W 300-V output, the experimental prototype demonstrates an efficiency of 96.23% and a PF of 0.998. This converter, with its relatively high DC-output voltage, is well suited for the 110-V utility supply system. A circuit modification for universal input voltage range operation is also suggested     

飞机直流母线变换器的输入电磁干扰滤波器设计

针对飞机直流270 V至直流28 V电源变换器的应用需求,分析了电源变换器输入端的传导及辐射电磁干扰源.通过对电源变换器的电磁干扰（electromagnetic interference,EMI）频谱进行分析,确定了滤波器的参数.为了抑制滤波器振荡,提出在差模电感两端并联电阻电感网络的方法,替代使用液态铝电容的传统方法,提升滤波器的可靠性.根据差模电感中电流直流分量远高于交流分量的特点,提出采用扁铜漆包线来实现绕组的方法,使差模电感的体积降低.根据锰锌铁氧体低频磁导率高,镍锌铁氧体高频磁导率稳定的特点,提出双磁芯共模电感的设计方法,实现共模电感宽频率和小体积.实测结果证明输入电磁干扰滤波器可使电源变换器符合GJB 151中CE102要求.     

Robust snubberless soft-switching power converter using SiC power MOSFETs and bespoke thermal design

A number of harsh-environment high-reliability applications are undergoing substantial electrification. The converters operating in such systems need to be designed to meet both stringent performance and reliability requirements. Semiconductor devices are central elements of power converters and key enablers of performance and reliability. This paper focuses on a DC–DC converter for novel avionic applications and considers both new semiconductor technologies and the application of design techniques to ensure, at the same time, that robustness is maximized and stress levels minimized. In this respect close attention is paid to the thermal management and an approach for the heatsink design aided by finite element modelling is shown.     

Analysis of power/ground-plane EMI decoupling performance using thepartial-element equivalent circuit technique

The design of printed circuit (PC) boards with decoupling capacitors has been the subject of debate and different opinions for many years. The design and electrical impact of the capacitors has been difficult to separate from all other electrical interactions occurring on a conventional PC board populated with integrated circuits. This work demonstrates how the partial-element equivalent circuit (PEEC) modeling technique can be used to accurately predict the performance of various decoupling design strategies. Computer modeling using the PEEC approach is very flexible due to the ease of mixing physical geometries with a large number of circuit elements. Also, the compute time for such practical mixed EM and circuit problems are relatively short. Using this technique, the usual iteration between a number of different designs of test boards can be avoided. We show that the change of the voltage across the PC board, or the voltage gradient, can be used as an effective tool for the improvement of the decoupling efficiency     

功率VDMOS的EMI分析

针对功率VDMOS器件在实际应用中的电磁干扰(EMI)问题,对国内两家公司两款高压VDMOS产品进行应用于LED驱动电源模块的整机EMI测试以及VDMOS样管的动态特性测试,提出了功率VDMOS的EMI噪声优化方案。分析结果表明:适当增大VDMOS的寄生栅电阻R_g,增大VDMOS的输入电容C_(iss)和米勒电容C_(gd)可改善VDMOS器件EMI性能,但这会增加VDMOS器件的开关损耗。因此,在器件设计时需根据实际应用折中考虑。     

新一代开关电源EMI滤波器的走势

问题的提出90年代以来,随着电子设备小型化和表面组装技术的发展,电子元器件向小型化、片式化、复合化、多功能和高性能化发展,各种表面组装元件已逐渐成为电子元件的主流产品。以上半导体大规模集成造成的负面影响,特别是网络化的迅速发展,直接导致了抗电磁干扰能力的迅速下降。据IBM公司的常规观察统计表明：严重威胁电子、电气设备安全可靠工作的起因中,88石％是来自电源中的电压瞬变和电磁脉冲。当前EMI（电磁干扰）滤波器仍然是抑制电磁干扰的有效手段之一。因此,目前摆在传统EMI滤波器面前的一个不可回避的问题是如何适应…     

Design of a boost power factor correction converter using optimization techniques

This paper presents an approach to continuous variable design optimization of a power electronics converter. The objective of the optimization approach is to minimize the total component cost. The methodology is illustrated with the design of a boost power factor correction front-end converter with an input electromagnetic interference filter. The system design variables are first identified. The relevant system responses and component costs are then expressed as a function of these design variables. Finally, by using mathematical optimization techniques, the design variable values that minimize the total system component cost are obtained, given practical constraints on these design variables and system responses.     

Essential-coupling-path models for non-contact EMI in switching power converters using lumped circuit elements

This paper proposes a simple lumped circuit modeling approach for describing noncontact EMI coupling mechanisms in switching power converters. The resulting model assumes a minimum number of noise sources and contains essential coupling paths that allow easy physical interpretations. Essentially, all capacitive couplings are represented by an equivalent noise voltage source and six coupling impedances, whereas all inductive couplings are represented by an equivalent noise current source and three coupling impedances. The resulting coupled noise appears as currents flowing into the terminals of the line-impedance-stabilization-network (LISN). The equivalent voltage source can be conveniently approximated as the switching-node-to-zero voltage, which is typically a rectangular pulse of a few hundred volts. The equivalent current source can be modeled as the current flowing around a loop containing the equivalent voltage source and parasitics such as winding capacitance of the power transformer, the snubber capacitance and connection inductances. Also, the coupling impedances can be estimated by making simplifying assumptions about the geometry of the components and tracks, or by direct measurements. Simulations and experiments verify how inductive and capacitive couplings through each path may produce substantial EMI measured by the LISN. Being based on a lumped circuit approach, the proposed model is easy to apply in practice for understanding, diagnosing and approximating EMI behaviors.     

应用EBG结构抑制电磁干扰的研究

电磁带隙结构(EBG)是一种周期性结构,具有明显的带阻特性。首先介绍了EBG结构的特点,通过理论分析计算和仿真,阐述了其禁带形成的原因,依据EBG结构所具有性质的特点,分析了该结构对表面电流的影响。并利用EBG结构带阻特性以及影响表面电流的特性,将其应用于抑制表面电流从而减小电磁干扰(EMI)。通过仿真建模实验、数据测量得到的结果,说明了将EBG结构应用于抑制电磁干扰的可行性。     

Reduction of EMI Susceptibility in CMOS Bandgap Reference Circuits

This paper presents a successful approach to increase the electromagnetic interference (EMI) immunity of CMOS bandgap reference circuits. Layout techniques along with some changes in the reference schematics lead to a robust electromagnetic immunity, preserving good overall performances. Measurement results confirm the low susceptibility of the proposed circuits. They exhibit only a few millivolts shift, for interfering signals of 1 Vpp in the frequency range of 1 MHz to 4 GHz, compared to the classical topologies that may reach more than 1 V. The circuits were fabricated in a 0.8-mum standard CMOS technology