浅谈波音AHM系统在东航B737机队引气系统中的应用

2014年中国东方航空及其子公司引入了波音飞机健康管理系统（AHM），以改进东航快速增长中的机队的维修和工程业务效率，本文就一些实际中的案例讲诉了波音AHM系统在东航B737机队引气系统中的应用。     

TD-LTE与WLAN共室内分布系统干扰分析

文章重点研究了在TD-LTE与WLAN的共室内分布系统建设时面临的邻频干扰问题。首先基于对WLAN设备的性能测试结果,通过理论方法对邻频干扰程度及可能的干扰解决方案进行了分析;然后通过实际的网络性能测试进一步验证了两系统共室内分布系统所面临的干扰,并确认了干扰解决方案的可行性。     

TPS6211x电源供应设计的实际考虑

TPS6211x dc／dc转换器是一种同步降压转换器·翼输入电压最高可达17V，输出电压范围为1．2-16V·输出电流高达1．5A。该器件可以高效地将两节锂离子电池、铅酸蓄电池或12V，15V系统电压降至5V、3．3V或者更低。图1为典型应用电路。     

西门子与空客合作开发混合动力推进系统

西门子股份公司和空中客车集团日前就合作开发混合动力推进系统签署长期合作协议。空客集团首席执行官托马斯·恩德斯(Tom Enders)与西门子股份公司首席执行官凯飒(Joe Kaeser)共同启动了航空电气化合作项目,以期在2020年前完成多样化的混合/电力推进系统的技术可行性论证。据悉两家公司将组建一个约由200人组成的合作开发团队,以继续保持欧洲在电动飞机领域创新与开发的领先地位。"电动飞机与混合动力飞机是当今行业面临的最大挑战之一,其目标是实     

空中交通发展面临的挑战与前景

本文主要探讨了飞机、机场和空中交通系统如何运用广阔空域的资源进行探索发展,同时也对空中交通发展所面临的挑战欲发展前景进行了分析。     

科学计算语言MATLAB和基于模型设计的Simulink平台助力系统开发进程

Jim Tung:如何将MATLAB写成的算法程序M文件直接生成嵌入式C代码;如何将Simulink仿真后的模型在硬件层次上进行在环验证与确认,是算法开发和系统开发人员共同面临的挑战.宋斌:两大核心平台及其90多种工具包和技术支持,将帮助中国工程师们轻松面对复杂的设计挑战.     

基于区块链的车辆到电网隐私保护方案

<正>车辆到电网（Vehicle to Grid,V2G）是智能电网中新兴的重要技术,它通过电动汽车和智能电网间的电力双向流动,增加了电网的灵活性和弹性。然而,由于大量的电力双向交互,V2G网络面临着严峻的隐私和安全挑战。针对上述挑战,本文提出了一种基于区块链的V2G隐私保护方案,通过构建双层区块链,实现电力交互信息的安全存储与共享;引入车辆假名机制实现电动汽车身份隐私保护;利用无证书聚合签密技术保证数据安全和密文的高效验证。安全性分析表明,本文所提方案具有公开验证性和不可伪造性。     

航电无线网络关键技术研究

在机载通信领域引入无线网络技术,能够有效提高机载网络的灵活性,减轻飞机的重量、功耗和维护成本,因此无线网络技术在机载领域拥有广阔的应用前景。文章首先介绍了航电网络的基本概念、传统架构和所面临的的问题;然后讨论了无线技术在安全关键的航空电子系统中的应用前景和所面临的挑战;接着研究了几种新型航电无线网络架构,并分析了航电无线网络在安全性和可靠性方面所面临的挑战;最后针对航电无线网络面临的安全性和可靠性问题,并提出了参考的解决方案。     

地基增强系统验证飞行性能分析

地基增强系统(GBAS)在通过差分定位提高卫星导航精度的基础上,增加了一系列完好性监视算法,提高系统完好性、可用性和连续性的指标,使机场覆盖空域范围内的配置相应机载设备的飞机获得达到I类精密进近(CAT-I)甚至更高标准的精密进近和着陆引导服务.GBAS验证飞行的目的是确认GBAS地面设备的信号稳定性和可靠性,同时验证...     

40 Gbit/s传输系统的OLP解决方案研究北大核心

为了寻找一种可行的针对40Gbit/s传输系统的OLP(光线路保护)解决方案,分析了40Gbit/s传输系统保护所面临的色散补偿、光功率补偿和系统OSNR(光信噪比)等方面的挑战,介绍了针对40Gbit/s传输系统的色散补偿方案,并对一个应用案例进行了分析说明,验证了该解决方案的可行性。     

一种新的消除VV算法载波相位模糊的方法

VV算法非常适用于PSK突发信号的载波同步。该算法需要对估计出来的相位进行后续处理,以消除由剩余频差引起的相位模糊、避免跳周现象。该文提出了一种新的相位后续处理方法,不但能够消除由剩余频差带来的相位模糊,而且对于由噪声引入的相位模糊仍然非常有效。相对于已有的方法,该方法大大降低了信号发生跳周的概率。计算机仿真表明,该方法具有良好的性能,适用于对MPSK突发信号的解调。     

16-APSK信号NDA鉴相新算法

针对幅相联合键控(16-APSK)信号,基于V&V算法提出了一种用于反馈环路的非数据辅助的(Non Data Aided,NDA)鉴相算法.该算法首先对信号进行星座分割,然后对各子星座上的点分别应用V&V算法,不同子星座鉴相的权重可通过参数设置方便地进行控制.同时,还提出了一种变体算法,针对每个子星座,将V&V算法对信号幅度的非线性运算直接替换为一个固定的幅度,使得对各子星座鉴相权重的控制更加简单,也更便于工程实现.经仿真验证,通过恰当控制算法参数,可以起到降低鉴相模糊度的作用,有利于简化16-APSK信号鉴相的解模糊处理.     

Low-Temperature Pulsed-PECVD ZnO Thin-Film Transistors

We report high-quality ZnO thin films deposited at low temperature (200°C) by pulsed plasma-enhanced chemical vapor deposition (pulsed PECVD). Process byproducts are purged by weak oxidants N₂O or CO₂ to minimize parasitic CVD deposition, resulting in high-refractive-index thin films. Pulsed-PECVD-deposited ZnO thin-film transistors were fabricated on plasma-enhanced atomic layer deposition (PEALD) Al₂O₃ dielectric and have a field-effect mobility of 15 cm²/V s, subthreshold slope of 370 mV/dec, threshold voltage of 6.6 V, and current on/off ratio of 10⁸. Thin-film transistors (TFTs) on thermal SiO₂ dielectric have a field-effect mobility of 7.5 cm²/V s and threshold voltage of 14 V. For these devices, performance may be limited by the interface between the ZnO and the dielectric.     

Megahertz-class printed high mobility organic thin-film transistors and inverters on plastic using attoliter-scale high-speed gravure-printed sub-5 μm gate electrodes

High performance organic thin-film transistors and inverters operating at MHz frequencies at 10 V are fabricated on plastic with high throughput (printing speed up to 1.0 m/s) using attoliter-scale high-speed gravure printing. The high performance of the devices is achieved using highly scaled gravure printed features (smaller than 5 μm) and optimizing a high mobility organic semiconductor for the short-channel gravure printed devices (>0.5 cm²/V s) to realize record performance levels.     

溅射法制备钇掺杂铟锌氧薄膜和器件特性研究王丹丹,王卿璞*,王汉斌,张锡健,武丽伟,李福杰,袁帅中国,济南,山东大学物理学院

室温下,采用射频磁控溅射法分别在钠钙玻璃和P型硅衬底上制备了不同厚度的钇掺杂铟锌氧薄膜。研究了薄膜的结构形貌和光学特性。以P型硅为栅极制备了底栅结构的YIZO薄膜晶体管,并研究了器件的输出和转移特性。研究发现,室温下制备的所有Y掺杂IZO薄膜均为非晶结构,YIZO薄膜晶体管均为n沟道耗尽型器件。有源层厚度为20nm的器件的开关电流比超过105,亚阈值摆幅为2.20 V/decade,阈值电压为-1.0V, 饱和迁移率为0.57 cm2/ V·s。     

Structural, electrical and magnetic characterizations of Ni/Cu/p-Si Schottky diodes prepared by liquid phase epitaxy

In this paper, we have investigated the structural, electrical and magnetic characterizations of Ni/Cu/p-Si Schottky diode prepared by liquid phase epitaxy (LPE). Current density-voltage (J-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) measurements were performed to determine the conduction mechanisms as well as extracting the important diode parameters. Rectifying properties were obtained, which definitely of the Schottky diode type. At low voltages, (0 < V ? 0.4 V), current density in the forward direction was found to obey the diode equation, while for higher voltages, (0.5 < V ? 1.5 V), conduction was dominated by a space-charge-limited conduction (SCLC) mechanism. Analysis of the experimental data under reverse bias suggests a transition from electrode-limited to a bulk-limited conduction process for lower and higher applied voltages, respectively. Diode parameters such as, the built-in potential, V_b, the carrier concentration, N, the width of the depletion layer, W, of the Ni/Cu/p-Si Schottky diode were obtained from the C-V measurements at high frequency (1 MHz). The capacitance-frequency measurements showed that the values of capacitance were highly frequency dependent at low frequency region but independent at high frequencies. The Ni/Cu/p-Si Schottky diode showed magnetic properties due to the effect of Ni in the heterostructure.     

Wi-Fi based broadband wireless access for users on the road

This paper considers the provision of broadband wireless access (BWA) for users on the road. A Wi-Fi based system, which utilises a three-tier network architecture, is suggested as a readily available way of achieving BWA for road vehicles. However, the use of this approach and technology still poses a number of specific challenges. We identify and examine in greater depth a number of the challenges, and propose possible solutions to overcome them.     

Bottom-contact organic field-effect transistors based on single-crystalline domains of 6,13-bis(triisopropylsilylethynyl) pentacene prepared by electrostatic spray deposition

Large crystalline domains (a few hundred micrometers in size) of 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene) were prepared by electrostatic spray deposition (ESD) and used as the active layers of bottom-contact organic field-effect transistors. The TIPS pentacene active layers were directly patterned via a shadow mask in the ESD process. The device, which had a 5-μm-long channel composed of a single-crystalline domain, exhibited a high field-effect mobility of more than 0.1 cm²/V s but resulted in a high threshold voltage of −17 V. The threshold voltage could be lowered to −6.4 V by reducing the thickness of the BC electrodes from 30 to 10 nm; this threshold voltage lowering was probably due to an improvement in the charge injection from the source electrode to the active layer.     

Hybrid CMOS thin-film devices based on solution-processed CdS n-TFTs and TIPS-Pentacene p-TFTs

Fabrication and characterization of integrated hybrid complementary metal oxide semiconductor devices (CMOS) using 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-PC) and cadmium sulfide (CdS) as the active layers deposited using solution based processes are demonstrated. The n- and p-type thin film transistors (TFTs), inverters, and NAND gate devices were fabricated using photolithography-based techniques. The hybrid CMOS technology demonstrated is compatible with large-area and mechanically flexible substrates given the low temperature processing (<100 °C) and scalable design. The integrated n- and p-type devices show saturation mobilities of 15 and 0.02 cm²/V s, respectively. The inverters exhibited a DC gain of ≈52 V/V with full rail-to-rail switching. The NAND logic gates switch rail-to-rail with a transition point of V_DD/2.     

A low voltage current mode CMOS integrated receiver front-end for GPS system

This paper presents a low voltage, 1.6 GHz integrated receiver front-end which is implemented by the standard 0.35 μm, 3M2P CMOS technology. The receiver consists of a transconductance low noise amplifier (G_m-LNA), a down conversion current mode mixer and a voltage-controlled oscillator using accumulation-mode MOS varactor (A-MOS VCO). A current mode mixer is used to reduce the supply voltage to 1 V. A specially designed G_m-LNA converts RF input voltage to RF input current for the current mode mixer. This could eliminate an unnecessary I–V, V–I conversion and reduce the non-linearity contribution. Moreover, a low voltage A-MOS VCO, with a good phase noise and wide tuning frequency range, is used to generate a required oscillating frequency for the receiver. The integrated receiver front-end has a measured power conversion gain of 11.4 dB, an input referred third-order intercept point (IIP₃) of 6.1 dBm, and a noise figure of 5.87 dB. The measured total power consumption is 40.9 mW with 1 V supply.