A High Gain,Noise Cancelling 2515-4900 MHz CMOS LNA for China Mobile 5G Communication Application

With the development of the times, people’s requirements for communication technology are becoming higher and higher. 4G communication technology has been unable to meet development needs, and 5G communication technology has emerged as the times require. This article proposes the design of a low-noise amplifier (LNA) that will be used in the 5G band of China Mobile Communications. A low noise amplifier for mobile 5G communication is designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. The LNA employs self-cascode devices in currentreuse configuration to enable lower supply voltage operation without compromising the gain. This design uses an active feedback amplifier to achieve input impedance matching, avoiding the introduction of resistive negative feedback to reduce gain. A common source (CS) amplifier is used as the input of the low noise amplifier. In order to achieve the low power consumption of LNA, current reuse technology is used to reduce power consumption. Noise cancellation techniques are used to eliminate noise. The simulation results in a maximum power gain of 22.783, the reverse isolation (S₁₂) less than -48.092 dB, noise figure (NF) less than 1.878 dB, minimum noise figure (NFmin)=1.203 dB, input return loss (S₁₁) and output return loss (S₂₂) are both less than -14.933 dB in the frequency range of 2515-4900 MHz. The proposed Ultra-wideband (UWB) LNA consumed 1.424 mW without buffer from a 1.2 V power supply.     

一种用于多标准接收机的宽带低噪声放大器

设计了一种应用于软件无线电接收机的300kHz～1.6GHz宽带低噪声放大器,适用于数字广播、数字电视和定位导航等系统.该放大器采用噪声抵消结构以降低输入匹配器件在输出端所产生的热噪声和闪烁噪声,能够同时实现输入阻抗匹配和噪声优化.对采用中芯国际(SMIC)0.18 μm RF CMOS工艺实现的芯片的测试结果表明,3dB带宽为300kHz～1.6GHz,最大增益S21为16.7dB,输入反射系数S11小于-7.4dB,最小噪声系数为2.3 dB,输入参考的1dB增益压缩点为-11.6dBm,功耗为14.4mW,芯片面积为0.49mm2.     

Compact and low power consumption K-band differential low-noise amplifier design using transformer feedback technique

A compact and low power consumption three-stage differential K-band low-noise amplifier (LNA) with a 10 dB differential mode gain at 25.8 GHz and a 3 dB bandwidth of 22.8-26.8 GHz by using a transformer feedback technique with standard 0.18 mum CMOS technology is presented. The minimum input and output return losses over a 3 dB bandwidth are 11 and 7 dB, respectively. Fully differential characterisations of the noise figure (NF) and the common mode rejection ratio (CMRR) are demonstrated. The obtained NF and CMRR are 4.84 dB and 23.3 dB at 25.8 GHz. The input 1 dB compression point and input third-order intercept point are 17.8 and 5 dBm, respectively. The overall power consumption is 25.6 mW. This three-stage differential LNA only occupies an area of 0.63 x 0.88 mm².     

A Technique for Differential Noise Figure Measurement of Differential LNAs

This paper presents an approach to measure the noise figure of a differential low-noise amplifier (LNA) based on familiar ldquocold-hotrdquo single-ended noise figure measurements. To demonstrate the usefulness of this approach, measurement results are presented for a wideband differential LNA designed to be used as the first stage of the receiver in the Square Kilometre Array radio telescope. The presented LNA achieves less than 0.41 dB of differential noise figure in the 700 MHz to 1.4 GHz band, differential S₁₁ <-13 dB, differential S₂₁ between 18 and 14 dB, single-ended output P1 dB of -8.2 dBm, and output IP3 of -1 dBm while consuming 81 mA from a 1.3-V supply. The approach of measuring the differential noise figure may be automated with one switch at the output of a standard noise source and one switch at the input to a standard noise figure analyzer or a noise figure meter, allowing for automated noise figure measurements of differential LNAs based on the differential pair topology.     

V-Shaped Monopole Antenna with Chichena Itzia Inspired Defected Ground Structure for UWB Applications

Due to rapid growth in wireless communication technology, higher bandwidth requirement for advance telecommunication systems, capable of operating on two or higher bands with higher channel capacities and minimum distortion losses is desired. In this paper, a compact Ultra-Wideband (UWB) V-shaped monopole antenna is presented. UWB response is achieved by modifying the ground plane with Chichen Itzia inspired rectangular staircase shape. The proposed V-shaped is designed by incorporating a rectangle, and an inverted isosceles triangle using FR4 substrate. The size of the antenna is 25 mm×26 mm×1.6 mm. The proposed V-shaped monopole antenna produces bandwidth response of 3 GHz Industrial, Scientific, and Medical (ISM), Worldwide Interoperability for Microwave Access (WiMAX), (IEEE 802.11/HIPERLAN band, 5G sub 6 GHz) which with an additional square cut amplified the bandwidth response up to 8 GHz ranging from 3.1 GHz to 10.6 GHz attaining UWB defined by Federal Communications Commission (FCC) with a maximum gain of 3.83 dB. The antenna is designed in Ansys HFSS. Results for key performance parameters of the antenna are presented. The measured results are in good agreement with the simulated results. Due to flat gain, uniform group delay, omni directional radiation pattern characteristics and well-matched impedance, the proposed antenna is suitable for WiMAX, ISM and heterogeneous wireless systems.     

Parasitic-aware robust concurrent dual-band matching network for a packaged LNA

A generalised form of a concurrent dual-band matching network has been proposed for a packaged CMOS low noise amplifier (LNA). To eliminate the detrimental effects of component non-idealities on matching performance, a modified set of design equations has been developed. The robustness of the proposed network has been demonstrated at the GSM900 and DCS1800 bands. Incorporating this network, an LNA designed in a 0.18 mum CMOS process provides S ₁₁ of -33 and -30-dB, gain of 16.54 and 11.03-dB and noise figure of 1.35 and 2.37-dB, respectively, at 900-MHz and 1.7-GHz. The LNA draws a current of 2-mA from 1.8-V supply.     

低频、低功耗CMOS LNA的设计优化技术

分析了具有源级退化电感的CMOS共源共栅结构电路在低频、低功耗LNA设计中存在的缺陷,为满足低频、低功耗设计的要求,现广泛采用在该电路结构基础上再并联栅极电容的结构.今按照噪声系数的定义严格推导了该结构电路的噪声参数表达式,并基于推导的公式分析了该结构在CMOS低频、低功耗LNA设计中的重要应用.最后实现了一个基于0.18μm CMOS工艺的ISM频段应用的433 MHz LNA的设计,运用Agilent公司的设计仿真软件ADS进行仿真,整个LNA的设计过程及ADS仿真结果与理论分析一致.     

A new low-cost RF built-in self-test measurement for system-on-chip transceivers

This paper presents a new RF built-in self-test (BIST) measurement and a new automatic-performance-compensation network for a system-on-chip (SoC) transceiver. We built a 5-GHz low noise amplifier (LNA) with an on-chip BIST circuit using 0.18-/spl mu/m SiGe technology. The BIST-measurement circuit contains a test amplifier and RF peak detectors. The complete measurement setup contains an LNA with a BIST circuit, an external RF source, RF relays, 50-/spl Omega/ load impedance, and a dc voltmeter. The proposed BIST circuit measures input impedance, gain, noise figure, input return loss, and output signal-to-noise ratio of the LNA. The test technique utilizes the output dc-voltage measurements, and these measured values are translated to the LNA specifications such as the gain through the developed equations. The performance of the LNA was improved by using the new automatic compensation network (ACN) that adjusts the performance of the LNA with the processor in the SoC transceiver.     

Synthesis of ultra-wideband bandpass filter employing parallel-coupled stepped-impedance resonators

To design an ultra-wideband (UWB) bandpass filter with the fractional bandwidth (FBW) up to 110% (3.1%10.6%GHz), a new filter prototype consisting of multi-stage parallel-coupled stepped-impedance resonators (SIRs) is synthesised based on the transmission-line theory rather than the conventional multi-mode property. Asymmetrical SIRs are employed instead of the conventional symmetrical/quasi-symmetrical ones, so that an extra degree of freedom is introduced in circuit parameter selection. As a result, the minimum dimension of the coupling gaps between the adjacent SIRs is successfully enlarged to be more than 0.1%mm, which alleviates the requirement on fabrication precision. A simple equivalent circuit for this filter prototype is represented in the form of distributed parameters and the corresponding Chebyshev filtering function is derived as well. The relation between the number of poles in passband, N _p, and the stage of the filter, n, is summarised to be N _p=3n+2. To validate the newly derived synthesis theory, a one-stage UWB filter is first synthesised to compare with the previously published results obtained by the electromagnetic (EM) simulator. Furthermore, a two-stage filter is synthesised to successfully meet the Federal Communications Commission (FCC)+s indoor/outdoor spectrum specifications. The fabricated UWB filter exhibits a compact size of 26.58+mm in total length, low insertion loss (0.9+dB at 6.85+GHz), flat group delay (0.5+0.1+ns), good stopband characteristics (+S21+++40+dB at 1+2+GHz) and steep skirt property (+28+dB/GHz) as well. It should be noted that the proposed filter prototype can be also used to realise aUWB filter with an FBW even greater than 110+.     

A microwave chaos generator with a flat envelope of the power spectrum in the range of 3–8 GHz

A promising type of ultrawideband (UWB) signals for communications and radar techniques operating in an unlicensed frequency range of 3.1–10.6 GHz, which has been actively developed in recent years, is offered by chaotic oscillations. We have designed and studied a chaotic oscillator with a uniform distribution of spectral power density in the range of 3–8 GHz. The possibility of using these oscillators in multiband UWB communication systems and noise generators for radio-engineering measurements is discussed.     

Radio-frequency front-end for 5 GHz wireless local area network transceivers

A transceiver front-end for 5 GHz wireless local area network applications has been designed and implemented in a low-cost 46 GHz f_r pure-silicon bipolar technology. The transceiver front-end adopts a superheterodyne sliding-IF architecture and consists of a down-converter, an up-converter and an LO frequency synthesiser. By exploiting a 1 bit variable-gain low-noise amplifier, the down-converter is able to provide an excellent noise figure of 4 dB while ensuring an input 1 dB compression point of 210 dBm with a current consumption of 25 mA from a 3 V supply voltage. The transmitter front-end is implemented by means of a current-reuse variable-gain up-converter. The circuit provides an output 1 dB compression point of 5.3 dBm although consuming only 45 mA from a 3 V supply voltage. Moreover, a linear-in-dB gain control characteristic is achieved over a 35 dB dynamic range. The LO frequency synthesiser is implemented by means of an integer-N phase-locked loop. It features a phase noise of 2117 dBc/Hz at 1 MHz offset from the centre frequency of 4.1 GHz and exhibits a tuning range of 1.2 GHz, from 3.47 to 4.65 GHz. The LO frequency synthesiser draws 20 mA from a 3 V supply voltage.     

The design of an RF monolithic CMOS down‐converter

Abstract

The circuitry was constructed by standard commercial 0.35 μm CMOS fabrication processes and consists of a low noise amplifier (LNA) and a low voltage mixer that down‐converts S band RF signals into the IF band. The LNA is designed with the consideration of non‐quasi‐static channel resistance to accomplish the input matching both for gain and noise. A single‐ended Gilbert cell mixer is designed with LC tanks in order to achieve a low voltage scheme. Then the inter‐stage matching between the LNA and the mixer was accomplished by using a single integrated capacitor to save chip area.     

Super Compact UWB Monopole Antenna for Small IoT Devices

This article introduces a novel, ultrawideband (UWB) planar monopole antenna printed on Roger RT/5880 substrate in a compact size for small Internet of Things (IoT) applications. The total electrical dimensions of the proposed compact UWB antenna are 0.19 λ_o × 0.215 λ_o × 0.0196 λ_o with the overall physical sizes of 15 mm × 17 mm × 1.548 mm at the lower resonance frequency of 3.8 GHz. The planar monopole antenna is fed through the linearly tapered microstrip line on a partially structured ground plane to achieve optimum impedance matching for UWB operation. The proposed compact UWB antenna has an operation bandwidth of 9.53 GHz from 3.026 GHz up to 12.556 GHz at −10 dB return loss with a fractional bandwidth (FBW) of about 122%. The numerically computed and experimentally measured results agree well in between. A detailed time-domain analysis is additionally accomplished to verify the radiation efficiency of the proposed antenna design for the ultra-wideband signal propagation. The fabricated prototype of a compact UWB antenna exhibits an omnidirectional radiation pattern with the low peak measured gain required of 2.55 dBi at 10 GHz and promising radiation efficiency of 90%. The proposed compact planar antenna has technical potential to be utilized in UWB and IoT applications.     

Mesa and planar SiGe-HBTs on MBE-wafers

SiGe-HBTs have the potential for outstanding analog and digital or mixed-signal high frequency circuits widely based on standard Si technology. Here we review on MBE grown transistors and circuits. Processes and results of a research-like SiGe HBT and two possible production relevant HBT versions are presented. The high frequency results with f_max and f_T up to 120 GHz and a minimum noise figure of 0.9 dB at 10 GHz demonstrate the advantage of using MBE samples with steep and high base doping and high germanium contents. A comparison to the concept of reported low doped, low germanium and triangular profiled SiGe base layers, realized by UHV-CVD, is given. In addition, some circuit demonstrators of SiGe-ICs will be presented.     

An HTS 20-Pole Microstrip Filter for GSM-1800 Base Stations

In order to resolve the problems that the Chinese mobile communication was facing (high dropped call rate, not so good voice quality, etc.), we developed a 20-pole high-temperature superconductor thin-film microstrip filter with steep band edges. This filter which had a quasi-elliptic type frequency response was designed for GSM-1800 base station receiver system. Its frequency ranged from 1711 MHz to 1789 MHz. It was fabricated using double-sided YBCO thin films on LaAlO₃ substrate. The substrate size was 0.52 mm × 21 mm × 40 mm. Experiments were performed on a Stirling cooler at a temperature of 60 K. The measured insertion loss in the passband is below 0.35 dB, return loss is bigger than 13.5 dB, and the steepness of the band-edge is up to 18 dB/MHz. Then we assembled it with an LNA (low noise amplifier) into a vacuum chamber to get a base station receiver front end and measured it. Its measured gain is 22.5 dB, and noise figure is below 0.6 dB in the passband which is very important to improve the sensitivity of the base station system.     

A Novel Compact Highly Isolated UWB MIMO Antenna with WLAN Notch

This paper presents a compact Multiple Input Multiple Output (MIMO) antenna with WLAN band notch for Ultra-Wideband (UWB) applications. The antenna is designed on 0.8 mm thick low-cost FR-4 substrate having a compact size of 22 mm × 30 mm. The proposed antenna comprises of two monopole patches on the top layer of substrate while having a shared ground on its bottom layer. The mutual coupling between adjacent patches has been reduced by using a novel stub with shared ground structure. The stub consists of complementary rectangular slots that disturb the surface current direction and thus result in reducing mutual coupling between two ports. A slot is etched in the radiating patch for WLAN band notch. The slot is used to suppress frequencies ranging from 5.1 to 5.9 GHz. The results show that the proposed antenna has a very good impedance bandwidth of |S11| < −10 dB within the frequency band from 3.1–14 GHz. A low mutual coupling of less than −23 dB is achieved within the entire UWB band. Furthermore, the antenna has a peak gain of 5.8 dB, low ECC < 0.002 and high Diversity Gain (DG > 9.98).     

An ultra low cost and miniature 950–2050 MHz GaAs MMIC downconverter‐I: Design approach and simulation

Abstract

A miniature ultra low cost 950–2050 MHz GaAs MMIC downconverter has been designed for satellite TV application using a 1‐μm gate‐length, ion‐implanted GaAs MESFET foundry process. To accurately predict circuit performances, both linear and nonlinear equivalent circuit models have been developed to characterize the RF and dc behaviors of device. Modeled simulation results show correspondence with the experimental data. This monolithic downconverter is comprised of an RF LNA, a dual‐gate MESFET mixer, an IF variable gain amplifier, and a varactor tuned oscillator. The primary design specifications are (1) 50‐dB conversion gain, (2) 4‐dB noise figure, (3) more than 40‐dB gain controllable range, and (4) 50‐dBc third‐order intermodulation distortion. The chip size is 1.4 × 1.5 × 0.18 mm³. It is encapsulated in a standard low cost plastic package. Moreover, this downconverter IC is promising for miniaturization and cost‐reduction of a DBS receiver. The detailed measured characteristics will be presented in part‐II of this paper.     

Multilayer bandstop filter for ultra wideband systems

A multilayer broadside-coupled microstrip-slot-microstrip structure is used to design a bandstop filter with a wide passband for ultra wideband (UWB) applications. The design procedure for the proposed filter is based on the conformal mapping technique and the even- and odd-mode analysis. The theoretical analysis indicates that value of the coupling factor between the top and bottom layers of the structure can be used to control the width of the stopband, whereas centre of that band can be controlled by the length of the coupled structure. To limit the passband of the proposed bandstop filter to 3.1 ?10.6 GHz, which is the specified bandwidth for UWB systems, a broadside-coupled bandpass filter is integrated with the proposed device. The simulated and measured results show that the proposed device achieve ,0.5 dB insertion loss across most of the passband and .20 dB insertion loss at the stopband. The device also shows a flat group delay across the passband with ,0.15 ns peak-to-peak variation. Hence, it is a suitable choice for the UWB systems that require a distortionless operation.     

Ultra-wideband SAW correlator

A surface acoustic wave (SAW) correlator that satisfies FCC bandwidth requirements for ultra-wideband (UWB) operation has been built and tested. The correlator operates within the 3.1 to 10.6 GHz bandwidth region and uses bi-phase shift keying (BPSK) modulation to achieve a spreading of the main lobe to a 25% bandwidth. This device is capable of spreading or de-spreading a UWB signal directly to or from base-band to microwave frequencies.     

Direct conversion RF front-end with a low-power consumption technique for 2.4 GHz ISM band

The implementation and performance measurements of RF front-end are presented. The low-power RF front-end designed in TSMC 0.18 mm process for 2.4 GHz ISM band direct conversion is presented. The proposed RF front-end is comprised of the folded mixer, fully differential low-noise amplifier (LNA) and interstage matching network. Gilbert-cell mixers using the folded technique and current reused LNA are designed for low power consumption. The folded mixers are implemented by using PMOS devices in the switching stage of mixers with a resonating inductor for low flicker noise. The proposed RF front-end consumes 7.2 mW from the 1.2 V supply and a conversion gain of 23 dB is achieved. The third-order intercept point (IIP3) is 210.5 dBm, and the proposed RF front-end has good linearity. By using PMOS devices and the folded technique, low flicker noise of 10 dB at 10 kHz is achieved, and thus the proposed RF front-end can be used in the direct conversion receiver for narrow bandwidth.