Relationship between texture and electromigration lifetime in sputtered AI-1% Si thin films

The relationship among the grain structure, texture, and electromigration lifetime of four Al-1% silicon metallizations produced under similar sputtering conditions was explored. The grain sizes and distributions were similar and the grain structure was near-bamboo for all metallizations. All metallizations exhibited a near-(111) fiber texture, as determined by the pole figure technique. Differences in electromigration behavior were noted. Three of the metallizations exhibited a bimodal failure distribution while the fourth was monomodal and had the longest electromigration lifetime. The electromigration lifetime was directly related to the strength of the (111) fiber texture in the metallization as anticipated. However, whereas the grain size distribution has an effect on the electromigration lifetime when metallization lines are several grains wide, the electromigration lifetime of these near-bamboo metallizations appeared independent of the grain structure. It was also observed that a number of failures occurred in the 8 μm interconnect supplying the 5 μm wide test lines. This apparently reflects an increased susceptibility of the wider interconnect lines to electromigration damage.     

Microstructure and reliability of copper interconnects

The effects of texture and grain structure on the electromigration lifetime of Cu interconnects are reported. Using different seed layers, (111)- and (200)-textured CVD Cu films with similar grain size distributions are obtained. The electromigration lifetime of (111) CVD Cu is about four times longer than that of (200) CVD Cu. For Damascene CVD Cu interconnects, the electromigration lifetime degrades for linewidths in the deep submicron range because the grains are confined as a result of conformal deposition in narrow trenches. In contrast, electroplated Cu has relatively larger grains in Damascene structure, resulting in longer electromigration lifetime than CVD Cu and no degradation for linewidths in the deep submicron range     

Copper metallizations for integrated circuits: tem analysis and electrical characterization

Copper thin films have been deposited by means of three different techniques. Transmission electron microscopy analysis and electrical characterization revealed that the three types of film had different average grain size and resistivity. The two different contributions to the total resistivity, due to the scattering at the grain boundaries and at the intragranular defects, have been separated by using the Mayadas-Shatzkes theory. Microstructural analysis, electrical characterization, noise measurements, and lifetime tests have been performed in order to identify the deposition technique which leads to the most reliable interconnection lines.     

Lateral interface effect on pulsed DC electromigration analysis

DC and Pulsed DC Electromigration tests at 1Hz and lOkHz have been performed on two single level Al-0.5%Cu metallizations. The Black's parameters have been analysed with a great confidence level using a statistical global approach. The results are in agreement with the Average Current Model at 10kHz and with the On-Time Model at 1Hz considering that thermal effects not only affect the current density exponent n, but also the duty cycle accelerating factor m. The extracted activation energies reflect the same diffusion mechanisms for the two metallizations. Microscopic observations showed huge metal accumulations for each structure and emphasized the influence of the resist stripping stage on the electromigration behaviour of the samples.     

Structure and properties of Al-1%Si thin films on Si as a function of gas impurities during DC magnetron-sputtered deposition

Thin films of Al-l%Si were sputter deposited on Si under a variety of pressures of atmospheric impurity gases. The effect of the impurity gases (oxygen, nitrogen, and water), and deposition temperature (15° and 300° C), on the microstructure and properties of the aluminum thin films were studied. The gas pressures introduced during deposition varied from 5 × 10^s−6 Torr (6.7 × 10^s−4 Pa) to 1 × 10^s-10 Torr (1 × 10^s−8 Pa). The thin films were investigated by transmission electron microscopy and were found to have a columnar microstructure with an even distribution of silicon precipitates. Both the grain size and silicon precipitate size increased at the higher deposition temperature. A smaller grain size was found in samples that were deposited under the higher impurity gas pressures tested. The specular reflectance of the films was found to be dependent upon the amount of impurity gases present during deposition, the greater the partial pressure the greater the surface roughness. This study also investigated the possibility of using a Resistivity Ratio (RR) measurement to evaluate the grain size of the Al thin films. It has been previously observed that a small Al grain size has poor electromigration resistance. This study found that the correlation between Al grain size and RR values was good indicating that RR tests may be used as a quick, non-destructive measure of film quality.     

The microstructure,mechanical stress,texture, and electromigration behavior of Al-Pd alloys

As the minimum feature size of interconnect lines decreases below 0.5 urn, the need to control the line microstructure becomes increasingly important. The alloy content, deposition process, fabrication method, and thermal history all determine the microstructure of an interconnect, which, in turn, affects its performance and reliability. The motivation for this work was to characterize the microstructure of various sputtered Al-Pd alloys (Al-0.3wt.%Pd, Al-2Cu-0.3Pd, and Al-0.3Nb-0.3Pd) vs sputtered Al-Cu control samples (Al-0.5Cu and Al-2Cu) and to assess the role of grain size, mechanical stress, and crystallographic texture on the electromigration behavior of submicrometer wide lines. The grain size, mechanical stress, and texture of blanket films were measured as a function of annealing. The as-deposited film stress was tensile and followed a similar stress history on heating for all of the films; on cooling, however, significant differences were observed between the Al-Pd and Al-Cu films in the shape of their stress-temperature-curves. A strong (111) crystallographic texture was typically found for Al-Cu films deposited on SiO₂. A stronger (111) texture resulted when Al-Cu was deposited on 25 nm titanium. Al-0.3Pd films, however, exhibited either a weak (111) or (220) texture when deposited on SiO₂, which reverted to a strong (111) texture when deposited on 25 nm titanium. The electromigration lifetimes of passivated, ≈0.7 μm wide lines at 250°C and 2.5 × 10⁶ A/cm² for both single and multi-level samples (separated with W studs) are reported. The electromigration behavior of Al-0.3Pd was found to be less dependent on film microstructure than on the annealing atmosphere used, i.e. forming gas (90% N₂-10%H₂) annealed Al-0.3Pd films were superior to all of the alloys investigated, while annealing in only N₂ resulted in poor lifetimes.     

Investigation of the influence of thermal treatment on interconnect-barrier interfaces in copper metallization systems

In this paper, we present recent results dealing with the influence of a high temperature anneal on the Cu–Ta interface in copper metallization systems. The electromigration lifetime data show a strong dependency of the electromigration robustness on the temperature budget. A bimodal behavior was observed after annealing the metallization at temperatures of 470 °C and above for more than 10 h. Surprisingly the high temperature anneal produces a late failure mode in electromigration lifetime tests resulting in a 10 times higher MTTF. To understand the influence of temperature pretreatment on electromigration behavior, TEM and SIMS have been performed on untreated samples (as fabricated) and on samples stored at 500 °C for 10 h. The TEM investigation shows no significant change in Cu grain size due to the high temperature. The Tof-SIMS investigations show that Ta diffuses into the Cu interconnect at the high temperature. A diffusion length for Ta of about 150 nm was observed for samples stored at 500 °C for 10 h. This effect has a strong impact on the results of the electromigration tests, done on lines after high temperature anneal.     

Electromigration and failure in electronics: An introduction

Some fundamental aspects of electromigration phenomena as they have been studied in "bulk" metallic conductors are reviewed. In an electric field atoms are subjected to a force due to the field, and to a force which results from the motion of electrical carriers, electrons, or holes. In bulk samples, and at high temperatures, these forces cause the displacement of atoms by a lattice mechanism which is also responsible for the diffusion of atoms in a concentration gradient. In thin films, electromigration has been found to occur at lower temperatures (and higher current densities) by a grain boundary diffusion mechanism. Electromigration may cause failures at material discontinuities, such as found at terminals, at temperature gradients, or at structural inhomogeneities. The process of crack formation, as observed in aluminum thin films, is described. Failure times are a function of the activation energy for diffusion and of exponents of the current density which vary for different failure modes. The effects of film purity, orientation, grain size, glass overcoat, and solute additions on lifetime are reviewed. Practical guidelines for the design of thin-film interconnections, and for the interpretation of accelerated test data are given.     

ULSI中Cu互连线的显微结构及可靠性

观察了ULSI中大马士革结构的Cu互连线的晶粒生长和晶体学取向.分析了线宽及退火对Cu互连线显微结构及电徙动的影响.Cu互连线的晶粒尺寸随着线宽的变窄而减小.与平坦Cu膜相比,Cu互连线形成微小的晶粒和较弱的 (111) 织构.300℃、30min退火促使Cu互连线的晶粒长大、(111) 织构发展,从而提高了Cu互连线抗电徙动的能力.结果表明,Cu的扩散涉及晶界扩散与界面扩散,而对于较窄线宽的Cu互连线,界面扩散成为Cu互连线电徙动失效的主要扩散途径.     

Monte Carlo simulation for improving electromigration lifetime by balancing temperature and structural gradients

It has been established that the prime cause for electromigration damage in metallisation lines is the ionic flux divergence, which is mainly associated with temperature and microstructural gradients along the lines. Monte Carlo simulation for electromigration failure has been performed using a model including the above effects. The median time to failure is found to be increased about 100% by employing an imposed grain size distribution to balance the influence of temperature variations. This work demonstrates the possibility and importance of film microstructural control in the presence of a temperature gradient for metallisation reliability improvement.     

Low frequency electromigration noise and film microstructure in Al/Si stripes: Electrical measurements and TEM analysis

Low frequency (l/f^γ) noise, generated by current densities at which electromigration occurs, and the temperature coefficient of resistance between 40 and 100°C were measured on Al/Si (1%) test patterns. The samples had different microstructures, obtained by sputtering the films onto substrates held at five different temperatures. The microscopic features of the samples (average grain dimension) were analyzed by means of transmission electron microscopy. It was found that, at a given frequency, the noise power spectral density of the voltage fluctuations is a decreasing function of the average grain dimension. This fact agrees with the hypothesis that low frequency electromigration noise is not a bulk effect, but originates mainly at grain boundaries.     

Thermal analysis of electromigration test structures

Analytical expressions are derived for estimating the temperature profile along a straight-line resistor test structure due to the joule heating generated by a high current-density stress, such as is used in accelerated stress tests to characterize metallizations for electromigration. It is shown how an improved estimate of the mean metallization stress temperature may be made and how the thickness and thermal conductivity of the underlying electrical insulator affect the temperature profile of the metallization. Recommendations for the design of electromigration test structures are developed that will promote reduced temperature gradients in the metallization during stress testing and improved reproducibility of electromigration characterizations.     

Effect of annealing on the surface microstructural evolution and the electromigration reliability of electroplated Cu films

This paper presents the effects of annealing, performed over a temperature range from 200°C to 400°C, on the surface microstructural evolution and the electromigration reliability of electroplated Cu films. After annealing, a substantial increase in surface roughness was observed, while variations in mean grain size and nanoindentation hardness were minor. Given the annealing temperature, the surface roughness was larger for the films annealed in forming gas, due to the existence of hydrogen. In particular, the films annealed at 400°C in forming gas demonstrated severe grain-boundary grooving and surface voiding. The defective nature of the annealed surface can be alleviated by chemical-mechanical polishing (CMP), when annealing is conducted prior to the CMP. However, it appears that a sequential thermal excursion at relatively high temperatures re-aggravates the integrity of the Cu surface. This argument may be supported by the electromigration-test results on dual-damascene interconnects fabricated using two different thermal profiles. The electromigration lifetimes were longer by more than a factor of two for the interconnects that skipped a post-passivation anneal at 400°C. The experimental evidence presented in this work suggests that controlling the integrity and quality of the Cu surface is an important step in ensuring good electromigration reliability.     

Electromigration and microstructural properties of AI-Si/Ti/AI-Si VLSI metallization

Texas Instruments, Inc., Houston, Texas 77001 Al-Si(l%)/Ti/Al-Si(l%) interconnect lines produced by dc Magnetron sputtering were subjected to standard electromigration tests. Their time to failure proved to be superior to that of simple Al-Si(l%) films. The titanium tended to form TiAl₃ in which significant amounts of silicon were dissolved. Investigation by SEM revealed that most of the electromigration damage occurred in the portion between the protective oxide and the titanium layer.     

Ohmic contact electromigration

In this paper olimic contact electromigration is briefly reviewed. After a short introduction on the main contact failure mechanisms and technological solutions, the effect of contact scaling on electromigration is considered. Then, guidelines on test structures and lifetest set-up for contact electromigration studies are given, with particular reference to the thermal characterization needed to extract reliable data from lifetest experiments. Finally, the most recent experimental results obtained with both aluminum based metallizations and contacts making use of silicides or barrier layers are reviewed and compared.     

Failures induced by electromigration in ECL 100k devices

Reliability of ECL 100k devices using Al (4%wt Cu, 1%wt Si) double level metallization, isoplanar technology with shallow, 0.25 μm, base-emitter junctions was evaluated by means of high current and high temperature stresses. Three failure modes connected with electromigration phenomena were found in the output transistor: (a) base-emitter shunts owing to junction spiking caused by Al-Si interdiffusion enhanced by electromigration; (b) collector-emitter shorts due to the breaking of the dielectric oxide between two superimposed metal levels owing to material transport and pile-up in the underlying metallization; (c) open circuit of the output emitter due to void growth in the Cu-depleted areas of the Al interconnections. After B-E shunts, failure mechanism evolves towards two different sequences of failure modes, according to the different transistor structures; in fact C-E shorts were found to occur only when collector and emitter metals are superimposed, while the open circuit of the output emitter is the final failure for all configurations. The earlier and more frequent failure mode observed is the resistive shunt of the base-emitter junction of the output transistor, in agreement with previously reported data on electromigration effects in Al (Cu, Si) metallizations used both as interconnections and as contacts to shallow junctions.     

Bulk electromigration by eliminating grain boundary mass flow in continuous aluminum lines

Starting from electromigration threshold in single segments of narrow large-grained lines, grain boundary mass flow was eliminated in continuous Al lines. Mass flow divergences proceeding from grain boundaries on bonding pads were suppressed by another threshold, which is given by the test current per Al thickness. Narrow test lines should be free of tensile stress, which can produce premature failure. Lifetime tests were performed at 200°C with current densities of 8 × 10⁵ A/cm². The averaged stripe width was 1.3 μm. Within 16400 hours no failure occurred, due to homogeneous bulk electromigration.     

Characterization of Al-Si-Cu metal lines by means of tem analysis and the sarf technique

Four groups of samples deposited at different temperatures, T_D, have been characterized by means of the SARF (Spectral Analysis of Resistance Fluctuations) technique. For each temperature, lines with the same length (800 μm) and two different widths (1 μm and 2 μm) were available. An accurate TEM (Transmission Electron Microscopy) analysis has been carried out with the aim of investigating the dependence of the microstructure on T_D. While 1-μm-wide lines showed a quasi-bamboo structure, regardless of T_D, 2-μm-wide lines appeared constituted by grains whose size was smaller than the stripe width. In this case, the grain size distribution was dependent on T_D. A new microstructural parameter has been introduced to which electromigration noise seems to be very sensitive: the percentage of grains of the metal film whose size is smaller than the stripe width. The correlation observed among noise parameters, microstructural characteristics of the lines and, in the case in which they were available, lifetime data, has confirmed the potentiality of the SARF technique as a diagnostic tool.     

Reservoir effect in SiCN capped copper/SiO2 interconnects

By analyzing electromigration in large lines, the reservoir effect due to via connecting matrices has been studied evidencing the key role of the (via + via inter-space) area parameter to gain lifetime. This extra-lifetime can be converted into effective current density increase, useful for circuits very demanding in current, depending on metal level. The understanding of the reservoir effect finally allowed the comparison of electromigration performance of lines of different width. It pointed out that the lifetime decreases with increasing line width, which evidences the copper diffusion at grain boundaries as mechanism.     

A fast wafer-level screening test for VLSI metallization

A method for screening out poor-quality metallizations from VLSI fabrication lines by wafer-level probing is proposed. Theoretical analysis suggests a linear dependence of the metal line conductance on the square of the current density, at thermal equilibrium. The limit to this linearity for ideally perfect metallizations occurs at the metal melting point, at which there is a sudden decrease in the conductance value to zero. In real interconnects, nonidealities such as localized defects or nonuniform surrounding dielectric at isolated points could lead to a deviation of the conductance from ideal expectations. Using this as a diagnostic, a universal methodology for assessing metal quality, independently of the physical parameters of the metal line, is described. Qualitative correlation with electromigration lifetime results is used to validate the method