共查询到4条相似文献,搜索用时 0 毫秒
1.
Kurata H. Otsuga K. Kotabe A. Kajiyama S. Osabe T. Sasago Y. Narumi S. Tokami K. Kamohara S. Tsuchiya O. 《Solid-State Circuits, IEEE Journal of》2007,42(6):1362-1369
Threshold-voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory was observed for the first time. A large amount of data of Vth fluctuation was acquired by using a 90-nm-node memory array, and it was confirmed that a few memory cells have large RTS fluctuation exceeding 0.2 V. It was found that program-and-erase cycles increase Vth amplitude in a flash memory. It was also found by simulation and measurement that tail-bits are generated due to RTS in multilevel flash operation. The amount of Vth broadening due to the tail-bits was estimated to become larger as the scaling of memory cells advances and reaches more than 0.3 V in the 45-nm node. These results thus demonstrate that RTS will become a prominent issue in designing multilevel flash memory in the 45-nm node and beyond. 相似文献
2.
Lin C.-T. Fang Y.-K. Yeh W.-K. Lee T.-H. Chen M.-S. Lai C.-M. Hsu C.-H. Chen L.-W. Cheng L.-W. Ma M. 《Electron Device Letters, IEEE》2007,28(2):111-113
A novel strain engineering technique for a fully silicided (FUSI) metal gate called contact etch stop layer (CESL)-enveloped FUSI was developed for the first time. A CESL was deposited prior to the FUSI RTP2 (the second rapid thermal process of FUSI gate formation) to confine the NixSi FUSI. Then, the phase transfer and volume change of the enveloped FUSI after RTP2 induced a tensile stress to enhance ION. For example, 500 degC RTP2 induced 1-GPa tensile stress on a blanket wafer test and gained 10% improvement in the ION of the n-channel metal-oxide-semiconductor. The mechanisms of the improvement were also nicely supported by transmission-electron-microscope cross-section analysis, X-ray-diffraction spectrum, and simulation confirmation data 相似文献
3.
Tilke A. T. Stapelmann C. Eller M. Bach K.-H. Hampp R. Lindsay R. Conti R. Wille W. Jaiswal R. Galiano M. Jain A. 《Semiconductor Manufacturing, IEEE Transactions on》2007,20(2):59-67
In the present work, a high aspect ratio process (HARP) using a new O3/TEOS based sub atmospheric chemical vapor deposition process was implemented as STI gapfill in sub-65-nm CMOS. Good gapfill performance up to aspect ratios greater than 10:1 was demonstrated. Since the HARP process does not attack the STI liner as compared to HDP, a variety of different STI liners can be implemented. By comparing HARP with HDP, the geometry dependence of nand p-FET performance due to STI stress is discussed 相似文献
4.
《Microwave and Wireless Components Letters, IEEE》2006,16(11):612-614
A 2.4-GHz low noise amplifier (LNA) for the direct conversion application with high power gain, low supply voltage and plusmn4 KV human body model (HBM) electrostatic discharge (ESD) protection level implemented by a 90-nm RF CMOS technology is demonstrated. At 12.9 mA of current consumption with a supply voltage of 1.0 V, the LNA delivers a power gain of 21.9 dB and the noise figure (NF) of 3.2 dB, while maintaining the input and output return losses below -11 dB and -18.3 dB, respectively. The power gain and NF are only 0.2 dB lower and 0.64 dB higher than those of LNA without ESD protection 相似文献