Investigation of compact models for RF noise in SiGe HBTs by hydrodynamic device simulation

A comprehensive investigation of the SPICE and unified compact noise models is performed by comparison with the more fundamental hierarchical hydrodynamic device model. It is shown that the rather simple SPICE and unified compact noise models yield good results for frequencies up to 10 GHz for state-of-the-art SiGe HBTs with a low base resistance. The base noise resistance, a key parameter of the compact noise models turns out to be independent of frequency and bias. It can be well estimated based on the sheet resistance of the intrinsic and extrinsic base or with the modified circle-fit method. The unified model, which in comparison to the SPICE model considers in addition the finite transit time of shot noise, is found to be somewhat more accurate than the SPICE model, especially at higher frequencies and collector currents. But this is achieved at the expense of a transit time parameter which cannot be determined without accurate and detailed noise measurements or physics-based numerical simulations.     

Predictive worst case statistical modeling of 0.8-μm BICMOSbipolar transistors: a methodology based on process and mixeddevice/circuit level simulators

The authors discuss the use of mixed-level physics-based device/circuit simulation software and semiconductor process simulator in the construction of predictive worst case process conditions for bipolar transistors currently being manufactured in AT&T 0.8-μm BICMOS technology. Process fluctuations are introduced into the process simulator using the Latin hypercube (Monte Carlo) sampling method. The method is different from those in previous similar studies in that the compact device model parameter extraction step for each sample process is bypassed and active devices in the circuit are described by the physical device simulator rather than a compact model representation. This eliminates deficiencies associated with compact semiconductor device models. Furthermore, inaccuracies and difficulties introduced by compact model parameter extractions (especially for bipolar transistors) are also eliminated. The method is very useful in identifying critical process steps which determine the electrical performance of the devices and circuits     

Staying current with HICUM

This article provides an overview on the basic operation principle of the advanced physics-based compact bipolar transistor model HICUM (high-current model), which keeps pace with the rapid progress in high-speed circuits for wireless and fiber-optic communications. HICUM uses the small-signal parameters, such as the depletion capacitances and the transit times, as basic variables, which are described accurately as a (nonlinear) function of bias, temperature, and geometry. This results in not only continuously differentiable relations for charges and transfer current but also accurate modeling of the large-signal switching behavior, including harmonic distortion at high frequencies. A few examples are presented to provide a feeling for the model's capabilities in an industrial environment     

Physics- and process-based bipolar transistor modeling forintegrated circuit design

Many applications require circuits to be operated close to the performance limits of current silicon (production) processes to meet the required circuit specifications for, e.g., high speed, low noise, and low power consumption. Therefore, the circuits must be carefully optimized by selecting the individual transistor configurations. As a consequence, model parameters for a large variety of configurations (100 or more) are often requested. Unfortunately, most present design tools and modeling methods do not support an efficient generation of the respective parameter sets for bipolar compact models. This paper describes an approach that is physics and process based; facilitates an extremely fast generation of consistent model parameter sets, even during the initial phase of process development; and reduces parameter extraction efforts significantly. This allows one to quickly explore various process options in advance and to align process development with circuit product requirements. The approach is supported by a computer-aided-design tool named TRADICA, which can be combined with circuit simulators allowing the emitter size and number of emitter, base, and collector contacts to be the only model parameters visible to designers. Related modeling and parameter extraction issues are also discussed because these areas are often unknown and tend to be underestimated by circuit designers and process developers but have a significant impact on the flexibility, capability, and accuracy of circuit design     

Investigation of very fast and high-current transients in digitalbipolar IC's using both a new compact model and a device simulator

The design and optimization of high-speed integrated bipolar circuits requires accurate and physical transistor models. For this, an improved version of the compact model HICUM was developed. It is an extension of the small-signal model recently described to the large-signal (transient) case. The model, which takes into account emitter periphery and non-quasi-static (NQS) effects, is semi-physical, allowing the calculation of its elements for arbitrary transistor geometries from specific electrical and technological data. This is an important precondition for transistor optimization in a circuit and for worst case analysis. The model was verified for basic building blocks of high-speed digital circuits like emitter follower and current switch. For this, mixed-mode device/circuit simulation is used instead of measurements, since the latter would give too large errors for the fast transients of interest. It is demonstrated that-in contrast to the obsolete but frequently used SPICE Gummel/Poon model-the new HICUM is well suited for modeling very-high-speed transistor operation also at high current densities. Moreover, it is shown that at very fast transients the influence of NQS effects can no longer be neglected. As a practical application example, a high-speed E²CL circuit is simulated using the new model. The results show again that high-current models are very useful for designing IC's at maximum operating speed. This is because the optimum emitter size is often the minimum size, which is limited by high-current effects. Especially, in the case of current spikes (e.g., in emitter followers) it is difficult to find the optimum emitter size without having adequate transistor models     

Analysis of device parameters for pnp-type AlGaAs/GaAs HBTsincluding high-injection using new direct parameter extraction

Device parameters of the small-signal T equivalent circuit for pnp-type AlGaAs/GaAs heterojunction bipolar transistors (HBTs) are obtained using a new direct parameter extraction technique. These parameters are analyzed not only under the low-current conditions but also under high-current conditions so as to understand the RF-performance fall-off after base pushout occurs. In this analysis, the intrinsic and extrinsic small-signal parameters which affect RF performance are directly determined using several steps without numerical optimization in order to properly analyze device parameters. The T equivalent circuit model determined by the method shows excellent agreement with the mean errors of 3.5-6.9% under both low-and high-current conditions. The analysis showed that the intrinsic transit time, which is the sum of the base transit time (τ_b) and the collector depletion layer transit time (τ_c), small-signal emitter resistance (r_e), small-signal base resistance (r_b) and collector-base capacitance (C_BC) all increase under high-current conditions. In addition, we found that the intrinsic transit time is the dominant parameter for the fall-off of the cut-off frequency (f_t) under high-current conditions, and there is little effect of r_b and C_BC in the fall-off of the maximum oscillation frequency (f_max) under high-current conditions. Judging from these results, device parameters are successfully obtained under a wide current range by a new parameter extraction technique and circuit modeling for HBTs under a wide current range can be achieved using the small-signal T-equivalent circuit     

Organic Thin-Film Transistors: Part II—Parameter Extraction

A parameter extraction methodology and a verification of a generic analytical model and a thin-film transistor (TFT) compact dc model for the current–voltage characteristics of organic TFTs are presented. The verification shows that the proposed models meet the requirements for compact modeling and for computer circuit simulators. The models are fully symmetrical, and the TFT compact dc model is validated in all regimes of operation—linear and saturation above threshold, subthreshold, and reverse biasing. Suitable characterization techniques for parameter extraction of mobility, threshold voltage, and contact resistance are provided. Approaches are elaborated for the essential practical feature of upgradability and reducibility of the TFT compact dc model, allowing for easier implementation and modification, as well as separation of characterization techniques.      

A physical compact model of DG MOSFET for mixed-signal circuit applications- part I: model description

To use double-gate (DG) MOSFET for mixed-signal circuit applications, especially for circuits in which the two gates are independently driven, such as in the case of dynamic-threshold and fixed-potential-plane operations, physical compact models that are valid for all modes of operations are necessary for accurate design and analysis. Employing physically rigorous current-voltage (I-V) relationship in subthreshold and above-threshold regions as asymptotic cases, we have constructed a model that joins the two operating regions by using carrier-screening functions. We have included consistently source/drain series resistance, low drain-field mobility, and small-geometry effects of drain-induced barrier lowering (DIBL), MOS interface mobility, velocity saturation and channel-length modulation (CLM) with validation from two-dimensional (2-D) distributed simulation. All model parameters can be extracted from large-signal I-V characteristics in dc conditions with given geometrical data. Parameter extraction methods and verification from simulation are presented in Part II.     

An improved compact model for CMOS cross-shaped Hall-effect sensor including offset and temperature effects

A compact model of a cross-shaped horizontal integrated Hall-effect sensor is presented in this paper. Compared to existing models, reliability is improved, especially to simulate systems in which biasing and measurement circuits are not independent. The Hall device model core, already published, is based on a network of six non-linear resistances and four Hall voltage sources, and includes only 11 physical parameters. In this paper, in order to improve model predictivity, four additional parameters have been added to take the offset issue into account. In addition, variations of parameters with temperature are also addressed. The model is implemented in Verilog-A and has been validated through experiments carried out on Hall devices designed in a CMOS 0.35??m technology. The parameters extraction procedure is detailed and the maximum error between simulations and experimental data is less than 1?% for a wide range of biasing currents and temperatures.     

State-space analysis of the quantum-well injection transit timediode

A state-space linear model of the quantum-well injection transit time (QWITT) diode is developed. The resulting system of equations is suitable for time- and frequency-domain analysis of the QWITT diode with its external circuit, and since the eigenvalues (complex resonant frequencies) are an integral part of the formulation, the method is extremely useful for the design of oscillator circuits and for the study of stability problems that are associated with supplying bias to the diode. The model includes the effects of velocity overshoot and carrier diffusivity as well as the physical geometry of the devices being studied. It is tested by comparing the predicted small-signal impedance with other well-known models for similar devices. Using state-space analysis, it is predicted that long diodes with a positive injection conductance will not have an input impedance with a negative real part at any frequency     

Physical modeling of lateral scaling in bipolar transistors

The dependence of important transistor characteristics, such as transit frequency, on emitter width and length is modeled on a physical basis. Closed-form explicit analytical equations are derived for modeling the emitter size dependence of the low-current minority charge and transit time, the critical current indicating the onset of high injection in the collector, and the stored minority charge in the collector at high injection. These equations are suited for application in various compact transistor models such as the SPICE Gummel-Poon model (SGPM) as well as the advanced models HICUM and MEXTRAM. As demonstrated by two- and three-dimensional device simulation and measurements, combination of the derived equations with HICUM results in accurate prediction of the characteristics of transistors with variable emitter length and width. As a consequence, the new model makes the conventional transistor library unnecessary and offers bipolar circuit designers the flexibility to use the transistor size that fits the application best     

Analytical current-voltage relations for compact SiGe HBT models.I. The “idealized” HBT

Based on the generalized integral charge control relation (GICCR), analytical current-voltage relations for “true” SiGe heterojunction bipolar transistors (HBTs) are derived, which are well suited for compact physically based transistor models. For this, the weighted minority charge in the collector, which proved to be of dominating influence at high current densities, is calculated from simple physical expressions. They contain the operating point as well as physical and technological parameters. The model equations, which serve as a basis for a new physically based compact SiGe HBT model called SIGEM, are verified up to high current densities by numerical device simulations. It is shown that not only the static behavior but also the small-signal parameters y₂₁ and y₂₂, which are more sensitive to potential model errors, are well described even far within the high-current region. In this first part of the paper, the work is restricted to HBTs with idealized and simplified doping profile. In the second part [2] it is shown how these equations can also he applied to HBTs with modified, more practical doping profiles and how the model parameters can be extracted     

On the complexity of Internet traffic dynamics on its topology

Most studies of Internet traffic rely on observations from a single link. The corresponding traffic dynamics has been studied for more than a decade and is well understood. The study of how traffic on the Internet topology, on the other hand, is poorly understood and has been largely limited to the distribution of traffic among source-destination pairs inside the studied network, also called the traffic matrix. In this paper, we make a first step towards understanding the way traffic gets distributed onto the whole topology of the Internet. For this, we rely on the traffic seen by a transit network, for a period of more than a week. As we are still at the stage of understanding the topological traffic distribution, we do not try to model the traffic dynamics. Rather we concentrate on understanding the complexity of describing the traffic observed by a transit network, how it maps onto the AS-level topology of the Internet and how it changes over time. For this, we rely on well-known tools of multi-variate analysis and multi-resolution analysis. Our first observation is that the structure of the Internet topology highly impacts the traffic distribution. Second, our attempts at compressing the traffic on the topology through dimension reduction suggests two options for traffic modeling: (1) to ignore links on the topology for which we do not see much traffic, or (2) to ignore time scales smaller than a few hours. In either case, important properties of the traffic might be lost, so might not be an option to build realistic models of Internet traffic. Realistic models of Internet traffic on the topology are not out of reach though. In this paper, we identify two properties such models should have: (1) use a compact representation of the dependencies of the traffic on the topology, and (2) be able to capture the complex multi-scale nature of traffic dynamics on different types of links.     

HiSIM2 Circuit simulation - Solving the speed versus accuracy crisis

The development trend in compact modeling goes toward surface-potential-based approaches and leads to models like HiSIM2, with higher accuracy, fewer model parameters, and shorter computer runtime than achievable with the conventional threshold-voltage-based approaches. The main motivation for continuing this development effort is to realize a sufficient design capability of RF circuits with advanced MOSFETs, where many higher-order phenomena affect the circuit performance, as well as of large mixed-signal circuits, where both accuracy and short simulation time are a must. The trend toward the surface potential brings compact modeling for circuit simulation also much closer to 2D and three-dimensional numerical device simulation. Therefore, both approaches can now come together and work united to achieve the common goal of realizing rapid technology progress for the benefit of the society     

多晶硅TFT模型的研究进展

全面介绍了多晶硅薄膜晶体管(TFT)紧凑模型的现状和应用前景,简单说明了多晶硅TFT特有的电学特性,这是多晶硅TFT建模的基础,重点介绍了基于阈值电压和基于表面势的多晶硅TFT紧凑模型的研究进展,并对这些模型进行了评述,其中RPI模型是基于阈值电压的TFT模型的典范.虽然TFT模型已经有所发展,但成熟度还远远不够.最后提出了改进多晶硅TFT模型的方向和策略,包括二维器件模拟的应用、基于表面势模型的发展、多晶硅材料特性的应用、统一模型的发展、短沟效应的建模和参数提取等.     

Self-consistent transit-time model for a resonant tunnel diode

We present a self-consistent compact model for the small-signal impedance of a resonant tunnel diode (RTD) with a finite collector transit time. The effect of the collector transit time on the device impedance is described for three In/sub 0.53/Ga/sub 0.47/AsAlAs-InAs RTDs with current densities ranging from 14 kA/cm/sup 2/ to 570 kA/cm/sup 2/ with various collector spacer lengths for dc biasing in both the positive and negative differential resistance regions.     

High abstraction level CAD tool implementation of MOS drain current models

This paper presents a toolbox in which a compact high abstraction level formulation of the MOS drain current was implemented. The formulation is based on the popular ACM compact MOS model: the approximations introduced in the model preserve the drain-to-source device symmetry and the continuity between all regions of operation (i.e. weak, moderate and strong inversion). The technological parameters involved in the formulation are obtained by means of a fully automatic extraction procedure. Finally, a detailed case study, in which a behavioural analysis of sample-and-hold circuits using the proposed toolbox is performed, is presented. The ATMEL^® CMOS process was used as reference for the case study. The MATLAB^® environment was used to implement the drain current model formulation, the technological parameters extraction and the case study as well.     

Comparative study of electron transit times evaluated by DD, HD,and MC device simulation for a SiGe HBT

Transit times of a silicon/germanium heterojunction bipolar transistor (HBT) with a base width of 24 nm are investigated in the quasi-stationary limit for the first time by consistent drift-diffusion (DD), hydrodynamic (HD), and fullband Monte Carlo (MC) simulations. The quasi-ballistic transport in the base and collector leading to a strong velocity overshoot is well described by the HD model and corresponding transit times are in good agreement with the MC results. On the other hand, the DD model fails in this region and substantially overestimates the base transit time bearing the possibility of wrong guidelines for transistor design optimization. However, since the base transit time is no longer dominating the cutoff frequency of high-speed HBTs, the failure of the DD model leads to an underestimation of the peak cutoff frequency by only 10%. Close to high injection differences in the emitter transit times of the HD and MC model are observed which are mainly related to small differences in the Gummel plot     

An effective parameter extraction method based on memetic differential evolution algorithm

This paper provides an effective method for parameter extraction of microelectronic devices and elements. A novel method, memetic differential evolution (MDE) algorithm, is proposed in this paper. By combining differential evolution (DE) algorithm, mutations in immune algorithm (IA), and special operators for parameter extraction, MDE possesses characteristics of high accuracy, stability, generality, and efficiency. The effectiveness of the method has been shown by two typical examples, including small-signal equivalent circuit models for an AlGaN/GaN HEMT device up to 40 GHz, as well as an equivalent circuit model for on-chip differential spiral inductors. In both cases, the initial values and parameter ranges of the elements in the equivalent circuits are hard to determine in optimization. The results and comparisons with Levenberg-Marquardt (LM) algorithm, genetic algorithm (GA), particle swarm optimization (PSO) algorithm and canonical DE algorithm, demonstrate the superiority of MDE in terms of accuracy and generality.     

30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits

Silicon planar and three-dimensional inductors and transformers were designed and characterized on-wafer up to 100 GHz. Self-resonance frequencies (SRFs) beyond 100 GHz were obtained, demonstrating for the first time that spiral structures are suitable for applications such as 60-GHz wireless local area network and 77-GHz automotive RADAR. Minimizing area over substrate is critical to achieving high SRF. A stacked transformer is reported with S/sub 21/ of -2.5 dB at 50 GHz, and which offers improved performance and less area (30 /spl mu/m/spl times/30 /spl mu/m) than planar transformers or microstrip couplers. A compact inductor model is described, along with a methodology for extracting model parameters from simulated or measured y-parameters. Millimeter-wave SiGe BiCMOS mixer and voltage-controlled-oscillator circuits employing spiral inductors are presented with better or comparable performance to previously reported transmission-line-based circuits.