An offset-insensitive switched-capacitor bandgap reference with continuous output

m/℃ and the power supply rejection ratio of output voltage without any filtering capacitor is -40 dB and -33 dB at 100 Hz and 10 MHz, respectively.     

一种连续输出的小失调开关电容带隙基准源

An improved switched-capacitor bandgap reference with a continuous output voltage of 1.26 V has been implemented with Chartered 0.35-μm 5-V CMOS process. The output offset voltage, induced by non-ideal characteristics of operational amplifier and bias current generator, is suppressed by the proposed sample-and-hold circuit and self-bias technique. Experimental results show that the proposed circuit operates properly under a supply voltage varying from 3 to 5 V. The measured temperature coefficient is 112 ppm/℃ and the power supply rejection ratio of output voltage without any filtering capacitor is -40 dB and -33 dB at 100 Hz and 10 MHz, respectively.     

基于推挽拓扑的输入并联输出串联直流变换器及其输出均压控制策略分析

在输出高电压场合,将较低的输入直流电压变换为较高的直流电压输出。输出端由于存在高压使得输出端器件承受较大的电压应力,存在变换器次级电压偏高、整流二极管电压应力大以及反向恢复时间长等问题。 基于此问题,提出以推挽变换器为基本单元,采用多个基本单元推挽变换器构成的输入串联输出并联变换器。为了确保该变换器系统的稳定可靠,从能量守恒的角度出发,分析了该变换器中各模块的输出均压之间的关系,给出了输出均压的实现条件。通过建立系统小信号模型,推导出系统的稳定条件,最后经试验验证了理论分析的正确性。     

MOS switched-capacitor filters

In the past several years, much progress has been made in bringing the economies of integrated-circuit technology to bear on the realization of voiceband frequency selective filters. This paper will review one approach to this problem, the use of switched-capacitor techniques. The paper emphasizes the practical aspects of switched-capacitor filter design under the constraints imposed by MOS integrated-circuit technology. The basic operation of switched-capacitor filters is reviewed, followed by a discussion of the properties of the various circuit building blocks in MOS technology. Finally, a summary of several filter organizations which appear to be well suited to switched-capacitor implementation is presented.     

Testable switched-capacitor filters

A design-for-testability (DFT) methodology for switched-capacitor (SC) filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off- and online test. A programmable biquad is used for on-chip comparison of the transfer functions for every filter stage. Test area overhead consists of the programmable biquad, a set of switches, and a finite-sequential-machine (FSM) control part. The design and implementation of an example filter are included to assess the potential usefulness of this approach     

Offset-compensated switched-capacitor circuits

Novel switched-capacitor circuits are described which make the offset-compensation possible without short-circuiting the input and output terminals of op amps. Based on a common configuration, the proposed circuits are useful for basic building blocks integrable using the semicustom IC process.     

Micropower switched-capacitor oscillator

A CMOS sinusoidal integrated oscillator based on a switched-capacitor third-order phase-shift network is described. Frequency is proportional to that of a clock, but may be controlled by a voltage. Accuracy is a few percent for a power consumption below 0.1 /spl mu/W in the audio range.     

Simple switched-capacitor decimation circuit

A simple SC decimation circuit is presented that simplifies the requirements for the preceding continuous-time antialiasing filter and permits the sampling frequency of the following SC filter to be reduced considerably. A practical example is given.     

An improved switched-capacitor integrator

A novel switched-capacitor integrator is described which results in the mapping of the analogue frequency axis directly on the unit circle of the z-plane. The circuit requires one extra capacitor and additional switches. It makes the design much easier and doubles the effective sampling rate.     

New switched-capacitor ladder filters

A method is described and implemented for the derivation of switched-capacitor discrete-time filters from analogue passive filters of the ladder doubly terminated kind. The method is based on linear transformation active (LTA) synthesis, and yields some very interesting results.     

Novel switched-capacitor pseudo-N-path filter

The letter presents novel fully stray-insensitive switched-capacitor (SC) pseudo-N-path filters based on the theory of wave-flow networks. N-path filters are well suited for the realisation of narrowband bandpass and bandreject filters. The two main drawbacks of N-path filters, i.e. unwanted mirror frequencies due to path mismatch, and clock feedthrough located in the passband, are overcome by applying the pseudo-N-path principle. The design procedure will be demonstrated using an example of a 6-path filter based on a 3rd-order highpass prototype filter.     

Strays-insensitive active switched-capacitor biquad

A general active switched-capacitor biquad is introduced. The circuit is immune to the various parasitic capacitances and is based on the two-integrator-loop topology. It implements the noninverting forward-Euler and the inverting backward-Euler discrete integrators. The circuit is the most general of its kind and all published biquads and many others can be generated from it.     

Pseudopower in switched-capacitor filters

The concepts of pseudopower, pseudopassivity, and pseudolosslessness are introduced in connection with switched-capacitor filters employing voltage invertor switches. With such concepts the verification of the low sensitivity and stability properties is straightforward.     

Novel second-order switched-capacitor interpolator

A novel switched-capacitor interpolator circuit is proposed for the realisation of arbitrary second-order interpolating functions employing a reduced number of switching waveforms and yielding low capacitance spread and total capacitor area.<>     

Parasitic-compensated switched-capacitor delay lines

Describes a systematic approach to the design of passive parasitic-compensated switched capacitor (SC) delay lines employing well known SC branches. Such delay lines are important building blocks for the implementation of high frequency FIR SC decimators and interpolators with high selectivity amplitude responses     

A differential switched-capacitor amplifier

A monolithic realization of a switched-capacitor amplifier is reported. It has op-amp offset voltage cancellation without requiring the output to slew to ground each time the amplifier is reset. The amplifier is very insensitive to low op-amp gain. It also has clock-feedthrough cancellation. Finally, it can be used as a differential amplifier with both inputs being sampled at the same instance.     

Offset-compensated switched-capacitor leapfrog filters

Offset-compensated SC leapfrog filters can be realised as shown in the letter. The filters are parasitic-insensitive and the switches are controlled by a 3-phase clock. A 5th-order lowpass filter is given as an example.     

Novel switched-capacitor generalised integrator

A novel circuit arrangement is proposed for a generalised integrator using the switched-capacitor (SC) technique. This generalised integrator (which integrates with respect to a dependent variable) can easily be constructed in IC form using MOS technology. It possesses some attractive features, for instance simplicity and low cost. It can find applications in many analogue systems such as curve-fitting devices, adaptive filters, RMS convertors etc.