1.1 V Low-Power ΣΔ Modulator for 14-bit, 16 KHz A/D Conversion Using a New Low-Voltage Class-AB Op-amp

This paper presents the implementation of a second order modulator for a 1.1 V supply voltage. A new class-AB CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The modulator has been implemented using a 0.35 m CMOS technology with 0.65 V transistor threshold voltage. Experimental results show 14 bits of resolution over 16 kHz nyquist rate with an oversampling ratio of 160.Fernando Muñoz Chavero was born in El Saucejo, Sevilla, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2002, respectively. Since 1997, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1999). His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Telecommunications Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Jonathan Noel Tombs was born in Oxford, UK. He received the Electrical Engineering and Ph.D. degrees from Oxford University, UK, in 1987 and 1991, respectively. Since 1993, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1997), and Professor (2002). He has published more than 50 papers in International Journals and Conferences. His research interests are related to Digital Design and system verification with VHDL, low-voltage low-power analog circuit design, A/D and D/A conversion and analog and mixed signal processing.Jaime Ramírez-Angulo is currently Klipsch Distinguished Professor, IEEE fellow and Director of the Mixed-Signal VLSI lab at the Klipsch School of Electrical and Computer Engineering, New Mexico State University (Las Cruces, New Mexico), USA. He received a degree in Communications and Electronic Engineering (Professional degree), a M.S.E.E. from the National Polytechnic Institute in Mexico City and a Dr.-Ing. degree form the University of Stuttgart in Stuttgart, Germany in 1974, 1976 and 1982 respectively. He was professor at the National Institute for Astrophysics Optics and Electronics (INAOE) and at Texas A&M University. His research is related to various aspects of design and test of analog and mixed-signal Very Large Scale Integrated Circuits.     

Programmable SC Biquad Using One Single Capacitor Bank

This paper presents a new technique for programming SC circuits using a single time-multiplexed capacitor bank, achieving a significant reduction in capacitance area. Simulation and experimental results obtained with a programmable biquad low pass filter show the validity of the proposed method.Antonio Torralba was born in Seville, Spain. He received the electrical engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1983 and 1985, respectively. Since 1983, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Assistant professor, Associate Professor (1987), and Professor (1996). He has published 30 papers in journals and more than 80 papers in conferences. His research interests are in the design and modeling of low-voltage analog circuits, analog and mixed-signal design, analog to digital conversion, and electronic circuits and systems with application to control and communication.Alfredo Pérez Vega-Leal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1998 and 2003, respectively. Since 1995, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, as research student and became an Associate Professor in 1999. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion.Ramón González Carvajal was born in Seville, Spain. He received the Electrical Engineering and Ph.D. degrees from the University of Seville, Seville, Spain, in 1995 and 1999, respectively. Since 1996, he has been with the Department of Electronic Engineering, School of Engineering, University of Seville, where he has been an Associate Professor (1996), and Professor (2002). He has published more than 100 papers in International Journals and Conferences. His research interests are related to low-voltage low-power analog circuit design, A/D and D/A conversion, and analog and mixed signal processing.     

Sine-Wave Signal Characterization Using Square-Wave and ΣΔ-Modulation: Application to Mixed-Signal BIST

This paper presents a method for extracting, in the digital domain, the main characteristic parameters of an analog sine-wave signal. It is based on a double-modulation, square-wave and sigma-delta, together with a simple Digital Processing Algorithm. It leads to an efficient and robust approach very suitable for BIST applications. In this line, some considerations for on-chip implementation are addressed together with simulation results that validate the feasibility of the proposed approach.Diego Vázquez was born in El Coronil, Sevilla, Spain, in 1966. He received the Licenciado en Física degree in 1989 and the Doctor en Ciencias Físicas degree in 1995, both from the University of Sevilla, Spain. Since 1990, he has been with the Departamento de Electrónica y Electromagnetismo, University of Sevilla, where he is a Associate Professor, and also with the Instituto de Microelectrónica de Sevilla, Centro Nacional de Microelectrónica (IMSE-CNM-CSIC), Sevilla, Spain. He has published about 100 papers in international journals, books and major conferences. In 1992 he won the Best Paper Award of the 10th IEEE VLSI Test Symposium. His research interests are in the fields of design, fault tolerance, test, and design for testability of analog and mixed-signal circuits.Gloria Huertas was born in Sevilla, Spain, in 1974. She received the Licenciado en Física degree in 1997 and the Ph.D. in 2004, both from the University of Sevilla, Spain. Since then, she has been with the Departamento de Electrónica y Electromagnetismo, University of Sevilla, where she is Assistant Professor, and also with the Instituto de Microelectrónica de Sevilla, Centro Nacional de Microelectrónica (IMSE-CNM-CSIC), Sevilla, Spain. Her research focuses on designing electronic mixed-signal circuits and systems including techniques for testability.África Luque was born in Zamora (Spain) in 1977. She received the Licenciado en Física degree in 2000 from the University of Sevilla, Sevilla, Spain. She is with the Departamento de Electrónica y Electromagnetismo, University of Sevilla, and also with the Instituto de Microelectrónica de Sevilla, Centro Nacional de Microelectrónica (IMSE-CNM-CSIC), Sevilla, Spain, where she is currently pursuing the Ph.D. degree. Her research focuses on the design and test of mixed-signal circuits including Silicon-On-Insulator technologies.Manuel J. Barragan was born in Sevilla, Spain, in 1980. He received the Licenciado en Física degree in 2003 from the University of Sevilla, Sevilla, Spain. He is currently pursuing the Ph.D. degree from the Instituto de Microelectrónica de Sevilla (IMSE, CNM) on the topics of test and design for testability of analog and mixed-signal circuits.Gildas Leger was born in St. Brieuc, Côtes dArmor, France, in 1976. He received the Ingénieur en Physique degree in 1999 from the National Institute of Applied Sciences (INSA) of Rennes, France.He is currently pursuing the Ph.D. degree from the Instituto de Microelectrónica de Sevilla (IMSE, CNM). His research focuses on designing electronic mixed-signal circuits and systems including techniques for testability, specially in the domain of analog to digital conversion.Adoración Rueda joined the Department of Electronics and Electromagnetism at the University of Seville in 1976 as Assistant Professor, and obtained the Ph.D. degree in 1982. From 1984 to 1996 she was Associate Professor in that Department, where now holds the position of Full Professor in Electronics. In 1989 she became researcher at the Department of Analog Design of the National Microelectronics Center (CNM), now Institute of Microelectronics at Seville (IMSE).She has participated in several research projects financed by the Spanish CICYT and by different programs of the European Community. She has published about 135 papers in international journals, books and major conferences. In 1992 she won the Best Paper Award of the 10th IEEE VLSI Test Symposium. Her research interests are currently focused on the topics of Design and Test of Analog and Mixed-signal Circuits, Behavioral Modeling of Mixed-signal Circuits, and development of CAD tools.Jose Luis Huertas received the Licenciado en Física degree nd the Doctor en Ciencias Físicas degrees in 1969 and 1973, respectively, both from the University of Sevilla, Spain.From 1970 to 1971, he was with the Philips International Institute, Eindhoven, The Netherlands, as a postgraduate student. Since 1971, he has been with the Departamento de Electrónica y Electromagnetismo, University of Sevilla, Spain, where he is a Full Professor. He is also the Director of the Instituto de Microelectrónica de Sevilla, Centro Nacional de Microelectrónica de Sevilla, Seville, Spain. His current interests include the design and testing of analog/digital integrated circuits, computer-aided IC analysis and design, fuzzy logic, nonlinear microelectronics, and neural networks.     

Layout preferences concerning matching in a fully differential ΔΣ modulator design

A fully differential architecture has numerous advantages in a switched-capacitor delta-sigma modulator such as immunization to clock-induced noise, supply rejection, simple sign conversion of integrator gain and doubled output dynamic range. Efficient use of the fully differential architecture nevertheless requires a completely symmetrical layout and routing, which may contradict with the requirements of component matching. Some design choices have to be made at this point, depending on what requirements can be compromised. This paper discusses the importance of certain layout features which may serve as a guide in making these design choices. Hakan Binici was born in Istanbul, Turkey, in 1969. He received his B.Sc. and M.Sc. degrees respectively from Istanbul Technical University and the Bogazici University in Istanbul in 1989 and 1995. Since 1997 he has been working as a research scientist at the Electronics Laboratory of the University of Oulu in Finland. He is currently continuing his research towards a Ph.D. His research interests focus on low-voltage, low-power analog VLSI systems and ΔΣ modulators. Juha Kostamovaara received the degrees of Dipl. Eng, Licentiate of Tech. and Doctor of Tech. in electrical engineering in 1980, 1982 and 1987, respectively, all from the University of Oulu, Finland. He was Acting Associate Professor of Electronics in the Department of Electrical Engineering at the University of Oulu in 1987–1993, and was nominated Associate Professor from the beginning of 1993. During 1994 he worked as an Alexander von Humboldt Scholar at the Technical University of Darmstadt, Germany. In 1995 he was invited to become full Professor of Electronics at the University of Oulu, where he is currently also head of the Electronics Laboratory. Prof. Kostamovaara's main interest is in the development of high-speed electronic circuits and systems and their applications in electronic and optoelectronic measurements and radio mobile telecommunications. An erratum to this article can be found at     

Design of Current-Mode Square-Root Domain Band-Pass Filter with Reduced Voltage

A design technique for current-mode square-root domain band-pass filter fabricated in a 0.25 μ m CMOS process is presented. The basic building block consists of current-mode current mirrors, square-root circuits and capacitors, and in which the overall supply voltage is reduced by adopting low-voltage level-shift current mirror. Both of the simulation and measured results, which are in good agreement, indicate that the prototype of the band-pass provides tunable center frequency of 4–10 MHz with bias-current-tunable, −26.7 dB total harmonic distortion (THD), and approximately 1.598 mW power dissipation with a 1.5 V supply voltage. Advantages of the proposed filter include high frequency operation, tuneability, low supply voltage operation, low power consumption, and low third order intermodulation distortion. Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C. Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000. His current researches include current-mode circuits design, analog IC design and VLSI circuit design. Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design. Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002. Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively. Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordn, F. Herrera, and L. Magdalena Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits & Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.     

Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems

Video segmentation is a key operation in MPEG-4 content-based coding systems. For real-time applications, hardware implementation of video segmentation is inevitable. In this paper, we propose a hybrid morphology processing unit architecture for real-time moving object segmentation systems, where a prior effective moving object segmentation algorithm is implemented. The algorithm is first mapped to pixel-based operations and morphological operations, which makes the hardware implementation feasible. Then the high computation load, which is more than 4.2 GOPS, can be overcome with a dedicated morphology engine and a programmable morphology PE array. In addition, the hardware cost, memory size, and memory bandwidth can be reduced with the partial-result-reuse concept. This chip is designed with TSMC 0.35 μm 1P4M technology, and can achieve the processing speed of 30 QCIF frames or 7,680 morphological operations per second at 26 MHz. Simulation shows that the proposed hardware architecture is efficient in both hardware complexity and memory organization. It can be integrated into any content-based video processing and encoding systems. Shao-Yi Chien was born in Taipei, Taiwan, R.O.C., in 1977. He received the B.S. and Ph.D. degrees from the Department of Electrical Engineering, National Taiwan University (NTU), Taipei, in 1999 and 2003, respectively. During 2003 to 2004, he was a research staff in Quanta Research Institute, Tao Yuan Shien, Taiwan. In 2004, he joined the Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, as an Assistant Professor. His research interests include video segmentation algorithm, intelligent video coding technology, image processing, computer graphics, and associated VLSI architectures. Bing-Yu Hsieh was born in Taichung, Taiwan, in 1979. He received the B.S.E.E and M.S.E.E degrees from National Taiwan University (NTU), Taipei, in 2001 and 2003, respectively. He joined MediaTek, Inc., Hsinchu, Taiwan, in 2003, where he develops integrated circuits related to multimedia systems and optical storage devices. His research interests include object tracking, video coding, baseband signal processing, and VLSI design. Yu-Wen Huang was born in Kaohsiung, Taiwan, in 1978. He received the B.S. degree in electrical engineering and Ph. D. degree in the Graduate Institute of Electronics Engineering from National Taiwan University (NTU), Taipei, in 2000 and 2004, respectively. He joined MediaTek, Inc., Hsinchu, Taiwan, in 2004, where he develops integrated circuits related to video coding systems. His research interests include video segmentation, moving object detection and tracking, intelligent video coding technology, motion estimation, face detection and recognition, H.264/AVC video coding, and associated VLSI architectures. Shyh-Yih Ma received the B.S.E.E, M.S.E.E, and Ph.D. degrees from National Taiwan University in 1992, 1994, and 2001, respectively. He joined Vivotek, Inc., Taipei County, in 2000, where he developed multimedia communication systems on DSPs. His research interests include video processing algorithm design, algorithm optimization for DSP architecture, and embedded system design. Liang-Gee Chen was born in Yun-Lin, Taiwan, in 1956. He received the BS, MS, and Ph.D degrees in Electrical Engineering from National Cheng Kung University, in 1979, 1981, and 1986, respectively. He was an Instructor (1981–1986), and an Associate Professor (1986–1988) in the the Department of Electrical Engineering, National Cheng Kung University. In the military service during 1987 and 1988, he was an Associate Professor in the Institute of Resource Management, Defense Management College. From 1988, he joined the Department of Electrical Engineering, National Taiwan University. During 1993 to 1994 he was Visiting Consultant of DSP Research Department, AT&T Bell Lab, Murray Hill. At 1997, he was the visiting scholar of the Department of Electrical Engineering, University, of Washington, Seattle. Currently, he is Professor of National Taiwan University. From 2004, he is also the Executive Vice President and the General Director of Electronics Research and Service Organization (ERSO) in the Industrial Technology Research Institute (ITRI). His current research interests are DSP architecture design, video processor design, and video coding system. Dr. Chen is a Fellow of IEEE. He is also a member of the honor society Phi Tan Phi. He was the general chairman of the 7th VLSI Design CAD Symposium. He is also the general chairman of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He serves as Associate Editor of IEEE Trans. on Circuits and Systems for Video Technology from June 1996 until now and the Associate Editor of IEEE Trans. on VLSI Systems from January 1999 until now. He was the Associate Editor of the Journal of Circuits, Systems, and Signal Processing from 1999 until now. He served as the Guest Editor of The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, November 2001. He is also the Associate Editor of the IEEE Trans. on Circuits and Systems II: Analog and Digital Signal Processing. From 2002, he is also the Associate Editor of Proceedings of the IEEE. Dr. Chen received the Best Paper Award from ROC Computer Society in 1990 and 1994. From 1991 to 1999, he received Long-Term (Acer) Paper Awards annually. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on Circuits and Systems in VLSI design track. In 1993, he received the Annual Paper Award of Chinese Engineer Society. In 1996, he received the Out-standing Research Award from NSC, and the Dragon Excellence Award for Acer. He is elected as the IEEE Circuits and Systems Distinguished Lecturer from 2001–2002.     

New Four-Quadrant CMOS Current-Mode and Voltage-Mode Multipliers

In this paper, a four-quadrant current-mode multiplier based on a new squarer cell is proposed. The multiplier has a simple core, wide input current range with low power consumption, and it can easily be converted to a voltage-mode by using a balanced output transconductor (BOTA) [1]. The proposed four-quadrant current-mode and voltage-mode multipliers were confirmed by using PSPICE simulation and found to have good linearity with wide input dynamic range. For the proposed current-mode multiplier, the static power consumption is 0.671 mW, the maximum power consumption is 0.72 mW, the input current range is ± 60 μ A, the bandwidth is 31 MHz, the input referred noise current is 46 pA/√Hz, and the maximum linearity error is 3.9%. For the proposed voltage-mode multiplier, the static power consumption is 1.6 mW, the maximum power consumption is 1.85 mW, the input voltage range is ± 1V from ± 1.5V supply, the bandwidth is 25.34 MHz, the input referred noise voltage is 0.85 μV/√Hz, and the maximum linearity error is 4.1%. Mohammed A. Hashiesh was born in Elkharga, New Valley, Egypt, in 1979. He received the B.Sc. degree with honors from the Electrical Engineering Department, Cairo University, Fayoum-Campus, Egypt in 2001, and he received the M.Sc. degree in 2004 from the Electronics and Communication Engineering Department, Cairo University, Egypt. He is currently a Teacher Assistant at the Electrical Engineering Department, Cairo University, Fayoum-Campus. His research interests include analog CMOS integrated circuit design and signal processing, and digitally programmable CMOS analog building blocks. Soliman A. Mahmoud was born in Cairo, Egypt, in 1971. He received the B.Sc. degree with honors, the M.Sc. degree and the Ph.D. degree from the Electronics and Communications Department, Cairo University—Egypt in 1994, 1996 and 1999 respectively. He is currently an Assistant Professor at the Electrical Engineering Department, Cairo University, Fayoum-Campus. He has published more than 50 papers. His research and teaching interests are in circuit theory, fully integrated analog filters, high frequency transconductance amplifiers, low voltage analog CMOS circuit design, current-mode analog signal processing and mixed analog/digital programmable analog blocks. Ahmed M. Soliman was born in Cairo Egypt, on November 22, 1943. He received the B.Sc. degree with honors from Cairo University, Cairo, Egypt, in 1964, the M.S. and Ph.D. degrees from the University of Pittsburgh, Pittsburgh, PA., U.S.A., in 1967 and 1970, respectively, all in Electrical Engineering. He is currently Professor Electronics and Communications Engineering Department, Cairo University, Egypt. From September 1997–September 2003, Dr Soliman served as Professor and Chairman Electronics and Communications Engineering Department, Cairo University, Egypt. From 1985–1987, Dr. Soliman served as Professor and Chairman of the Electrical Engineering Department, United Arab Emirates University, and from 1987–1991 he was the Associate Dean of Engineering at the same University. He has held visiting academic appointments at San Francisco State University, Florida Atlantic University and the American University in Cairo. He was a visiting scholar at Bochum University, Germany (Summer 1985) and with the Technical University of Wien, Austria (Summer 1987). In 1977, Dr. Soliman was decorated with the First Class Science Medal, from the President of Egypt, for his services to the field of Engineering and Engineering Education. Dr Soliman is a member of the Editorial Board of Analog Integrated Circuits and Signal Processing. Presently Dr. Soliman is Associate Editor of the IEEE Transactions on Circuits and Systems I (Analog Circuits and Filters).     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

Pre-equalization Techniques for Downlink and Uplink TDD MC-CDMA Systems

Time division duplex (TDD) multi carrier-code division multiple access (MC-CDMA) systems have recently been proposed as potential candidates for next generation (4G) technology. In order to mitigate multiple access interference, in this paper we investigate pre-equalization schemes for both downlink and uplink transmissions, the former also in a multiple transmit antenna scenario. In particular, new pre-equalizer techniques are introduced and complexity issues addressed. Numerical results are given to highlight the effectiveness of the proposed schemes with respect to other existing pre-equalizer solutions. Paola Bisaglia was born in Padova, Italy, on August 8, 1971. She received the Laurea (cum laude) and Ph.D. degrees in electronic engineering from the University of Padova, Padova, Italy in 1996 and 2000 respectively. In 2000 she joined Hewlett-Packard Research Laboratories, Bristol, England, working on Home Phoneline Networking and wireless LANs. From 2002 she is a research fellow at the Department of Information Engineering of the University of Padova, Italy. Her research interests include wireless local area networks; modulation, coding techniques and detection strategies for next generation (4G) broadband cellular systems, based on the combination of multi-carrier and spread-spectrum modulations. Luca Sanguinetti is a Ph.D. Student of the University of Pisa. He was born in Empoli, Italy, on February 19, 1977, and he received the Doctor Engineer degree (cum laude) in information engineering from the University of Pisa, Italy, in 2002. Since 2002 he was with the Department of Information Engineering of the University of Pisa, where he is working toward the Ph.D. degree in information engineering under the supervision of Prof. Umberto Mengali and Prof. Michele Morelli. In 2004, he was a visiting Ph.D. student at the German Aerospace Center (DLR), Oberpfaffenhofen, Germany. Currently he is involved in a research project dealing with the design and the development of base stations and user terminals for wideband wireless communications systems able to cope with those reconfigurability and interoperability characteristics required by the next generation mobile communication systems. His research interests are in wireless communication theory, with emphasis on synchronization and detection algorithms and channel estimation in multiple-access communication systems. Michele Morelli received the Laurea (cum laude) in electrical engineering and the “Premio di Laurea SIP” from the University of Pisa, Italy, in 1991 and 1992 respectively. From 1992 to 1995 he was with the Department of Information Engineering of the University of Pisa, where he received the Ph.D. degree in electrical engineering. In September 1996 he joined the Centro Studi Metodi e Dispositivi per Radiotrasmissioni (CSMDR) of the Italian National Research Council (CNR) in Pisa where he held the position of Research Assistant. Since 2001 he has been with the Department of Information Engineering of the University of Pisa where he is currently an Associate Professor of Telecommunications. His research interests are in wireless communication theory, with emphasis on synchronization algorithms and channel estimation in multiple-access communication systems. Nevio Benvenuto received the Laurea degree from the University of Padova, Padova, Italy, and the Ph.D. degree from the University of Massachusetts, Amherst, in 1976 and 1983, respectively, both in electrical engineering. From 1983 to 1985 he was with AT&T Bell Laboratories, Holmdel, NJ, working on signal analysis problems. He spent the next three years alternating between the University of Padova, where he worked on communication systems research, and Bell Laboratories, as a Visiting Professor. From 1987 to 1990, he was a member of the faculty at the University of Ancona. He was a member of the faculty at the University of L'Aquila from 1994 to 1995. Currently, he is a Professor in the Electrical Engineering Department, University of Padova. His research interests include voice and data communications, digital radio, and signal processing. Silvano Pupolin received the Laurea degree in Electronic Engineering from the University of Padova, Italy, in 1970. Since then he joined the Department of Information Engineering, University of Padova, where currently is Full Professor of Electrical Communications. He was Chairman of the Faculty of Electronic Engineering from 1990 to 1994, Chairman of the PhD Course in Electronics and Telecommunications Engineering from 1991 to 1997 and Director of the PhD School in Information Engineering from 2004. Also, he was member of the programming and development committee from 1997 to 2002 and member of Scientific Committee from 1996 to 2001 of the University of Padova; member of the budget Committee of the Faculty of Engineering from 2003. He has been actively engaged in research on: Digital communication systems over copper wires and fiber optics; Spread spectrum communication systems; Design of large reliable communications networks; Effects of phase noise and HPA nonlinearities in OFDM systems; 3G mobile radio communications systems (UTRA-FDD and TDD) and beyond 3G (OFDM modulation and MC CDMA); Packet radio, Ad-hoc networks with the use of Bluetooth and WLAN. He was Chairman of the 9-th and 10-th Tyrrhenian International Workshop on Digital Communications devoted to “Broadband Wireless Communications” and to “Multimedia Communications”, respectively, and he was General Chair of the 7th International Symposium on Wireless Personal Multimedia Communications (WPMC'04). He spent the summer 1985 at AT&T Bell Laboratories on leave from Padova, doing research on digital radio systems. He was Principal investigator for research projects entitled “Variable bit rate mobile radio communication systems for multimedia applications”, “OFDM Systems with Applications to WLAN Networks”, and “MC-CDMA: an air interface for the 4th generation of wireless systems”.     

Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors

Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.     

Opamp gain insensitive MASH sigma delta modulator for wide bandwidth applications

This work presents a means to enhance the immunity of non-ideal opamp gain effect of the fourth order multi-stage noise shaped (MASH) sigma-delta modulator (SDM) for wide bandwidth applications. The first stage of the SDM is a low-distortion single-loop second order SDM, while the second stage is a low-distortion interpolative second order SDM with Chebyshev type II filter technique. Theoretically, the conventional MASH SDM is impacted by the nonlinear finite gain of the operational amplifier. This impact may have two main phenomena. First, it leaks the incompletely corrected quantization error to the output. Secondly, the nonlinearity causes the harmonic distortion of the input signal. The proposed architecture can reduce the distortion and the sensitivity of the nonlinear finite opamp gain to improve the performance by using low-distortion technique in the MASH SDM. Furthermore, the lower power budget and simplified digital cancellation logic can be achieved. The experimental results indicate that the dynamic range (DR) can reach 87dB with power dissipation of 65 mW. A test SDM chip for Asymmetric Digital Subscriber Line (ADSL) application is designed and implemented by TSMC 0.25 um 1P5M process. Jen-Shiun Chiang was born in Taichung Taiwan, ROC in 1960. He received the B.S. degree in electronics engineering from Tamkang University, Taipei, Taiwan in 1983. In 1988, he received the M.S. degree in electrical engineering from University of Idaho, Moscow Idaho, USA. In 1992, he received the Ph.D. degree in the electrical engineering from Texas A & M University, College Station Texas, USA. He joined the faculty member of the Department of Electrical Engineering at Tamkang University in 1992. Currently, he is a Professor and Department Chair of the Department of Electrical Engineering at Tamkang University. Dr. Chaings research interest includes computer arithmetic, computer architecture, digital signal processing for VLSI architecture, architecture for image data compressing, analog to digital data conversion, and low power circuit design. Hsin-Liang Chen was born in Taipei, Taiwan, in 1974. He received the B.S. degree and M.S. degree in the electrical engineering from Tamkang University, Taipei, Taiwan, in 1997 and 2003, respectively. He is currently working toward the Ph.D. degree at Tamkang University. His research interest focuses on mixed-signal CMOS circuit, sigma delta ADC, and low power circuit.     

Design of Square-Root Domain Filters

In this paper, a square-root domain band-pass filter and biquad filter which are based on the MOSFET square law are proposed. Both of the square-root domain filters operated at 2.5 V supply voltage are constituted by current mirrors, current-mode square-root circuits and capacitors. The circuits presented have been simulated and fabricated using 0.25 m CMOS process. Both of simulation and measured results which are in good agreement indicate that the center frequency f₀ is not only attainable at megahertz frequencies but also tunable electronically. The proposed circuits have the merits of high frequency operation, tuneability, low power supply voltage operation, low third order intermodulation distortion and low total harmonic distortion.Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C.Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000.His current researches include current-mode circuits design, analog IC design and VLSI circuit design.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design.Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively.Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang, Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordón, F. Herrera, and L. Magdalena, Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits {&} Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002.     

Programmable CNN Analogue Chip for RD-PDE Multi-Method Simulations

Cellular Non Linear Networks can be useful applied for the solution of several types of Partial Differential Equations (PDEs). This paper will describe an analogue circuit implementation for the simulation of one-dimensional Reaction-Diffusion PDE with the possibility to set different boundary conditions as well as to select different discretization methodologies. Fausto Sargeni was born in Riano (ROMA) in 1961. He received the Dipl. Eng. degree in Electronic Engineering at the University of Rome “La Sapienza" in 1987. In 1989 he jointed the Dept. of Electronic Engineering at the University of Rome “Tor Vergata" as Assistant Professor. In 1998 he became Associate Professor. His research interests include analog VLSI circuits for non linear circuits and high-speed interconnections. Vincenzo Bonaiuto was born in Rome, Italy, in 1962. He received the Dipl. Eng. degree in Electronic Engineering at the University of Rome “La Sapienza". In 1997 he received the the Ph.D. in Telecommunication and Microelectronics. In 1996 he jointed the Electronic Engineering Dept. as Assistant Professor at the University of Rome “Tor Vergata” and, in 2002, he became Associate Professor. His main research interests are in the area of non linear circuits, Artificial Neural Networks analogue/digital VLSI circuits implementation.     

Interference Mitigation on WLANs Using Smart Antennas

This paper investigates the performance of a fixed Wireless LAN in which nodes are equipped with fully adaptive smart antennas. The considered smart antenna system is a uniform circular array of microstrip patch elements in which the weights are updated using the unconstrained LMS algorithm. The behavior of a new directional MAC protocol for spatial multiplexing is analyzed and compared with IEEE 802.11 DCF. The paper purpose is the evaluation of interference and multipath effects on SDMA, using realistic models for the channel and for the smart antenna system. The link model takes into account path loss, cochannel interference and multipath, using a modified Jakes model. Results show that the performance of the WLAN are strictly dependent on the interferer characteristics and on the angular spread of the channel. Fulvio Babich was born in Trieste, Italy. He received the doctoral degree in electrical engineering, from the University of Trieste, in 1984. From 1984 to 1987 he was with the Research and Development Department of Telettra (Vimercate), working on optical communications. From 1987 to 1992 he was with Research and Development Department of Zanussi (Zeltron), where he held the position of Company Head in the Home System European projects. In 1992, he joined the Department of Electrical Engineering (DEEI) of the University of Trieste, where he is associate professor of digital communications. His current research interests are in the field of wireless networks and personal communications. Massimiliano Comisso was born in Trieste, Italy. He received the degree of “Laurea" in Electronic Engineering from the University of Trieste. Currently, he is a PhD student at the Department of Electrical Engineering (DEEI) at University of Trieste in information technology. His research interests include wireless networks, adaptive arrays and small antennas. Marco D'Orlando was born in Tolmezzo, Italy, in September 1978. He received the Electronic Engineering degree (summa cum laude) from the University of Trieste, Italy, in December 2003. He is currently working toward the Ph.D. degree in the Department of Electrical and Electronic Engineering (DEEI) at University of Trieste. His research interests are in the field of multimedia communications, networking, joint source channel coding and resource allocation. Lucio Manià was born in Ronchi dei Legionari, Italy, in 1942. He received the Electronic Engineering degree from the University of Trieste, Italy, in 1968. Since 1970 he has been an Assistant Professor with the Department of Electrical and Electronic Engineering, where he is currently an Associate Professor. From 1975 to 1985 he was a consulting engineer with Co.El. S.p.A., where he was involved in antenna design for FM and TV broadcasting systems. His current scientific interests include electromagnetic compatibility for safety purposes, wireless communications and numerical techniques for electromagnetic simulations.     

Interactive Content-aware Video Streaming System with Fine Granularity Scalability

Video streaming with varying transmission bandwidth is becoming increasingly important. In this paper, an interactive video streaming system is proposed. Fine Granularity Scalability (FGS) is applied to be the streaming video format. The computational complexity of FGS coding is analyzed to explore an efficient FGS implementation. A new transmission model is proposed for the realization of a content-aware video streaming. At encoder side, the current MPEG-4 FGS coding flow is reordered such that the picture-level maximum can be acquired in advance and bit-plane data can be dynamically adapted. With these proposed hardware-oriented optimization approaches, a hardwired FGS block-level processing core is proposed to achieve a cost-effective solution to FGS implementation. The streaming server can adaptively decide quality-enhanced region by selective enhancement according to both object information from encoding side and user-defined region from receiver side. From the simulation results, it’s demonstrated that the proposed approach can provide better quality in users’ interest regions with no bit-rate or complexity overhead. Yung-Chi Chang was born in Kaohsiung, Taiwan, R.O.C., in 1975. He received the B.S., M.S., and Ph.D. degrees from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 1998, 2000, and 2005, respectively. He serves as senior engineer in SoC Solutions Dept., Vivotek Inc. now. His research interests include video coding algorithms and VLSI architectures for image/video processing. Chih-Wei Hsu was born in Taipei, Taiwan, in 1979. He received the B.S.E.E and M.S.E.E degrees from National Taiwan University (NTU), Taipei, in 2001 and 2003, respectively. He joined MediaTek, Inc., Hsinchu, Taiwan, in 2003, where he develops integrated circuits related to multimedia coding standard and digital consumer devices. His research interests include video coding, video processing and VLSI design. Wei-Min Chao was born in Taoyuan, Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degrees from the Department of Electronics Engineering, National Taiwan University in 2000 and 2002 separately. His research interests include video coding algorithms and VLSI architecture for image and video processing. Liang-Gee Chen was born in Yun-Lin, Taiwan, in 1956. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1979, 1981, and 1986, respectively. He was an Instructor (1981–1986), and an Associate Professor (1986–1988) in the Department of Electrical Engineering, National Cheng Kung University. In the military service during 1987 to 1988, he was an Associate Professor in the Institute of Resource Management, Defense Management College. In 1988, he joined the Department of Electrical Engineering, National Taiwan University. During 1993 to 1994 he was a Visiting Consultant of DSP Research Department, AT&T Bell Lab, Murray Hill. In 1997, he was a visiting scholar of the Department of Electrical Engineering, University of Washington, Seattle. During 2001 to 2004, he was the first director of the Graduate Institute of Electronics Engineering (GIEE) in National Taiwan University (NTU). Currently, he is a Professor of the Department of Electrical Engineering and GIEE in NTU, Taipei, Taiwan. He is also the director of the Electronics and Optoelectronics Research Laboratories in Industrial Technology Research Institute, Hsinchu, Taiwan. His current research interests are DSP architecture design, video processor design, and video coding systems. Dr. Chen has served as an Associate Editor of IEEE Transactions on Circuits and Systems for Video Technology since 1996, as Associate Editor of IEEE Transactions on VLSI Systems since 1999, and as Associate Editor of IEEE Transactions on Circuits and Systems II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the Proceedings of the IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001–2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.     

New Paradigms in Wireless Communication Systems

This paper discusses what a new paradigm can be in wireless communication systems of the twenty-first century. First, it suggests two directions for the new paradigm; one is “micro- and nano-device communication system” which is the projected scenario considering that the entities in source and destination have been shrinking throughout the history of wireless communication systems. The second direction is “networked robot system”, which emerges as a natural extension of mobile ad hoc networking where the networking is closely related to motion control of robots. Secondly, it shows two interesting research topics, “the new communication protocol design” and “signal processing”, respectively, that arise in the wake of the fusion between the two directions in the novel communication paradigm. Finally, it considers a new science of wireless communications in the twenty-first century. Shinsuke Hara received the B.Eng., M.Eng. and Ph.D. degrees in communications engineering from Osaka University, Osaka, Japan, in 1985, 1987 and 1990, respectively. From April 1990 to March 1997, he was an assistant professor in the Department of Communication Engineering, School of Engineering, Osaka University, and from October 1997 to September 2005, he was an associate professor in the Department of Electronic, Information and Energy Engineering, Graduate School of Engineering, Osaka University. Since October 2005, he has been a professor in the Department of Physical Electronics and Informatics, Graduate School of Engineering, Osaka City University. In addition, from April 1995 to March 1996, he was a visiting scientist at Telecommunications and Traffic Control Systems Group, Delft University of Technology, Delft, The Netherlands. His research interests include wireless communications systems and digital signal processing. Hiroyuki Yomo received B.S. degree in communication engineering from Department of Communication Engineering, Osaka University, Osaka, Japan, in 1997, and M.S. and Ph.D. degrees in communication engineering from Department of Electronic, Information, and Energy Engineering, Graduate School of Engineering, Osaka University, Osaka Japan, in 1999 and 2002, respectively. From April 2002 to March 2004, he was a Post-doctoral Fellow in Department of Communication Technology, Aalborg University, Denmark. From April 2004 to September 2004, he was at Internet System Laboratory, NEC Corporation, Japan. Since October 2004, he has been an Assistant Research Professor in Center for TeleInfrastructure (CTIF), Aalborg University, Denmark. His main research interests are access technologies, radio resource management, and link-layer techniques in the area of short-range communication, cellular network, cognitive radio, and sensor network. Petar Popovski received the Dipl.-Ing. in electrical engineering and M.Sc. in communication engineering from the Faculty of Electrical Engineering, Sts. Cyril and Methodius University, Skopje, Republic of Macedonia, in 1997 and 2000, respectively. He received a Ph.D. degree from Aalborg University, Denmark, in 2004. From 1998 to 2001 he was a teaching and research assistant at the Institute of Telecommunications, Faculty of Electrical Engineering in Skopje. He is currently Assistant Professor at the Department of Communication Technology at the Aalborg University. His research interests are related to the PHY-MAC aspects of wireless protocols, wireless sensor networks, random access protocols, and network coding. Kazunori Hayashi received the B.E., M.E. and Ph.D. degrees in communication engineering from Osaka University, Osaka, Japan, in 1997, 1999 and 2002, respectively. He spent 3 months in 2000 at Aalborg University, Denmark, as a Visiting Scholar. Since 2002, he has been with the Department of Systems Science, Graduate School of Informatics, Kyoto University. He is currently an Assistant Professor there. His research interests include digital signal processing for communications systems.     

Channel Estimation by Using Short Training Sequences in CDMA Systems

Multiuser detection techniques are known to be effective to counter the presence of multiuser interference in code division multiple access channels. Multiuser detectors can provide excellent performance only when the channel impulse responses of all the users are precisely known. Hence, channel estimation becomes a challenging issue in mobile communication systems. In this paper, we address the problem of efficient maximum likelihood mobile radio channel estimation at high channel efficiency that requires a short training sequence along with the known spreading sequence. The proposed system can be employed in both the uplink and downlink of a heavily loaded multiuser CDMA system. The extension of the approach with unknown users' delays are also proposed. We present results that show the success of this method in recovering the transmitted bits with a relatively small number of preamble bits. Ahmet Rizaner was born in Larnaca, Cyprus, on January 31, 1974. He received the B.S. and M.S. degrees in Electrical and Electronics Engineering from the Eastern Mediterranean University, Famagusta, North Cyprus, in 1996 and 1998, respectively. He completed his PhD. degree in Electrical and Electronic Engineering in Eastern Mediterranean University and joined Eastern Mediterranean University as a lecturer in 2004. He is lecturing in the School of Computing and Technology. His main research interests include CDMA communications, adaptive channel estimation, and multiuser detection techniques. Hasan Amca was born in 1961 in Nicosia-Cyprus. He graduated from the Higher Technological Institute in Magosa-Cyprus (which is renamed later as Eastern Mediterranean University). He joined EMU in 1985 after receiving a M.Sc. (Digital Signal Processing) degree from the University of Essex in England (1985). He took his Ph.D. (Mobile Communications) from the University of Bradford where he was on a Commonwealth scholarship. He has been teaching in the Electrical and Electronic Engineering Department of Eastern Mediterranean University since 1993 where he also served as the vice chairman from Spring 1998 to Spring 2000. He has been appointed as the Director of the School of Computing and Technology of the EMU since Spring 2000. His research interests include Multi User Detection of CDMA signals, Adaptive Equalisation, Multi Carrier Systems, Mobile Radio Systems and Networks, Internet and Information Technology Applications in Education. Kadri Hacıoğlu was born in Nicosia, Cyprus. He received the B.Sc., M.Sc., and Ph.D. degrees in electrical and electronic engineering from the Middle East Technical University, Ankara, Turkey, in 1980, 1984, and 1990, respectively. After his two-year military service, in 1992, he joined the faculty of Eastern Mediterranean University, Magosa, North Cyprus, as an Assistant Professor, and became an Associate Professor in 1997. While there, he taught several classes on electronics, digital communications, speech processing and neural networks. During this time, he conducted research on applying fuzzy logic, neural networks, and genetic algorithms to signal processing and communications problems. From 1998 to 2000, he was a Visiting Professor in the Department of Computer Science, University of Colorado, Boulder. Here, he taught classes on neural networks and continued his research. Since 2000, he has been a Research Associate at the Center for Spoken Language Research, University of Colorado. He has authored or coauthored numerous papers and supervised a dozen M.Sc./Ph.D. theses. His current research interests are concept-based language modeling, speech understanding, natural language generation, and search methods in speech recognition/understanding. He also does research on multiuser detection and equalization in CDMA systems. Ali Hakan Ulusoy was born in Eskişehir, Turkey, on June 3, 1974. He graduated from the double major program of the department of Electrical and Electronic Engineering and department of Physics in Eastern Mediterranean University as the first rank student of Faculty of Engineering in 1996. He received his M.S. degree in Electrical and Electronic Engineering in Eastern Mediterranean University in 1998. He completed his PhD. degree in Electrical and Electronic Engineering in Eastern Mediterranean University and joined Eastern Mediterranean University as a lecturer in 2004. He is lecturing in the School of Computing and Technology. His current research interests include receiver design, multi-user detection techniques, blind and trained channel estimation in Code Division Multiple Access (CDMA).     

Voltage-Mode Universal Biquadratic Filters with One Input and Five Outputs

Four new voltage-mode universal biquadratic filters each with one input terminal and five output terminals are presented. Each of the first two proposed circuits uses four plus-type second-generation current conveyors, two grounded capacitors and five resistors. The third proposed circuit employs two plus-type second-generation current conveyors, one differential voltage current conveyor, two grounded capacitors and five resistors. The fourth proposed circuit employs two multi-output second-generation current conveyors, two grounded capacitors and five resistors. Each of the proposed circuits can realize all the standard filter functions; highpass, bandpass, lowpass, notch and allpass, simultaneously, without changing the passive elements. The proposed circuits enjoy the features of orthogonal controllable of resonance angular frequencies and quality factors, using only grounded capacitors as well as low active and passive sensitivities. Jiun-Wei Horng was born in Tainan, Taiwan, Republic of China, in 1971. He received the B.S. degree in Electronic Engineering from Chung Yuan Christian University, Chung-Li, in 1993, and the Ph.D. degree from National Taiwan University, Taipei, in 1997. From 1997 to 1999, he served as a Second-Lieutenant in China Army Force. From 1999 to 2000, he joined CHROMA ATE INC. where he worked in the area of video pattern generator technologies. From 2000 to 2005, he joined the Department of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan as an Assistant Professor. Since 2005, he is an Associate Professor. His teaching and research interests are in the areas of Circuits and Systems, Analog and Digital Electronics, Active Filter Design and Current-Mode Signal Processing. Chun-Li Hou was born in Taipei, Taiwan, Republic of China, in 1951. He received the B.S. degree, M.S. degree, and Ph.D. degree in Electrical Engineering from National Taiwan University, Taipei, in 1974, 1976, and 1991, respectively. From 1977 to 1979, he taught as a lecture in Tamkang College. From 1981 to 1991, he taught as a lecture in the department of Electronic Engineering, Chung-Yuan Christian University, Chung, Taiwan. From 1992 until now, he taught there as an Associate Professor. His teaching and research interests are in the areas of Current-Mode Analog Circuit Analysis and Design, Active Network Synthesis Circuit theory and Applications. Chun-Ming Chang obtained his bachelor and master degrees, both in the field of electrical engineering, from National Cheng Kung University, Tainan, Taiwan, R.O. China, and his Ph.D. degree in the field of electronics and computer science from the University of Southampton, U.K. He had been an associate professor in Chung Yuan Christian University in Taiwan from 1985 to 1991, and has been a full professor in the same University since 1991. His research interest is divided by two relative fields, network synthesis before 1991 and analog circuit design after 1991. He had been a chairman of the electrical engineering department in Chung Yuan Christian University from 1995 to 1999. Recently, he was recommended for inclusion in The Contemporary Who's Who of Professionals 2004 Edition, and nominated by the Governing Board of Editors of the American Biographical Institute for the prestigious title MAN OF THE YEAR-2005, and became an Advisor of the ABI's distinguished RESEARCH BOARD OF ADVISORS due to the invention of Analytical Synthesis Method and OTA-Only-Without-C Circuits in the field of analog circuit design. Wen-Yaw Chung was born in Hsin-Chu, Taiwan, R.O.C., 1957. He received the B.S.E.E. and M.S. degrees from Chung Yuan Christian University, Chung Li, Taiwan, in 1979 and 1981 respectively, and the Ph.D. degree in Electrical and Computer Engineering from Mississippi State University, USA, in 1989. Subsequently, he joined the Advanced Microelectronics Division, Institute for Technology Development in Mississippi, where he was involved in the design of a bipolar optical data receiver. In 1990 he worked as a design manager for the Communication Product Division, United Microelectronics Corporation, Hsin-Chu, where he was involved in the design of analog CMOS data communication integrated circuits. Since 1991 he has been an Associate Professor in the Department of Electronic Engineering at Chung Yuan Christian University. His research interests include mixed-signal VLSI design, biomedical IC applications, sensor and actuator interfacing for deep submicron VLSI electronics.     

An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System

In this paper, the bitstream parsing analysis and an efficient and flexible bitstream parsing processor are presented. The bitstream parsing analysis explores the critical part in bitstream parsing. Based on the result, the novel approaches to parse data partitioned bitstreams are presented. An efficient instruction set optimized for bitstream processing, especially for DCT coefficient decoding, is designed and the processor architecture can be programmed for various video standards. It has been integrated into an MPEG-4 video decoding system successfully and can achieve real time bitstream decoding with bitstream coded under 4CIF frame size with 30 fps, 8Mbps, which is the specification of MPEG-4 Advanced Simple Profile Level 5.Yung-Chi Chang was born in Kaohsiung, Taiwan, R.O.C., in 1975. He received the B.S. and M.S. degrees from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 1998 and 2000, respectively, where he is currently pursuing the Ph.D. degree in the Graduate Institute of Electrical Engineering. His research interests include video coding algorithms and VLSI architectures for image/video processing.Chao-Chih Huang was born in Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degree in electrical engineering from National Taiwan University in 2000 and 2002, respectively. In Oct 2002, he has joined the multimedia team of Realtek Taiwan, to be a system design engineer and researched on video coding algorithms. His research interests include video compression/coding and image processing.Wei-Min Chao was born in Taoyuan, Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degrees from the Department of Electronics Engineering, National Taiwan University in 2000 and 2002 separately. His research interests include video coding algorithms and VLSI architecture for image and video processing.Liang-Gee Chen was born in Yun-Lin, Taiwan, in 1956. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1979, 1981, and 1986, respectively. He was an Instructor (1981–1986), and an Associate Professor (1986–1988) in the Department of Electrical Engineering, National Cheng Kung University. In the military service during 1987 to 1988, he was an Associate Professor in the Institute of Resource Management, Defense Management College. In 1988, he joined the Department of Electrical Engineering, National Taiwan University. During 1993 to 1994 he was a Visiting Consultant of DSP Research Department, AT&T Bell Lab, Murray Hill. In 1997, he was a visiting scholar of the Department of Electrical Engineering, University of Washington, Seattle. During 2001 to 2004, he was the first director of the Graduate Institute of Electronics Engineering (GIEE) in National Taiwan University (NTU). Currently, he is a Professor of the Department of Electrical Engineering and GIEE in NTU, Taipei, Taiwan. He is also the director of the Electronics Research and Service Organization in Industrial Technology Research Institute, Hsinchu, Taiwan. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE Transactions on Circuits and Systems for Video Technology since 1996, as Associate Editor of IEEE Transactions on VLSI Systems since 1999, and as Associate Editor of IEEE Transactions on Circuits and Systems II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the Proceedings of the IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001–2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.