A fully integrated V-band PLL MMIC using 0.15-/spl mu/m GaAs pHEMT technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.     

A 1-17-GHz InGaP-GaAs HBT MMIC analog multiplier and mixer with broad-band input-matching networks

An InGaP-GaAs heterojunction bipolar transistor (HBT) analog multiplier/mixer monolithic microwave integrated circuit (MMIC) is developed that adopts a Gilbert-cell multiplier with broad-band input-matching networks to widen the bandwidth up to 17 GHz. This MMIC was fabricated using a commercially available 6-in InGaP-GaAs HBT MMIC process. It achieved a measured sensitivity of above 1100 V/W for an analog multiplier and a conversion gain of better than 9 dB for a mixer. It also demonstrated a lower corner frequency and noise than that of an InP HBT analog multiplier. The measured low-frequency noise was 10 nV/sqrt(Hz), which is about half of that of an InP HBT analog multiplier with a similar architecture. The corner frequency of the low-frequency noise was roughly estimated to be 15 kHz. The measured performance of this MMIC chip with gain-bandwidth-product (GBP) of 47 GHz rivals that of the reported GaAs-based analog multipliers and mixers. The high GBP result achieved by this chip is attributed to the HBT device performance and the broad-band input-matching network.     

60-GHz monolithic down- and up-converters utilizing asource-injection concept

This paper deals with the design considerations, fabrication process, and performance of coplanar waveguide (CPW) heterojunction FET (HJFET) down- and up-converter monolithic microwave integrated circuits (MMIC's) for V-band wireless system applications. To realize a mixer featuring a simple structure with inherently isolated ports, and yet permitting independent port matching and low local oscillator (LO) power operation, a “source-injection” concept is utilized by treating the HJFET as a three-port device in which the LO signal is injected through the source terminal, the RF (or IF) signal through the gate terminal, and the IF (or RF) signal is extracted from the drain terminal. The down-converter chip incorporates an image-rejection filter and a source-injection mixer. The up-converter chip incorporates a source-injection mixer and an output RF filter. With an LO power and frequency of 7 dBm and 60.4 GHz, both converters can operate at any IF frequency within 0.5-2 GHz, with a corresponding conversion gain within -7 to -12 dB, primarily dominated by the related filter's insertion loss. Chip size is 3.3 mm×2 mm for the down-converter, and 3.5 mm×1.8 mm for the up-converter     

Analysis and Design of a Novel $times$4 Subharmonically Pumped Resistive HEMT Mixer

In this paper, a novel topology of an HEMT-based subharmonically pumped resistive mixer (SHPRM) is presented, i.e., the times4SHPRM. The presented topology requires only a quarter of the local oscillator (LO) frequency compared to a fundamentally pumped mixer (e.g., 15 instead of 60 GHz in a 60-GHz system). This reduction in required LO frequency provides a significant reduction in complexity of the overall radio front-end and reduces the dc power consumption as well as the occupied chip area. Thus, the times4SHPRM provides a significant cost reduction for a millimeter-wave system. Furthermore, the times4SHPRM can be used for both up- and down-conversion and it can be implemented in any field-effect transistor technology. The principle of the times4SHPRM is presented and wave analysis is applied in order to investigate the fundamental limitations of this mixer topology. For an evaluation of the times4SHPRM topology, three different monolithic microwave integrated circuits (MMICs) were designed and manufactured in the same MMIC metamorphic HEMT technology. Besides measured performance of the times4SHPRM, a traditional times2SHPRM and a single-ended resistive mixer were implemented and their performances are presented and compared. All of these MMICs operate with a 60-GHz RF frequency and employ LO signals close to 15, 30, and 60 GHz, respectively.     

MMIC毫米波倍频器的研究

在介绍倍频器工作原理、各种实现方法及其优缺点的基础上,阐明了采用MMIC(单片微波集成电路)工艺实现高性能、高可靠性、小型化毫米波倍频器芯片的技术特点及应用需求,比较了单管和平衡两种不同结构MMIC毫米波倍频器的优点与不足,全面综述了国内外对MMIC毫米波倍频器的研究情况,介绍了MMIC毫米波倍频器的最新研究进展,展望了MMIC毫米波倍频器的发展趋势,提出了一些建议。     

Very high efficiency V-band power InP HEMT MMICs

State-of-the-art power performance of a V-band InP HEMT MMIC is reported using a slot via process for reducing source inductance and a fully selective gate recess process for uniformity and high yield. The 0.1 μm gate length, high performance InGaAs/InAlAs/InP HEMTs that were utilized in the circuit exhibited a maximum power density of 530 mW/mm, power added efficiency of 39%, and a gain of 7.1 dB. At 60 GHz, a single-stage monolithic power amplifier achieved an output power of 224 mW with a PAE of 43%. The associated gain was 7.5 dB. These results are the best combination of output power and efficiency reported for an InP device and a MMIC at V-band, and clearly demonstrates the potential of the InP HEMT technology for very high efficiency, millimeter wave power applications     

Development and evaluation of a GaAs MMIC phase-locked loop chipset for space applications

GaAs monolithic microwave integrated circuit (MMIC) chips designed for a phase-locked loop frequency source to be used in space applications have been developed. The chip set includes a three-stage resistive feedback amplifier with 13-dB gain in a 275 MHz to 5.85 GHz bandwidth, a 2.0-GHz voltage-controlled oscillator, a 2.8-GHz digital prescaler, and a VHF/UHF digital phase/frequency discriminator. Both analog and buffered-FET logic digital circuits were fabricated on the same wafer. The MMIC process which was developed for this application comprises molecular beam epitaxial deposition of the active layer, proton isolation, submicron gates, thin film TaN resistor deposition, and silicon nitride passivation. The chip set was used successfully to implement a 2.0 GHz all-GaAs phase-locked loop     

Design of high-power, high-efficiency 60-GHz MMICs using animproved nonlinear PHEMT model

This work describes the design and nonlinear modeling of two V-band monolithic microwave integrated circuit (MMIC) power amplifiers using a nonlinear high electron mobility transistor (HEMT) model developed specifically for very short gate length pseudomorphic HEMTs (PHEMTs). Both circuits advance the state-of-the-art of V-band power MMIC performance. The first, a single-ended design, produced 293 mW of output power with a record 26% power-added efficiency (PAE) and 9.9 dB of power gain at 62.5 GHz when measured on-wafer. The second MMIC, a balanced design with on-chip input and output Lange couplers for power combining, generated a record 564 mW of output power (27.5 dBm) with 21% PAE and 9.8 dB power gain. The MMIC's are passivated, thinned to 2 mils, and down-biased to 4.5 V for high reliability space applications. These excellent first-pass MMIC results are attributed to the use of an optimized 0.1-/μm PHEMT cell structure and a design based on millimeter-wave on-wafer device characterization, together with a new and very accurate large signal analytical FET model developed for 0.1-/μm PHEMTs     

A highly integrated wideband millimeter-wave MMIC converter using0.25-μm P-HEMT technology

A highly integrated wideband converter that was designed to upconvert the entire 6- to 18-GHz input RF frequency band to a 22-GHz intermediate frequency using a 28- to 40-GHz local oscillator (LO) is described. The circuit was designed using 0.25-μm pseudomorphic HEMT technology. The converter incorporates a three-stage RF amplifier, a three-stage LO amplifier, and an active balanced mixer, all integrated on a chip 96 mil×96 mil in size. The upconverter monolithic microwave integrated circuit (MMIC) has an average of 10-dB conversion gain across the full 6-18-GHz input band     

A 77 GHz mHEMT MMIC Chip Set for Automotive Radar Systems

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 µm gate‐length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4‐inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2 mm × 2 mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1 mm × 2 mm. The frequency doubler achieved an output power of –6 dBm at 76.5 GHz with a conversion gain of ?16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2 mm × 1.2 mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W‐band.     

基于RC-CR多相网络的镜频抑制接收机MMIC

基于RC-CR多相网络技术研制了一款S波段镜频抑制接收机单片微波集成电路(MMIC),在MMIC芯片上集成S波段低噪声放大器(LNA)、差分IQ混频器、本振(LO)驱动放大器、RC-CR多相网络滤波器等电路单元,实现了S波段单片镜频抑制接收机,解决了镜频接收机小型化的问题.电路、电磁场软件仿真以及采用GaAs赝配高电子迁移率晶体管(PHEMT)工艺流片后的结果表明,在S波段实现了噪声系数小于1.8 dB,增益大于12 dB,中频(150±5) MHz带内镜频抑制大于35 dBc的技术指标.MMIC的芯片尺寸为4.8 mn×2.5 mm×0.07 mm.此镜频抑制接收机MMIC具有指标优异、体积小、集成度高的特点,可广泛用于各种需小型化的相控阵雷达和通信系统中.     

A small chip size 2 W, 62% efficient HBT MMIC for 3 V PCNapplications

This work describes the L-band low voltage (⩾1.6 V) power performance of AlGAs/GaAs heterojunction bipolar transistors (HBTs), their modeling and the design of a 2-W monolithic microwave integrated circuit (MMIC) for 3-V wireless mobile PCN applications (1800 MHz). The two-stage MMIC achieves 62% power-added efficiency (PAE) and 33 dB of linear gain, at a very small chip size of 1.2 mm². To our knowledge this is the best combination of power performance data for wireless applications demonstrated so far for a MMIC. The chip size is about a factor of four smaller than comparable MMIC's known before. The MMIC offers the potential both for low cost production due to small chip size, single voltage supply, and high performance at the same time     

A W-band subharmonically pumped monolithic GaAs-based HEMT gate mixer

A W-band high electron mobility transistor (HEMT) subharmonically pumped (SHP) gate mixer is designed with fixed LO frequency operation. it is fabricated on a 4-mil substrate using 0.15-/spl mu/m GaAs pHEMT monolithic microwave integrated circuit (MMIC) process. the on-wafer measurement results show that the best conversion loss is about 4.7 dB in the W-band, as a 11-dbm 42-GHz low observable (LO) signal is pumped. To our knowledge, this is the first result on low conversion-loss W-band MMIC SHP HEMT gate mixer.     

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

Millimeter Wave MMIC Low Noise Amplifiers Using a 0.15 µm Commercial pHEMT Process

This paper presents millimeter wave monolithic microwave integrated circuit (MMIC) low noise amplifiers using a 0.15 µm commercial pHEMT process. After carefully investigating design considerations for millimeter-wave applications, with emphasis on the active device model and electomagnetic (EM) simulation, we designed two singleended low noise amplifiers, one for Q-band and one for V-band. The Q-band two stage amplifier showed an average noise figure of 2.2 dB with an 18.3 dB average gain at 44 GHz. The V-band two stage amplifier showed an average noise figure of 2.9 dB with a 14.7 dB average gain at 65 GHz. Our design technique and model demonstrates good agreement between measured and predicted results. Compared with the published data, this work also presents state-of-the-art performance in terms of the gain and noise figure.     

K波段单片接收机设计

基于0.15μm GaAs PHEMT工艺,设计了一款K波段MMIC接收机,频率覆盖19～26 GHz。在单个芯片内集成了平衡式低噪声放大器、本振驱动放大器、镜像抑制次谐波混频器等电路。在19～26 GHz射频输入带宽内的转换增益为7 dB;噪声系数典型值为4 dB;输入回波损耗-12 dB;镜像抑制15 dB;本振-射频隔离度55 dB。为了降低了芯片成本,采用电磁场仿真软件对电路面积做优化设计,使得芯片面积仅为2 mm×4 mm。此接收机MMIC具有集成度高、可靠性高、体积小等特点,可广泛应用于各种微波通信系统和雷达系统。     

A D‐Band Balanced Subharmonically‐Pumped Resistive Mixer Based on 100‐nm mHEMT Technology

A D‐band subharmonically‐pumped resistive mixer has been designed, processed, and experimentally tested. The circuit is based on a 180° power divider structure consisting of a Lange coupler followed by a λ/4 transmission line (at local oscillator (LO) frequency). This monolithic microwave integrated circuit (MMIC) has been realized in coplanar waveguide technology by using an InAlAs/InGaAs‐based metamorphic high electron mobility transistor process with 100‐nm gate length. The MMIC achieves a measured conversion loss between 12.5 dB and 16 dB in the radio frequency bandwidth from 120 GHz to 150 GHz with 4‐dBm LO drive and an intermediate frequency of 100 MHz. The input 1‐dB compression point and IIP3 were simulated to be 2 dBm and 13 dBm, respectively.     

A 15-GHz monolithic low-phase-noise VCO using AlGaAs/GaAs HBTtechnology

A 15-GHz fully monolithic low-phase-noise VCO MMIC fabricated without an external tuning element using an AlGaAs/GaAs HBT technology was developed. An HBT and a variable capacitance diode or varactor were fabricated in an MMIC chip using-standard HBT IC process. A tuning range of about 600 MHz was obtained with varying control voltage from 0 to 4 V with an output power of more than -4 dBm. The low phase noise for an offset frequency of 100 kHz of -85 dBc/Hz was measured at a frequency of 15.6 GHz     

30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology

In this paper, a passive down mixer is proposed, which is well suited for short-channel field-effect transistor technologies. The authors believe that this is the first drain-pumped transconductance mixer that requires no dc supply power. The monolithic microwave integrated circuit (MMIC) is fabricated using digital 90-nm silicon-on-insulator CMOS technology. All impedance matching, bias, and filter elements are implemented on the chip, which has a compact size of 0.5 mm/spl times/0.47 mm. The circuit covers a radio frequency range from 30 to 40 GHz. At a RF frequency of 35 GHz, an intermediate frequency of 2.5 GHz and a local-oscillator (LO) power of 7.5 dBm, a conversion loss of 4.6 dB, a single-sideband (SSB) noise figure (NF) of 7.9 dB, an 1-dB input compression point of -6 dBm, and a third-order intercept point at the input of 2 dBm were measured. At lower LO power of 0 dBm, a conversion loss of 6.3 dBm and an SSB NF of 9.7 dB were measured, making the mixer an excellent candidate for low power-consuming wireless local-area networks. All results include the pad parasitics. To the knowledge of the authors, this is the first CMOS mixer operating at millimeter-wave frequencies. The achieved conversion loss is even lower than for passive MMIC mixers using leading edge III/V technologies, showing the excellent suitability of digital CMOS technology for analog circuits at millimeter-wave frequencies.     

Dual-chip GaAs monolithic integration Ku-bandphase-locked-loop microwave synthesizer

Two novel multifunction monolithic chips, GaAs microwave monolithic integrated circuit (MMIC) and large-scale integration (LSI) chips, have been developed to realize an extremely small and lightweight microwave synthesizer. The MMIC includes a voltage-controlled oscillator, a dual-output buffer amplifier, a balun, and dynamic/static prescalers. To integrate these functions on a single chip, each circuit has been drastically reduced in size by utilizing a uniplanar MMIC configuration. The LSI includes a dual-modulus prescalar, programmable counters, and a phase/frequency comparator. By incorporating these two monolithic chips in the structure, a Ku-band microwave synthesizer has been fabricated in an 11-mm×23-mm flat package. The synthesizer to which these multifunction chips were applied had a tuning range broader than 1 GHz in the Ku-band with a flatness within 2 dB_pp. In spite of low-Q monolithic circuitry, single-sideband (SSB) phase noise was as low as -70 dBc/Hz