共查询到20条相似文献,搜索用时 46 毫秒
1.
2.
3.
一种共游程码的测试数据压缩方案 总被引:1,自引:0,他引:1
提出了一种新的基于游程编码的测试数据压缩/解压缩的算法:共游程码(SRLCS)编码,它在使用较短的代码字来代替较长的游程的传统游程编码基础上,进一步充分利用了相邻游程之间的相关性,使用一位来代替与前一游程相同的整个后一游程,这样整个后一游程可以用一位来表示,达到从多位到一位的转换,进一步压缩了测试数据.由于测试数据中存在大量的无关位,对无关位适当的赋值,可以增加连续游程长度相同的概率,提出了一种针对共游程码的无关位填充算法.理论分析和实验结果证明该方案具有高数据压缩率、硬件实现简单等特点. 相似文献
4.
The ever-increasing test data volume and test power consumption are the two major issues in testing of digital integrated circuits. This paper presents an efficient technique to reduce test data volume and test power simultaneously. The pre-generated test sets are divided into two groups based on the number of unspecified bits in each test set. Test compression procedure is applied only to the group of test sets which contain more unspecified bits and the power reduction technique is applied to the remaining test sets. In the proposed approach, the unspecified bits in the pre-generated test sets are selectively mapped with 0s or 1s based on their effectiveness in reducing the test data volume and power consumptions. We also present a simple decoder architecture for on-chip decompression. Experimental results on ISCAS’89 benchmark circuits demonstrate the effectiveness of the proposed technique compared with other test-independent compression techniques. 相似文献
5.
6.
7.
Due to the excessive utilization of memory, data compression is an evergreen research topic. Realizing the constant demand of compression algorithms, this article presents a compression algorithm to analyse the digital VLSI circuits for constraint optimization, such as test data volume, switching power, chip area overhead and processing speed of testing. This article proposes a new power transition X filling based selective Huffman encoding technique, which achieves better data compression, switching power reduction, chip area overhead reduction and speed of testing. The performance of the proposed work is examined with the help of ISCAS benchmark circuits. Initially, the test set is occupied by using the power transition X filling technique to replace the don't care bits and the filled test set is further encoded by selective Huffman encoding technique. The experimental results show that the proposed power transition X filling based selective Huffman encoding gives effective results compared to the related data compression techniques with minimal time and memory consumption. 相似文献
8.
为提高集成电路测试效率,提出一种结合三态信号的改进游程编码压缩方法。先对原始测试集进行部分输入精简处理并填充测试集的无关位,再对经过预处理的测试集根据游程长度进行变长分段处理找出最优段长。按照游程长度的出现频率对最优段长下的参考位设置编码表进行编码压缩,使用三态信号编码标志位并将编码压缩后的测试集存入自动测试设备(ATE),最终通过设计解压电路对ATE中存储的压缩数据进行无损解压。实验结果表明,在硬件开销未明显增加的情况下,该方法的测试数据平均压缩率达到74.39%,优于同类压缩方法。 相似文献
9.
10.
A scheme of test data compression based on coding of even bits marking and selective output inversion 总被引:2,自引:0,他引:2
A new scheme of test data compression/decompression, namely coding of even bits marking and selective output inversion, is presented. It first uses a special kind of codewords, odd bits of which are used to represent the length of runs and even bits of which are used to represent whether the codewords finish. The characteristic of the codewords make the structure of decompressor simple. It then introduces a structure of selective output inversion to increase the probability of 0s. This scheme can obtain a better compression ratio than some already known schemes, but it only needs a very low hardware overhead. The performance of the scheme is experimentally confirmed on the larger examples of the ISCAS89 benchmark circuits. 相似文献
11.
针对SoC测试中的关键问题--测试数据的压缩,提出了一种改进型的FDR码编码方法,称为IFDR码.它将测试序列看做连续的0串和1串,从而用同一种编码方法同时对0游程和1游程进行编码,突破了FDR码仅能对0游程进行编码的限制.通过分析可知IFDR码的解压电路的结构较简单,所需要的额外硬件开销很小;对ISCAS 89标准电路的实验结果表明,与FDR码以及同类型的其他编码方法相比,该编码方法能获得更高的压缩率,从而可以更好地节省测试数据的存储空间和测试应用时间. 相似文献
12.
为抵抗水声信道的传输差错,提出了一种具有较高抗误码能力的水下图像高效编码算法。该算法根据水下图像的特点,对图像进行小波变换预处理以去除其中的视觉冗余。对低频系数采用定长量化编码;对重要高频系数采用数值和位置独立编码的方案,其中对重要高频系数的数值提出了变精度定长量化编码方法,而对重要高频系数的位置采用基于位置差降的可逆变长编码算法。为抵抗水声信道的传输差错,提出了合理的分割、交织策略和变长编码块相对定长信道包的存放策略;对低频和高频系数,分别提出了相应的差错检测和掩盖算法。实验结果表明,提出的算法不仅具有较高的压缩效率,而且具有较高的抗误码能力,满足了水声信道传输图像的要求。 相似文献
13.
《Journal of Systems Architecture》2007,53(11):877-887
A test data compression scheme based on Variable-to-Fixed-Plus-Variable-Length (VTFPVL) coding is presented, by using which the test data can be compressed efficiently. In this scheme, code words are divided into fixed-length head section and variable-length tail section. In order to attain further compression, the highest bit of the tail is omitted from the code words, because all of the highest bits in the tail section of the code words are the same as 1. A special shift counter is also used, which further eases the control circuit. Experimental results of the MinTest fault sets which are part of ISCAS-89 benchmark circuits show that the proposed scheme is obviously better than traditional coding methods in the compression ratio and the implementation of decompression, such as Golomb, FDR, VIHC, v9C coding. 相似文献
14.
15.
A hardware feasible architecture for DCT/DPCM hybrid coding of color television (TV) signals has been developed. The coding system is based on formatting four horizontal scan lines into blocks of the same subcarrier phase elements. The samples in each block are rearranged and transformed by a FDCT processor. Based on its average energy, a given transform block is compared with its adjacent blocks and the nearest block is selected as its estimate. The difference between the actual and the estimated values of the (DCT) coefficients are then quantized and encoded using nonuniform quantizers and a variable length coder. Furthermore, the maximum number of different wordlengths is assumed to be five. Therefore, five sets of 256-byte encoding ROMs are used to store the quantization tables. To reduce the redundancy in the code words, an adaptive coding scheme is used. The coding scheme is based on setting two threshold levels. 相似文献
16.
提高分形图像编码质量与速度的方案 总被引:7,自引:1,他引:6
分形图像编码十余年来在图像处理尤其是图像压缩领域引起了人们的极大兴趣。众所周知,编码时间长是这项技术的主要缺点,许多改进方案因此被提出以加快编码过程。然而,在这些加快方案中,大多数仅仅是在解码图像质量或多或少有所下降的条件下减少编码时间的。该文提出进一步提高解码图像质量和编码速度的方案:一是预先在待编码图像中添加高斯白噪声以进一步减少不满足对比度因子约束的domain块的数目;二是对小方差range块直接用其均值块代替以进一步加快编码速度。实验结果显示,对于三幅复杂性不同的标准测试图像,本方案确实能够从解码质量和编码速度方面改进传统分形图像编码。 相似文献
17.
一种分形彩色图像压缩编码方法 总被引:7,自引:1,他引:7
在分析彩色图像色彩三分量r,g,b的相关性和分形四叉树编码层次信息冗余性的基础上,提出了一种分形彩色图像压缩编码方法.它将图像的3个独立的颜色分量按某种方式组合成1个来搜索匹配块,从而将需要存储和搜索的3个颜色分量匹配块(SFC方法)减少为1个,并且对四叉树层次信息进行压缩.此外,采用不同的组合,得到了几个图像压缩比和解码质量相近的编码方法,其中使用亮度分量的方法比使用其他方法速度更快.实验结果表明,它优于SFC方法及标准JPEG方法,不失为一种好的分形彩色图像压缩方法. 相似文献
18.
提出了一种新的基于连续及非连续长度块编码的测试数据压缩方法,该方案从提高码字利用率的目的出发,利用定长的二进制码字表示连续长度块的长度信息,同时,将连续位长度不足的序列按一定的策略划为非连续块,并且不对其进行编码,故有效地避免了用长码字替换短游程序列的情况。该方案的编码规则减少了使用前、后缀形式编码的复杂性,所以其编码及解码过程简单,同时具有简单的通讯协议。对ISCAS-89标准电路Mintest集的压缩结果表明,提出的方案较FDR码和Golomb码都具有更好的压缩效率。 相似文献
19.
云数据存储的快速发展对数据的可用性提出了较高要求.目前,主要采用纠删码计算数据编码块进行分布式冗余数据存储来保证数据的可用性.虽然这种数据编码技术保证了存储数据的安全性并减少了额外的存储空间,但在损坏数据恢复时会产生较大的计算和通信开销提出一种基于多级网络编码的多副本生成和损坏数据恢复算法算法基于多级网络编码对纠删码的... 相似文献
20.
视频压缩可以降低多媒体传感器网络中的数据信息量。传统分布式视频编码方案采用区域统一编码,可能导致运动剧烈区域解码估计的失真。提出一种改进的分布式视频编码算法。该算法基于图像梯度场,针对Wyner-Ziv帧不能准确编解码的区域,通过ROI判定准则提取该区域并基于熵编码压缩,图像其他区域则基于LDPC实现分布式编解码,进而实现视频的优化传输。仿真实验表明:本文算法可增强运动剧烈区域的编码效率,在降低码率的同时提高解码图像质量,最终降低传感器节点能耗。 相似文献