A CMOS current-mode log(x) and log(1/x) functions generator

A novel Complementary Metal Oxide Semiconductor (CMOS) current-mode low-voltage and low-power controllable logarithmic function circuit is presented. The proposed design utilises one Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The proposed design provides high dynamic range, controllable amplitude, high accuracy and is insensitive to temperature variations. The circuit operates on a ±0.6 V power supply and consumes 0.3 μW. The functionality of the proposed circuit was verified using HSPICE with 0.35 μm 2P4M CMOS process technology.     

A novel CMOS exponential transconductor operating in weak inversion

A novel CMOS exponential transconductor which employs only three NMOS transistors operating in weak inversion, is presented. The main advantage of the proposed circuit is its wide range of exponential behaviour, which reaches up to five decades of current range, and above 10 μA to an input voltage range of 800 mV. The physical realisation is achieved in two forms: in the first one, the circuit is implemented with discrete MOS transistor arrays by CD4007 series; in the second one, the circuit is fully integrated in a 0.5 μm CMOS standard process. Simulated and experimental results of the proposed exponential transconductor are also presented.     

CMOS电压模式伪指数功能电路

根据函数(1 x)/(1-x),利用MOS晶体管工作在饱和区的平方律特性,设计了一种电压模式的CMOS伪指数功能电路.该指数电路由一对简单的背对背电流镜和一个电流模式的除法器构成.基于TSMC 0.18 μm CMOS工艺,3.3 V工作电压下的Hspice仿真结果显示电路的输出电压与输入电压之间成良好的指数关系即dB-线性关系.在dB-线性内,输出电压的动态范围为20 dB,误差在1 dB之内.     

一种基于亚阈区VGS和ΔVGS的CMOS基准电压源电路

介绍了一种基于亚阈区VGS和ΔVGS的CMOS基准电压源电路,电路不采用二极管和三极管. 电路采用正负温度系数电流叠加的原理,可以产生多个基准电压值的输出,适用于同时需要多个基准的电路系统中. 所设计的电路在0.6μm CMOS工艺线上流水验证,芯片面积为0.023mm2. 测试结果表明,电源电压为2.5~6V时,最大的电流为8.25μA;电源电压为4V时,常温下所获得的三个基准电压值为203mV,1.0V及2.05V. 温度由0℃变化到100℃时,芯片的温度系数为31ppm/℃,平均的线性度为±0.203%/V. 此电路结构已经成功应用于背光LED驱动电路中.     

一种基于亚阈区VGs和AVGS的CMOS基准电压源电路

介绍了一种基于亚阈区VGs和△Vos的CMOS基准电压源电路,电路不采用二极管和三极管.电路采用正负温度系数电流叠加的原理,可以产生多个基准电压值的输出,适用于同时需要多个基准的电路系统中.所设计的电路在0.6μm CMOS工艺线上流水验证,芯片面积为0.023mm2.测试结果表明,电源电压为2.5～6V时,最大的电流为8.25μA;电源电压为4V时,常温下所获得的三个基准电压值为203mV,1.0V及2.05V.温度由0℃变化到100℃时,芯片的温度系数为31ppm/℃,平均的线性度为±0.203%/V.此电路结构已经成功应用于背光LED驱动电路中.     

一种基于亚阈区VGs和AVGS的CMOS基准电压源电路

介绍了一种基于亚阈区VGs和△Vos的CMOS基准电压源电路,电路不采用二极管和三极管.电路采用正负温度系数电流叠加的原理,可以产生多个基准电压值的输出,适用于同时需要多个基准的电路系统中.所设计的电路在0.6μm CMOS工艺线上流水验证,芯片面积为0.023mm2.测试结果表明,电源电压为2.5～6V时,最大的电流为8.25μA;电源电压为4V时,常温下所获得的三个基准电压值为203mV,1.0V及2.05V.温度由0℃变化到100℃时,芯片的温度系数为31ppm/℃,平均的线性度为±0.203%/V.此电路结构已经成功应用于背光LED驱动电路中.     

Ultra‐Low‐Power Differential ISFET/REFET Readout Circuit

A novel ultra‐low‐power readout circuit for a pH‐sensitive ion‐sensitive field‐effect transistor (ISFET) is proposed. It uses an ISFET/reference FET (REFET) differential pair operating in weak‐inversion and a simple current‐mode metal‐oxide semiconductor FET (MOSFET) translinear circuit. Simulation results verify that the circuit operates with excellent common‐mode rejection ability and good linearity for a single pH range from 4 to 10, while only 4 nA is drawn from a single 1 V supply voltage.     

高电源抑制比的CMOS亚阈值多输出电压基准

基于工作在亚阈值区的MOS器件,运用CMOS电流模基准对CATA和PTAT电流求和的思想．提出一种具有低温漂系数、高电源抑制比（PSRR）的CMOS电压基准源,该电路可同时提供多个输出基准电压,且输出电压可调。该基准源基于CSMC0．5μm标准CMOS工艺,充分利用预调节电路并改进电流模基准核心电路。使整个电路的电源抑制比在低频时达到122dB,温度系数（TC）在0-100℃的温度范围内约7ppm／℃。     

A Log-Domain CMOS Transcapacitor: Design, Analysis and Applications

We present in this paper the CMOS implementation of a transcapacitor working in the log-domain. This circuit integrates a differential input current into an output pseudo-voltage, which is similar to the compressed voltage used as the internal variable in companding filters. This log-domain transcapacitor is compatible with pseudo-conductances implemented with a single transistor. The pseudo-transcapacitor circuit is analyzed and a collection of log-domain reactive components and small circuits using it is proposed.     

A Methodology for Long Time Constant Log-Domain Filters in CMOS

A simple methodology for implementation of low-order, current-mode, log-domain filters in CMOS technology is presented. The key transistors in the circuit are operated in weak inversion and in contrast with previous approaches may pass into the triode regime. The concept is particularly suited to implementation in silicon-on-insulator technology, because dielectric isolation of the transistors eliminates leakage currents, and because influence of the body effect on circuit function is limited. Very long time constants, on the order of 1 s or more, are obtainable. A simple elaboration of the basic unit circuit allows the time constant to be controlled by a bias current.Patrick Shoemaker received the B.A., M.S., and Ph.D. degrees in Bioengineering from the University of California, San Diego. From 1984 to 1998 he was an engineer with the Space and Naval Warfare Systems Center in San Diego, where he worked on modeling and implementation of artificial neural networks, and analog and mixed-signal circuit design. Since 1998 he has been with Tanner Research in Pasadena, California, where his work has focused on biological information processing (in particular, insect vision) and on biomimetic analog integrated circuits. Dr. Shoemaker is a member of the IEEE and the International Neural Network Society.