A switched-capacitor preprocessor for speech recognition

A switched-capacitor (SC) preprocessing system (preprocessor) which extracts and emphasizes the local peaks of the spectrum in real time is proposed for speech recognition systems. Main components of the system are a specially designed bandpass filter bank, a low-pass decimation filter bank, two-dimensional local peak extraction (LPE) filters, and a LPE filter selection circuit. Furthermore, a SC cascaded integrator-comb filter design technique is proposed to realize the decimation low-pass filter and the LPE filter. Finally, the system is tested by using two speech recognition systems.     

Series/Parallel Time-Multiplexed Switched-Capacitor Filters with Programmability Based on Non-Uniform Sampling

This paper presents an improved scheme for programmable time-multiplexed (TM) switched-capacitor (SC) filters. The proposed approach uses a novel sampling technique, which eliminates the need for resolution/area tradeoffs. The programmability of each processing channel is based on the use of non-uniform clock signals with noise-shaped sampling energy. No capacitor values are modified for programming frequency response parameters and, hence, the performance of the TM SC filter is not sacrificed for programmability. Such a sampling technique not only leads to an accurate frequency response control, but also allows the design procedures and the resulting SC circuit implementation to be simplified. A test-chip including a programmable second-order TM SC filter with a multiplexing order of four, which operates in series or in parallel mode, was fabricated in conventional CMOS technology. Measurement results demonstrate the effectiveness and versatility of the proposed technique.     

Noise-cancelling switched-capacitor (SC) filtering technique

A method of reducing the 1/f noise in SC filters is shown using an initialising technique. This technique also removes the input offset of the operational amplifier, and thus gives an offset-free SC building block. Experimental results for a first-order lowpass filter illustrating the above are presented.     

基于二象限APF的单相功率因数校正器

为消除单相整流装置产生的谐波,提出了一种基于二象限有源滤波器(APF)的单相功率因数校正器,包括其主回路拓扑与控制策略。使用T型拓扑可滤除高次谐波,在主回路加装二极管可削减有源滤波器电流峰值,并在控制回路中使用双前馈以实现快速响应。对该拓扑和控制方案进行了Matlab仿真,并设计了基于dsPIC33F系列数字控制器的实验样机。仿真和实验结果均表明该技术可在降低成本的情况下,仍将功率因数提升至99%。     

Improved harmonic suppression efficiency of single-phase APFs in distorted distribution systems

In this study, a control method is proposed to improve the harmonic suppression efficiency of the single-phase active power filter in a distorted power system to suppress current harmonics and reactive power. The proposed method uses the self-tuning filter (STF) algorithm to process single-phase grid voltage in order to provide a uniform reference grid current, which increases the efficiency of the system. The results of the simulation study are presented to verify the effectiveness of the proposed control technique in this study.     

New inverter output filter topology for PWM motor drives

This paper presents a new inverter output filter topology for pulse width modulation (PWM) motor drives. It is shown that the proposed filter effectively reduces high frequency harmonics which can cause serious damage to the motor bearings and insulation. The proposed filter is comprised of a conventional resistance, inductance, capacitance (RLC) network cascaded with an LC trap filter. The LC trap, tuned to the inverter switching frequency, is very effective in reducing the switching harmonics. By using this new topology the need for high damping resistance and low RLC cut-off frequency is eliminated. This reduces the phase shift in the current regulation loop and increases the filter efficiency. Experimental verification of the filter topology is provided with a 180 V inverter and a 25 hp permanent magnet synchronous motor. Space-vector predictive current regulation is implemented as an inner-loop current regulator for the outer-loop speed control using a digital signal processor. The effectiveness of the filter at different motor speeds is presented     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

Repetitive-based control for selective harmonic compensation in active power filters

This paper proposes a repetitive-based controller for active power filters, which compensates selected current harmonics produced by distorting loads. The approach is based on the measurement of line currents and performs the compensation of selected harmonics using a closed-loop repetitive-based control scheme based on a finite-impulse response digital filter. Compared to conventional solutions based on stationary-frame current control, this approach allows full compensation of selected frequencies, even if the active filter has limited bandwidth. Compared to synchronous-frame harmonic regulations on line currents, the complexity of the proposed algorithm is independent of the number of compensated harmonics. Moreover, it is more appropriate for digital signal processor implementation and less sensitive to rounding and quantization errors when finite word length or fixed-point implementation is considered. Experimental results on a 5-kVA prototype confirm the theoretical expectations.     

Modeling and Computer Simulation of a Microwave-to-DC Energy Conversion Element

A microwave-to-dc energv conversion element consisting of a dipole antenna, a low-pass filter, a Schottky-barrier diode, and a dc filter has been modeled using a distributed transmission-line modeling technique that includes skin-effect losses. Computer simulation has shown 80-percent conversion efficiency and has indicated that the diode generates significant power at higher harmonics due to a resonance effect.     

A 1-V 3.5-mW CMOS switched-opamp quadrature IF circuitry for Bluetooth receivers

A 1-V switched-capacitor (SC) quadrature IF circuitry for Bluetooth receivers is demonstrated using switched-opamp technique. To achieve double power efficiency while maintaining low sensitivity to finite opamp gain effects for the SC IF circuitry, half-delay integrator-based filters and /spl Sigma//spl Delta/ modulator have been proposed. The proposed quadrature IF circuitry employs a seventh-order IF filter for channel selection and a third-order /spl Sigma//spl Delta/ modulator for analog-to-digital conversion. A noise-shaping extension technique is employed to enhance the resolution of the low-pass /spl Sigma//spl Delta/ modulator by 16 dB while operating at the same oversampling ratio and power consumption. At a 1-V supply, the quadrature IF circuitry achieves a measured IIP3 of -3 dBm at a nominal gain of 24 dB with a 48-dB variable gain control while consuming a total power dissipation of 3.5 mW.     

High-Selectivity Switched-Capacitor Bandpass Filter with Quasi-Continuous Quality Factor Tunability

This paper describes the design and implementation of a second-order switched-capacitor (SC) bandpass (BP) filter with very wide quality factor (Q) programmability range. The filter selectivity is digitally programmed by varying the effective sampling frequency of an SC branch, without modifying any capacitor value. The proposed approach allows a quasi-continuous Q-factor tunability avoiding, in principle, the inherent quantization error associated to any traditional programming technique. Automatic Q-factor tuning is performed by using a scheme based on an amplitude-locking loop approach. Experimental results obtained from a 0.8-m CMOS integrated prototype demonstrate the versatility of the proposed technique for high-Q SC BP filters.     

A new simple method for analysing of thermal noise in switched-capacitor filters

Thermal noise is one of the most important challenges in analogue integrated circuits design. This problem is more crucial in switched-capacitor (SC) filters due to the aliasing effect of wide-band thermal noise. In this article, a new simple method is proposed for estimating the power spectrum density of output thermal noise in SC filters, which have acceptable accuracy and short running time. In the proposed method, first using HSPICE simulator, accurate value of accumulated sampled noise on sampler capacitors in each clock state is achieved. Next, using difference equations of the SC filter, frequency response of the SC filter is shaped by time domain analysis. Based on the proposed method, a SC low-pass filter and a second-order SC band-pass filter are analysed. The results are validated by comparing to the previously measured data.     

A cascade boost-switched-capacitor-converter - two level inverter with an optimized multilevel output waveform

Two structures, a switched-capacitor (SC)-based boost converter and a two-level inverter, are connected in cascade. The dc multilevel voltage of the first stage becomes the input voltage of the classical inverter, resulting in a staircase waveform for the inverter output voltage. Such a multilevel waveform is close to a sinusoid; its harmonics content can be reduced by multiplying the stage number of the SC converter. The output low-pass filter, customary after a two-level inverter, becomes obsolete, resulting in a small size of the system, as the SC circuit can be miniaturized. Both stages are operated at a high switching frequency, resulting in a high-frequency inverter output, as required by some industrial applications. A Fourier analysis of the output waveform is performed. The design is optimized with reference to the nominal duty-cycle for obtaining the minimum total harmonic distortion. Simulations and experiments on two prototypes, one with a five-level output and one with a seven-level output, confirm the theoretical analysis.     

A novel three-phase AC/DC converter without front-end filter basedon adjustable triangular-wave PWM technique

This paper proposes a novel three-phase AC/DC converter without a front-end filter. Because an adjustable triangular-wave pulsewidth modulation (PWM) (ATPWM) technique is adopted, not only is a front-end filter located after the three-phase rectifier is omitted, but also the size of the input AC filter and the output DC filter are reduced. In addition, this AC/DC converter has many advantages such as simpler structure, higher reliability, and better output waveform. The principle of operation, harmonics elimination, and feedback control of the novel AC/DC topology are elaborated. A thorough analysis on its performance under an unbalanced system is presented. Finally, the theoretical analysis is proved to be correct by simulations and experiments     

SC filter for RF sampling and downconversion with wideband image rejection

In this paper we present an SC filter for RF downconversion using the direct RF sampling and decimation technique. The circuit architecture is generic and it features high image rejection for wideband signals and good linearity. An SC implementation in 0.13μm CMOS suitable for an RF of 2.4 GHz and 20 MHz signal bandwidth is presented as a demonstrator. Simulation results obtained using Cadence Spectre simulation tools are included.     

Microstrip side-coupled ring bandpass filters with mode coupling control for harmonic suppression

A technique to suppress higher harmonics in side-coupled ring bandpass filters is proposed and demonstrated. The proposed technique basically consists of optimising the ring shape and the excitation stage of the complete filter structure in order to mitigate the excitation of the resonant modes that generate the second-harmonic filter resonances. A harmonic suppression ratio for the second harmonic greater than 25 dB in a flat bandpass filter centred at 2.5 GHz is experimentally demonstrated.     

Three-phase four-wire shunt active filter control strategies

This paper describes a three-phase four-wire shunt active power filter using a conventional three-leg converter, without the need of power supply at DC bus. Two approaches have been developed to control the active filter. Both control strategies consider harmonics and zero sequence components in the voltage and current simultaneously. The first one provides constant power and the second one sinusoidal current to the source, even under unbalanced voltage conditions. Simulation results from a complete model of shunt active filter are presented to validate and compare the control strategies     

Variable-bandwidth filters using switching

It is shown that, if a switching technique is used to scale the bandwidth of a lowpass filter, the resultant circuit has some of the characteristics of an N-path filter. The consequence of this is that the signal frequency must be bandlimited to avoid spurious responses at the switching frequency and its harmonics.     

A new control system with a control delay compensation for a current-source active power filter

In this paper, a new control system for the current-source active power filter is presented. The harmonic current compensation is realized using combined feedforward control of the load currents and closed-loop control of the supply currents. The control system includes a simple method for compensating the sampling and calculation delays of the digital control system. The compensation in the proposed method is achieved using the regular LC filter of the active power filter as an energy storage for load currents, and no additional components is needed in the main circuit. Furthermore, the calculation power demand of the compensation method is very low and is, therefore, suitable for single-chip microcontroller implementations. The proposed control system is realized using a 32-bit Motorola MPC555 microcontroller. The simulation and experimental results show effective filtering performance also for higher order harmonics of the distorted load currents.     

A 28-MHz wideband switched-capacitor bandpass filter with transmission zeros for high attenuation

A 28-MHz wideband switched-capacitor (SC) bandpass filter employs an N-path technique and implements transmission zeros in the transfer function to achieve high attenuation. A modified SC biquadratic filter architecture is proposed to achieve high-speed operation. Implemented in a 0.35-/spl mu/m CMOS process, the bandpass filter operates at 28-MHz center frequency with a 3.84-MHz bandwidth and adjacent-channel attenuation of more than 35 dB. At 3-V supply, the filter measures a dynamic range of 37 dB at the 1% THD3 point while dissipating 19.6-mW per pole and occupying a chip area of 1.65 mm/sup 2/.