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1.
Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.  相似文献   

2.
A fully integrated 6-GHz phase-locked-loop (PLL) fabricated using AlGaAs/GaAs heterojunction bipolar transistors (HBTs) is described. The PLL is intended for use in multigigabit-per-second clock recovery circuits for fiber-optic communication systems. The PLL circuit consists of a frequency quadrupling ring voltage-controlled oscillator (VCO), a balanced phase detector, and a lag-lead loop filter. The closed-loop bandwidth is approximately 150 MHz. The tracking range was measured to be greater than 750 MHz at zero steady-state phase error. The nonaided acquisition range is approximately 300 MHz. This circuit is the first monolithic HBT PLL and is the fastest yet reported using a digital output VCO. The minimum emitter area was 3 μm×10 μm with ft=22 GHz and fmax=30 GHz for a bias current of 2 mA. The speed of the PLL can be doubled by using 1-μm×10-μm emitters in next-generation circuits. The chip occupies a die area of 2-mm×3-mm and dissipates 800 mW with a supply voltage of -8 V  相似文献   

3.
We present a technique for linewidth measurement and phase-locking of Josephson oscillators using digital rapid single-flux-quantum (RSFQ) circuits. The oscillator consists of a resistively shunted 6 μm×6 μm Nb/AlOx/Nb Josephson tunnel junction that is integrated with RSFQ input and output circuits. A cascade of RSFQ T flip-flops is used to directly monitor the output of the Josephson oscillator. Spectral characteristics have been measured directly for oscillator frequencies ranging from 10-50 GHz. The linewidth can be reduced by over 100 times by phase-locking the oscillator to an RSFQ pulse train generated by an external sinusoidal signal. These Josephson oscillators can be used as on-chip stable high frequency clocks for RSFQ circuits  相似文献   

4.
Triple-push oscillator approach: theory and experiments   总被引:1,自引:0,他引:1  
This paper presents the theory and experiments of the triple-push oscillator approach. This oscillator architecture is combined with three identical oscillator subcircuits. An analytical mode analysis is used to describe the behavior of all modes. As will be shown, odd-mode currents in each oscillator subcircuit have a 120° phase shift to one another and thus produce in-phase combining for the third harmonic. The time domain analysis was performed to simulate a triple-push oscillator, showing that the phenomenon of 120° phase shift exists among each oscillator subcircuit. To prove this concept, a 4.9-GHz hybrid bipolar junction transistor (BJT) circuit and a 28.4-GHz heterojunction bipolar transistor (BJT) MMIC chip were demonstrated. The measured results showed that the 4.9-GHz BJT triple-push oscillator delivered an output power of 1.0 dBm at 4.9 GHz with 12.0-dB fundamental rejection, and the 28.4-GHz HBT MMIC chip exhibited a measured center frequency at 28.4 GHz with an output power of -15.4 dBm, while the output powers of the fundamental and the second harmonic signals were suppressed to -21 and -34 dBm  相似文献   

5.
We report state-of-the-art V-band power performance of 0.15-μm gate length InGaAs/InAlAs/InP HEMT's which have 15 μm×23 μm dry-etched through-substrate source vias (substrate thickness 50 μm). The 500-μm wide InP HEMT's were measured in fixture at 60 GHz and demonstrated an output power of 190 mW with 40% power-added efficiency (PAE) and 6.8 dB power gain at an input power of 16 dBm. These results represent the best combination of power and PAE reported to date at this frequency for any solid state device. The results are achieved through optimization of the InP-based heterostructure which incorporates a graded pseudomorphic InGaAs channel and a graded pseudomorphic InAlAs Schottky barrier layer, and the use of 15 μm×23 μm dry-etched through-substrate source vias  相似文献   

6.
A self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) with an InGaAs emitter cap layer that has very low emitter resistance is described. In this structure, a nonalloyed emitter contact allows the emitter and base electrodes to be formed simultaneously and in a self-aligned manner. The reduction of emitter resistance greatly improves the HBT's transconductance and cutoff frequency. In fabricated devices with emitter dimensions of 2 μm×5 μm, a transconductance-per-unit-area of 16 mS/μm2 and a cutoff frequency of 80 GHz were achieved. To investigate high-speed performance, a 21-stage ECL ring oscillator was fabricated using these devices. Propagation delay times as low as 5.5 ps/gate were obtained, demonstrating the effectiveness of this structure  相似文献   

7.
The fabrication and characterization of a new self-aligned HBT utilizing bridged base-electrode technology (BBT) are presented. This new technology simplifies the fabrication process and relaxes the limitations in device size scaling, thus decreasing the emitter size to 1 μm×1 μm. In spite of a large junction periphery area ratio, a good current gain of more than 10 is obtained in an HBT with an emitter size of 1 μm×1 μm. A series of fabricated HBTs shows excellent high-speed performance. The highest values of fT =90 GHz and fmax=63 GHz are obtained in an HBT with an emitter size of 1 μm×5 μm. The realization of HBTs with small emitters and excellent high-frequency characteristics demonstrates the effectiveness of this new technology  相似文献   

8.
This paper presents a new type of transmission-line resonator and its application to RF (microwave and millimeter-wave) heterojunction bipolar transistor (HBT) oscillators. The resonator is a parallel combination of two open stubs having length of /spl lambda//4/spl plusmn//spl delta/(/spl delta//spl Lt//spl lambda/), where /spl lambda/ is a wavelength at a resonant frequency. The most important feature of this resonator is that the coupling coefficient (/spl beta//sub C/) can be controlled by changing /spl delta/ while maintaining unloaded Q-factor (Q/sub u/) constant. Choosing a small value of /spl delta/ allows us to reduce /spl beta//sub C/ or equivalently to increase loaded Q-factor (Q/sub L/). Since coupling elements such as capacitors or electromagnetic gaps are not needed, /spl beta//sub C/ and Q/sub L/ can be precisely controlled based on mature lithography technology. This feature of the resonator proves useful in reducing phase noise and also in enhancing output power of microwave oscillators. The proposed resonator is applied to 18-GHz and 38-GHz HBT oscillators, leading to the phase noise of -96-dBc/Hz at 100-kHz offset with 10.3-dBm output power (18-GHz oscillator) and -104-dBc/Hz at 1-MHz offset with 11.9 dBm (38-GHz oscillator). These performances are comparable to or better than state-of-the-art values for GaAs- or InP-based planar-circuit fundamental-frequency oscillators at the same frequency bands.  相似文献   

9.
A fully integrated K-band balanced voltage controlled oscillator (VCO) is presented. The VCO is realized using a commercially available InGaP/GaAs heterojunction bipolar transistor (HBT) technology with an f/sub T/ of 60 GHz and an f/sub MAX/ of 110 GHz. To generate negative resistance at mm-wave frequencies, common base inductive feedback topology is used. The VCO provides an oscillation frequency from 21.90 GHz to 22.33 GHz. The frequency tuning range is about 430 MHz. The peak output power is -0.3 dBm. The phase noise is -108.2 dBc/Hz at 1 MHz offset at an operating frequency of 22.33 GHz. The chip area is 0.84/spl times/1.00 mm/sup 2/.  相似文献   

10.
A 25-GHz monolithic voltage controlled oscillator (VCO) has been designed and fabricated in a commercial InGaP/GaAs heterojunction bipolar transistor (HBT) process. This balanced VCO has a novel topology using a feedback /spl pi/-network and a common-emitter transistor configuration. Ultra-low phase noise is achieved: -106 dBc/Hz and -130 dBc/Hz at 100kHz and 1-MHz offset frequency, respectively. To the authors' knowledge, this is the lowest phase noise achieved in a monolithic microwave integrated circuit (MMIC) VCO at such high frequency. The single-ended output power is -1 dBm. It can be tuned between 25.33GHz and 25.75GHz using the base-collector junction capacitor of the HBT as a varactor. The dc power consumption is 90mW for a 9-V supply. An excellent figure-of-merit of -195 dBc/Hz is obtained.  相似文献   

11.
As an alternative to AlGaAs/GaAs heterojunction bipolar transistors (HBTs) for microwave applications, InGaP/GaAs HBTs with carbon-doped base layers grown by metal organic molecular beam epitaxy (MOMBE) with excellent DC, RF, and microwave performance are demonstrated. As previously reported, with a 700-Å-thick base layer (135-Ω/sq sheet resistance), a DC current gain of 25, and cutoff frequency and maximum frequency of oscillation above 70 GHz were measured for a 2-μm×5-μm emitter area device. A device with 12 cells, each consisting of a 2-μm×15-μm emitter area device for a total emitter area of 360 μm2, was power tested at 4 GHz under continuous-wave (CW) bias condition. The device delivered 0.6-W output power with 13-dB linear gain and a power-added efficiency of 50%  相似文献   

12.
A monolithically integrated photoreceiver using an InAlAs/InGaAs HBT-based transimpedance amplifier has been fabricated and characterized. The p-i-n photodiode is implemented using the base-collector junction of the HBT. The 5 μm×5 μm emitter area transistors have self-aligned base metal and non-alloyed Ti/Pt/Au contacts. Discrete transistors demonstrated fT and fmax of 54 GHz and 51 GHz, respectively. The amplifier demonstrated a -3 dB transimpedance bandwidth of 10 GHz and a gain of 40 dBΩ. The integrated photoreceiver with a 10 μm×10 μm p-i-n photodiode showed a -3 dB bandwidth of 7.1 GHz  相似文献   

13.
A family of millimeter-wave sources based on InP heterojunction bipolar transistor (HBT) monolithic microwave/millimeter-wave integrated circuit (MMIC) technology has been developed. These sources include 40-GHz, 46-GHz, 62-GHz MMIC fundamental mode oscillators, and a 95-GHz frequency source module using a 23.8-GHz InP HBT MMIC dielectric resonator oscillator (DRO) in conjunction with a GaAs-based high electron mobility transistor (HEMT) MMIC frequency quadrupler and W-band output amplifiers. Good phase noise performance was achieved due to the low 1/f noise of the InP-based HBT devices. To our knowledge, this is the first demonstration of millimeter-wave sources using InP-based HBT MMIC's  相似文献   

14.
A compact monolithic integrated differential voltage controlled oscillator (VCO) using 0.5-/spl mu/m emitter width InP/InGaAs double-heterostructure bipolar transistors with a total chip size of 0.42 mm /spl times/ 0.46 mm is realized by using cross-coupled configuration for extremely high frequency satellite communications system applications. The device performance of F/sub max/ greater than 320 GHz at a current density of 5 mA//spl mu/m/sup 2/ and 5-V BVceo allows us to achieve a low phase noise 42.5-GHz fundamental VCO with -0.67-dBm output power. The VCO exhibits the phase noise of -106.8 dBc/Hz at 1-MHz offset and -122.3 dBc/Hz at 10-MHz offset from the carrier frequency.  相似文献   

15.
提出一种电容片内集成、高效率升压模式的DC-DC电源管理芯片,较普通结构相比,文中提出的电路结构具有6组2×,3组3×,2组4×升压模型共11种工作模式,并具有低纹波等优点。通过MIM电容与积累型NMOS电容串联的方式,提高单位面积容值,使得总电容面积大幅减小。采用SMIC 0.18μm CMOS工艺,利用Cadence工具对电路进行仿真验证,所提出自适应开关电容升压电路,在输出电压为3 V时,其效率最高可达到83.6%。在开关频率为20 MHz时,输入电压范围为1~1.8 V,所需总片内集成电容总面积为900 μm×900 μm,输出电压纹波<40 mV  相似文献   

16.
为了降低RC振荡器的功耗,并提高振荡频率的稳定性,提出一种新型的RC振荡器电路。该振荡器采用单比较器,结合电容修调结构。基于0.35 μm BCD工艺及Hspice 仿真工具,完成了电路的设计和仿真,仿真结果表明,该振荡器正常工作频率为51 kHz,由于温度和电源电压变异,频率变化范围为47.54~53.97 kHz,最大功耗电流为2.1 μA,面积为150 μm×180 μm,具有较低的功耗,可以提供相对稳定的频率,能够应用于电源管理芯片。  相似文献   

17.
介绍了一种由商用InGaP/GaAs异质结双极晶体管工艺制成、基于负阻原理的单片压控振荡器,此电路定位于5GHz频段下的无线应用.在实际使用中,除了旁路和去耦电容外,无需外接其他外部元件.测试得到的输出频率范围超过300MHz,为4.17~4.56GHz,与仿真结果非常吻合;相位噪声为-112dBc/Hz@1MHz;在3.3V电源电压下,其核心部分的直流功耗为15.5mW,输出功率为0~2dBm.为了与其他振荡器比较,还通过计算得到了相位噪声优值,约为-173.2dBc/Hz.同时,还讨论了负阻振荡器的原理和设计方法.  相似文献   

18.
介绍了一种由商用InGaP/GaAs异质结双极晶体管工艺制成、基于负阻原理的单片压控振荡器,此电路定位于5GHz频段下的无线应用.在实际使用中,除了旁路和去耦电容外,无需外接其他外部元件.测试得到的输出频率范围超过300MHz,为4.17~4.56GHz,与仿真结果非常吻合;相位噪声为-112dBc/Hz@1MHz;在3.3V电源电压下,其核心部分的直流功耗为15.5mW,输出功率为0~2dBm.为了与其他振荡器比较,还通过计算得到了相位噪声优值,约为-173.2dBc/Hz.同时,还讨论了负阻振荡器的原理和设计方法.  相似文献   

19.
This paper describes the design of a bipolar junction transistor phase-locked loop (PLL) for ΣΔ fractional-N frequency-synthesis applications. Implemented in a 0.8-μm BiCMOS technology, the PLL can operate up to 1.8 GHz while consuming 225 mW of power from a single -2-V supply. The entire LC-tuned negative-resistance variable-frequency oscillator is integrated on the same chip. A differential low-voltage current-mode logic circuit configuration is used in most of the PLL's functional blocks to minimize phase jitter and achieve low-voltage operation. The multimodulus frequency divider is designed to support multibit digital modulation. The new phase and frequency detector and loop filter contain only npn transistors and resistors and thus achieve excellent resolution in phase comparison. When phase locked to a 53.4-MHz reference clock, the measured phase noise of the 16-GHz output is -91 dBc/Hz at 10-kHz offset. The frequency switching time from 1.677 to 1.797 GHz is 150 μs. Die size is 4300×4000 μm2, including the passive loop filter  相似文献   

20.
Distributed voltage-controlled oscillators (DVCOs) are presented as a new approach to the design of silicon VCOs at microwave frequencies. In this paper, the operation of distributed oscillators is analyzed and the general oscillation condition is derived, resulting in analytical expressions for the frequency and amplitude. Two tuning techniques for DVCOs are demonstrated, namely, the inherent-varactor tuning and delay-balanced current-steering tuning. A complete analysis of the tuning techniques is presented. CMOS and bipolar DVCOs have been designed and fabricated in a 0.35-μm BiCMOS process. A 10-GHz CMOS DVCO achieves a tuning range of 12% (9.3-10.5 GHz) and a phase noise of -103 dBc/Hz at 600 kHz offset from the carrier. The oscillator provides an output power of -4.5 dBm without any buffering, drawing 14 mA of dc current from a 2.5-V power supply. A 12-GHz bipolar DVCO consuming 6 mA from a 2.5-V power supply is also demonstrated. It has a tuning range of 26% with a phase noise of -99 dBc/Hz at 600 kHz offset from the carrier  相似文献   

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