圆片级真空封装技术在MEMS陀螺中的应用

为维持MEMS硅微陀螺的真空度,利用两次硅-玻璃阳极键合和真空长期维持技术,实现了MEMS硅微陀螺的圆片级真空气密性封装。制作过程包括:先将硅和玻璃键合,在硅-玻璃衬底上采用DRIE工艺刻蚀出硅振动结构;再利用MEMS圆片级阳极键合工艺在10-5 mbar(1 mbar=100 Pa)真空环境中进行封装;最后利用吸气剂实现圆片的长期真空气密性。经测试,采用这种方式制作出的硅微陀螺键合界面均匀平整无气泡,漏率低于5.0×10-8 atm.cm3/s。对芯片进行陶瓷封装,静态下测试得出品质因数超过12 000,并对样品进行连续一年监测,性能稳定无变化。     

Wafer-Level Packaging of Micromechanical Resonators

An approach to low-cost, wafer-level packaging of microelectromechanical systems (MEMS), e.g., microresonators, is reported. The process does not require wafer-to-wafer bonding and can be applied to a wide range of MEMS devices. A sacrificial polymer-placeholder is first patterned on top of the MEMS component of interest, followed by overcoating with a low dielectric constant polymer overcoat. The sacrificial polymer decomposes at elevated temperature, and the volatile products from the sacrificial material permeate through the overcoat polymer leaving an embedded air-cavity around the MEMS structure. Thus, the device is released from the sacrificial polymeric material, housed in a protective overcoat. The protected MEMS device can then be handled and packaged like an integrated circuit. The electrical characteristics of the microresonators before and after packaging were essentially the same, showing the packaging scheme does not alter the device performance. This approach is applicable to both surface and bulk micromachined devices     

Wafer-level packaging of silicon to glass with a BCB intermediate layer using localised laser heating

Adhesive wafer-level bonding is an excellent solution to meet the stringent requirements in micro-electro-mechanical systems (MEMS) packaging, one of the challenges in MEMS manufacturing, in a steadily growing micro-systems market. A range of bonding processes for commercially available substrate bonders have been developed, which apply global heating during the bonding procedure. This article, however, describes an approach where heating is kept to a minimum by combining the merits of laser joining, a truly localised heating technique, and adhesive wafer-level bonding. This unique bonding technique, which enables the use of temperature-sensitive materials within the package, is demonstrated for bonding of silicon to glass - materials commonly used in MEMS fabrication - with a benzocyclobutene (BCB) intermediate bonding layer. As a proof of concept for wafer-level packaging, bonding of two simplified patterns is demonstrated, one with five individual samples on the same wafer, and the other with nine samples. To verify the influence of this innovative bonding technique on the quality of the seal the devices are shear force tested and the results are compared with those of devices packaged at chip-level.     

面向MEMS封装的微钎料球键合技术

微钎料球键合技术是一种成本低、适应性强,可靠性好的键合技术,容易与现有的IC自动化设备集成。微钎料球键合技术结合倒扣封装可以实现低成本、高密度以及高可靠性的MEMS封装;而且具有自对准或者自组装的功能,在MEMS封装中获得了广泛的应用。准确地预测微钎料球键合对于MEMS自组装的影响依赖于动态模型的发展。微钎料球键合技术的出现推动了标准化的MEMS封装工艺的进程。     

Selective bonding and encapsulation for wafer-level vacuum packaging of MEMS and related micro systems

A laser-assisted bonding technique is demonstrated for low temperature region selective processing. A continuous wave carbon dioxide (CO₂) laser (λ=10.6 μm) is used for solder (Pb37/Sn63) bonding of metallized silicon substrates (chips or wafers) for MEMS applications. Laser-assisted selective heating of silicon led to the reflow of an electroplated, or screen-printed, intermediate solder layer which produced silicon–solder–silicon joints. The bonding process was performed on fixtures in a vacuum chamber at an air pressure of 10⁻³ Torr to achieve fluxless soldering and vacuum encapsulation. The bonding temperature at the sealing ring was controlled to be close to the reflow temperature of the solder. Pull test results showed that the joint was sufficiently strong. Helium leak testing showed that the leak rate of the package met the requirements of MIL-STD-883E under optimized bonding conditions and bonded packages survived thermal shock testing. The testing, based on a design of experiments method, indicated that both laser incident power and scribe velocity significantly influenced bonding results. This novel method is especially suitable for encapsulation and vacuum packaging of chips or wafers containing MEMS and other micro devices with low temperature budgets, where managing stress distribution is important. Further, released and encapsulated devices on the sealed wafers can be diced without damaging the MEMS devices at wafer level.     

真空炉金锡封焊

文章在介绍半导体金锡焊料封装工艺的基础上,重点对金锡焊料、炉温曲线设置等工艺技术问题进行了深入研究。基于大量的金锡焊料真空焊接封装实验及理论分析,研究了器件气密封装技术。讨论了封焊夹具、管帽镀层、合金状态、封接面表面、压块、焊料厚度以及加热程序对焊接质量的影响。密封后的产品在经过环境试验和机械试验考核后,封装气密性能很好地满足要求。并且结合应用背景证明了所采用的合金及封装工艺的可行性。     

A wafer-level microcap array to enable high-yield microsystem packaging

Packaging represents a significant and expensive obstacle in commercializing microsystem technology (MST) devices such as microelectromechanical systems (MEMS), microopticalelectromechanical systems (MOEMS), microsensors, microactuators, and other micromachined devices. This paper describes a novel wafer-level protection method for MSTs which facilitate improved manufacturing throughput and automation in package assembly, wafer-level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized microcap array. This array consists of an assortment of small caps molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments associated with packaging. It may also include modifications which enhance its adhesion to the MST wafer or increase the MST device function. Depending on the application, the micromolded cap can be designed and modified to facilitate additional functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. The fabrication and materials selection of the microcap device is discussed in this paper. The results of wafer-level microcap packaging demonstrations are also presented.     

Wafer-Lever Hermetic Package with Through-Wafer Interconnects

This paper reports a new wafer-level hermetic packaging structure with the features of low processing cost and high I/O density by using wet and dry sequentially etched through-wafer vias for the interconnects of a microelectro mechanical systems (MEMS) device. A thin Si wafer cap and wafer-level fabrication processes such as deep reactive ion etching (DRIE) and KOH etching, bottom-up copper filling, and Sn solder bonding were adopted. The hermeticity and bonding strength of the structure are evaluated. Preliminary results show that the hermeticity can meet the requirement of the criterion of MIL-STD 883E, method 1014.9, and the bonding strength is up to 8 MPa.     

MEMS封装技术及标准工艺研究

分析了MEMS的特点及封装工艺对MEMS的影响,给出了对MEMS封装的基本要求.研究了MEMS封装工艺中的一些关键技术,即硅-硅和硅-玻璃键合技术、清洗与引线键合技术、焊料贴片和胶粘技术以及气密封帽技术等,并给出了一些重要的研究结果.同时也介绍对几种MEMS惯性器件的封装要求及封装方法.     

基于BCB键合的MEMS加速度计圆片级封装工艺

对基于BCB的圆片级封装工艺进行了研究,该工艺代表了MEMS加速度计传感器封装的发展趋势,是MEMS加速度计产业化的关键。选用3000系列BCB材料进行MENS传感器的粘结键合工艺试验,解决了圆片级封装问题,在低温250℃和适当压力辅助下≤2．5bar（1bar=100kPa）实现了加速度计的圆片级封装,并对相关的旋涂、键合、气氛、压力等诸多工艺参数进行了优化。     

MEMS器件真空封装工艺研究

MEMS器件的真空封装是整个工艺过程中的难点,封装的质量决定着整个器件的质量和使用寿命。现有的封装工艺,封装后器件内部真空度不能有效保持,是需要在真空下工作的器件的瓶颈。随着吸气剂的广泛使用,使MEMS器件的真空度保持能力大大提高,但现有的封装工艺设备不能满足吸气剂的激活条件。分析了空气阻尼对MEMS器件品质因数的影响,提出一种将现有的真空共晶设备的改进方法,使之能应用于使用吸气剂的MEMS器件的真空封装工艺。     

埋置型叠层微系统封装技术

包含微机电系统(MEMS)混合元器件的埋置型叠层封装,此封装工艺为目前用于微电子封装的挠曲基板上芯片(COF)工艺的衍生物。COF是一种高性能、多芯片封装工艺技术,在此封装中把芯片包入模塑塑料基板中,通过在元器件上形成的薄膜结构构成互连。研究的激光融除工艺能够使所选择的COF叠层区域有效融除,而对封装的MEMS器件影响最小。对用于标准的COF工艺的融除程序进行分析和特征描述,以便设计一种新的对裸露的MEMS器件热损坏的潜在性最小的程序。COF/MEMS封装技术非常适合于诸如微光学及无线射频器件等很多微系统封装的应用。     

用于MEMS器件芯片级封装的金-硅键合技术研究

MEMS器件大都含有可动的硅结构 ,在器件加工过程中 ,特别是在封装过程中极易受损 ,大大影响器件的成品率。如果能在MEMS器件可动结构完成以后 ,加上一层封盖保护 ,可以显著提高器件的成品率和可靠性。本文提出了一种用于MEMS芯片封盖保护的金 硅键合新结构 ,实验证明此方法简单实用 ,效果良好。该技术与器件制造工艺兼容 ,键合温度低 ,有足够的键合强度 ,不损坏器件结构 ,实现了MEMS器件的芯片级封装。我们已经将此技术成功地应用于射流陀螺的制造工艺中     

An embedded overlay concept for microsystems packaging

An embedded overlay concept for packaging hybrid components containing microelectromechanical systems (MEMS) is described. This packaging process is a derivative of the chip-on-flex (COF) process currently used for microelectronics packaging. COF is a high performance, multichip packaging technology in which die are encased in a molded plastic substrate and interconnects are made via a thin-film structure formed over the components. A laser ablation process has been developed which enables selected areas of the COF overlay to be efficiently ablated with minimal impact to the packaged MEMS devices. Analysis and characterization of the ablation procedures used in the standard COF process was performed to design a new procedure which minimized the potential for heat damage to exposed MEMS devices. The COF/MEMS packaging technology is well-suited for many microsystem packaging applications such as micro-optics and radio frequency (RF) devices.     

埋置型叠层微系统封装技术

包含微机电系统(MEMS)混合元器件的埋置型叠层封装,此封装工艺为目前用于微电子封装的挠曲基板上芯片(COF)工艺的衍生物.COF是一种高性能、多芯片封装工艺技术,在此封装中把芯片包入模塑塑料基板中,通过在元器件上形成的薄膜结构构成互连.研究的激光融除工艺能够使所选择的COF叠层区域有效融除,而对封装的MEMS器件影响...     

一种复合式MEMS皮拉尼真空计的设计

微电子机械系统(MEMS)皮拉尼真空计可广泛用于芯片封装和设备测试等领域.量程是MEMS皮拉尼真空计的重要性能指标之一.设计了一种复合式MEMS皮拉尼真空计,通过将具有不同测量范围的两款器件串联复合在同一芯片上,实现量程的扩展.以二极管型皮拉尼真空计为例设计了器件结构,优化了尺寸参数,并给出了兼容CMOS工艺的制造方案...     

用于MEMS器件的真空密封技术

介绍MEMS器件中常用的键合技术和适用于真空密封与器件性能要求的特殊结构设计，以及提高和保持器件高真空环境的方法。合适的真空密封技术不仅能够保证和提高MEMS器件的性能，同时可以简化工艺步骤，降低器件成本。     

基于熔焊的MEMS真空封装

利用传统的电阻焊技术实现了MEMS真空封装,制定了基于熔焊的工艺路线,进行了成品率实验,研究了影响真空封装器件内部真空度的各种因素,并对真空封装器件封装强度进行了检测。     

焊料键合实现MEMS真空封装的模拟

结合典型的焊料键合MEMS真空封装工艺,应用真空物理的相关理论,建立了封装腔体的真空度与气体吸附和解吸、气体的渗透、材料的蒸气压、气体通过小孔的流动等的数学模型,确定了其数值模拟的算法．通过实验初步验证了模拟结果的准确性,分析了毛细孔尺寸对腔体和烘箱真空度的影响,实现了MEMS器件真空封装工艺的参数化建模与模拟和仿真优化设计．     

MECHATRONICS 2000. Seventh Mechatronics Forum InternationalConference and Mechatronics Education Workshop

The following topics are dealt with: flip chip solder joint quality inspection; direct chip attach packaging for microsystems; reliability analysis of no-underfill flip chip package; ASIC/memory integration by system-on-package; wafer-level and flip chip designs through solder prediction models and validation; reliability evaluation of under bump metallurgy in two solder systems; a method to improve the efficiency of the CMP process; thermal and reliability analysis of packaging systems