Superconducting sigma-delta analog-to-digital converters

The sigma-delta architecture is the method of choice for designers and manufacturers of analog-to-digital converters (ADCs) for high dynamic range applications. This architecture uses oversampling and precise feedback to generate a shaped spectral distribution of the quantization noise. Subsequent digital filtering suppresses out of band quantization noise, yielding a large signal to in-band noise ratio. This permits the use of quantizers with only a few bits of resolution, most applications use single-bit quantizers. A unique advantage of superconducting electronics is the availability of the flux quantum which can be used to provide quantum mechanically accurate feedback at GHz rates. Josephson digital technology extends the realm of sigma-delta ADCs from MHz sampling rates to GHz sampling rates, from kHz signal bandwidths to MHz signal bandwidths, with comparable or better dynamic range when compared to semiconductor implementations. This paper presents circuits for Josephson sigma-delta ADCs, including single-loop, and double-loop modulators, circuits for quantized feedback, and digital data processing. Experimental results of a double-loop modulator sampling at 1.28 GHz are reported.     

Digital logic circuits

Recent progress in Josephson digital logic circuits is described. It is noted that changing the junction material from a lead alloy to niobium has dramatically improved process reliability, and that high-speed, low-power operations have been demonstrated at large-scale integrated-circuit levels. The first Josephson microprocessor, operated at 770 MHz, verified the potential of Josephson devices for future digital elements. The possibilities of the ultrafast Josephson computer, previously shelved because of a number of problems, are being actively reconsidered. The performance anticipated for Josephson digital circuits using high-temperature superconducting materials is also discussed     

Linewidth measurements and phase locking of Josephson oscillatorsusing RSFQ circuits

We present a technique for linewidth measurement and phase-locking of Josephson oscillators using digital rapid single-flux-quantum (RSFQ) circuits. The oscillator consists of a resistively shunted 6 μm×6 μm Nb/AlO_x/Nb Josephson tunnel junction that is integrated with RSFQ input and output circuits. A cascade of RSFQ T flip-flops is used to directly monitor the output of the Josephson oscillator. Spectral characteristics have been measured directly for oscillator frequencies ranging from 10-50 GHz. The linewidth can be reduced by over 100 times by phase-locking the oscillator to an RSFQ pulse train generated by an external sinusoidal signal. These Josephson oscillators can be used as on-chip stable high frequency clocks for RSFQ circuits     

High-Speed Nb/Nb–Si/Nb Josephson Junctions for Superconductive Digital Electronics

Josephson junctions with cosputtered amorphous Nb–Si barriers are being developed at NIST for use in voltage standard circuits. These junctions have the potential for a wide range of applications beyond voltage standards because their electrical properties can be tuned by controlling both the composition and the thickness of the barrier. If the composition of the barrier is tuned so that the resistivity is close to the metal-insulator transition, the high resistivity allows junctions with a large characteristic voltage and reproducible critical-current densities, which should be ideal for high-speed digital superconductive device applications. Because these junctions are intrinsically shunted, there is no need for external shunt resistors, which could start to become a limitation as the development of devices leads to higher critical-current densities and greater circuit densities. Presently, the $hbox{AlO}_{x}$-barrier junctions used in digital superconducting electronics suffer from poor reproducibility, particularly for the high critical-current densities needed for high-speed applications. In this paper, amorphous Nb–Si barrier junctions with characteristic voltages on the order of 1 mV and characteristic frequencies on the order of hundreds of gigahertz are demonstrated. This junction technology looks promising for applications in high-speed digital electronics.      

Magnetically coupled Josephson D/A converter

Precise, accurate D/A conversion becomes increasingly difficult at high frequencies, especially for low-power devices. The authors have developed a superconducting D/A converter based on the Josephson effect. Following a design of Hamilton et al. (1995), they have added magnetic coupling of the digital input lines to simplify the input interface. In addition, they have converted to a balanced two superconducting quantum interference device (SQUID) unit cell, which allows input-to-output isolation and isolation between input lines white doubling output voltages. Their initial demonstration consists of a 2-bit NbN D/A pumped at 12 GHz, producing output levels of 0, 50, 100, and 150 microvolts into a 50-ohm load with low-speed digital input     

Experimental single flux quantum NDRO Josephson memory cell

Single flux quantum nondestructive readout (NDRO) Josephson memory cells which store an energy of only ~6/spl times/10/SUP -20/ J have been successfully fabricated and operated for the first time. Margin enhancement due to quantization, and low operating currents render this cell an attractive basis for a <1 ns access-time Josephson cache memory designed with a 2.5 /spl mu/m technology.     

Microwave match of low-impedance thin-film Josephson junctions

It is demonstrated how a thin-film low-impedance Josephson junction can be matched in a rectangular waveguide at 9 GHz, thus reducing the necessary power in voltage standard applications by a factor of 250. The method is also applicable to higher frequencies and to microwave devices such as detectors and mixers.     

A niobium nitride-based analog to digital converter using rapidsingle flux quantum logic operating at 9.5 K

An analog to digital converter (ADC) using the rapid single flux quantum (RSFQ) logic family implemented in niobium nitride (NbN) technology is described. The circuit was originally developed and demonstrated in niobium technology. An identical circuit was then laid out, fabricated and demonstrated in NbN technology. The chips were fabricated using an eight-layer NbN-based process with Josephson junction critical current density of 500 A/cm². In this paper, we report on the measurement results for a 6-bit flux quantizing ADC which exhibited proper operation and good DC bias margins. We also demonstrate results from an ADC chip operating up to 9.5 K     

Foreword, May 1980

The next generation of microwave digital systems will require much higher clock frequencies to increase computational speed. Both military and commercial electronics have applications for digital communications with multigigabit-per-second data rates, multi-phase-shift-keyed modulation/demodulation, time multiplexing, frequency division, counting, A/D converters, memories, and frequency and waveform synthesis. During the last several years, significant progress has been made in raising the operating speed of digital microcircuits above the 1-GHz/s level. Advances in silicon IC technology will generate some limited speed improvements, but GaAs IC technology offers a two- to six-times speed improvement for the immediate future and Josephson junction technology projects another two- to three-times speed improvement for the intermediate future.     

Superconducting bandpass /spl Delta//spl Sigma/ modulator with 2.23-GHz center frequency and 42.6-GHz sampling rate

This paper presents a superconducting bandpass /spl Delta//spl Sigma/ modulator for direct analog-to-digital conversion of radio frequency signals in the gigahertz range. The design, based on a 2.23-GHz microstrip resonator and a single flux quantum comparator, exploits several advantages of superconducting electronics: the high quality factor of resonators, the fast switching speed of the Josephson junction, natural quantization of voltage pulses, and high circuit sensitivity. The modulator test chip includes an integrated acquisition memory for capturing output data at sampling rates up to 45 GHz. The small size (256 b) of the acquisition memory limits the frequency resolution of spectra based on standard fast Fourier transforms. Output spectra with enhanced resolution are obtained with a segmented correlation method. At a 42.6-GHz sampling rate, the measured SNR is 49 dB over a 20.8-MHz bandwidth, and a full-scale (FS) input is -17.4 dBm. At a 40.2-GHz sampling rate, the measured in-band noise is -57 dBFS over a 19.6-MHz bandwidth. The modulator test chip contains 4065 Josephson junctions and dissipates 1.9 mW at T=4.2 K.     

Real-time measurements on a four stage RSFQ-counter with Nb–Al2O3–Nb Josephson junctions

RSFQ-toggle-flipflops with a SFQ-trigger circuit a Josephson transmission line at the input and a SFQ/dc-circuit at the output of each stage are implemented in the Nb–Al₂O₃–Nb Josephson junction technology on a single chip having coplanar wave guides at input and output. The counter is tested successfully at 4.2 K via coplanar/coaxial transitions using a bit pattern generator and a digital oscilloscope at room temperature up to f_I≈2 GHz pulse repetition frequency at the input. The highest test frequency f_I is limited by the available pattern generator.     

A CMOS self-calibrating frequency synthesizer

A programmable phase-locked-loop (PLL)-based frequency synthesizer, capable of automatically adjusting the nominal center frequency of the voltage-controlled oscillator (VCO) to an optimum value is described. In fully integrated PLLs, the VCO output frequency should be tunable over a wide range of frequencies, covering the desired range of the synthesizer output frequencies, for all processing variations and operating conditions. A wide tuning range realized by making the VCO gain K_o large has the unwanted effect of increasing the phase noise at the output of the VCO, and hence the PLL as well. In this work, the wide tuning range is realized by digital control, with process variability managed through self-calibration. The PLL is only required to pull the oscillator output frequency to account for the digital quantization, temperature variations, and some margin. This allows the K _o to be small, with better noise performance resulting. The prototype self-calibrating frequency synthesizer, capable of operating from 80 MHz to 1 GHz, demonstrates a measured absolute jitter of 20-ps rms at 480-MHz operating frequency. The prototype IC is fabricated in a 0.35-μm 3-V digital CMOS process     

An Injection-Locked Frequency-Tracking Σ∆ Direct Digital Frequency Synthesizer

A bandpass (BP) sigma-delta modulator (SigmaDeltaM)-based direct digital frequency synthesizer (DDS) architecture is presented. The DDS output is passed through a single-bit, second-order BPSigmaDeltaM, shaping quantization noise out of the signal band. The single-bit BPSigmaDeltaM is then injection locked to an LC-tank oscillator, which provides a tracking BP filter response within its locking range, suppressing the BPSigmaDeltaM out of band quantization noise. The instantaneous digital frequency control word input of the DDS is used to tune the noise shaper center frequency, achieving up to 20% tuning range around the fundamental. The BPSigmaDeltaM-based synthesizer is fabricated in a 0.25-mum digital CMOS process with four layers of metal. With a second-order BP noise shaper and a 44-MHz LC tank oscillator, an SFDR of 73 dB at a 2-MHz bandwidth and phase noise lower than -105 dBc/Hz at a 10-kHz offset is achieved     

A multigigahertz Josephson-semiconductor interface circuit using77-K differential monolithic HEMT amplifier and 4.2-K JJ high-voltagedriver for superconductor-semiconductor electronic hybrid systems

We proposed and successfully demonstrated a high-speed Josephson IC to semiconductor IC output interface circuit combining a high electron mobility transistor (HEMT) amplifier and Josephson high-voltage drivers successfully. We developed a 0.5-μm gate 77-K wide-band analog monolithic HEMT amplifier for the interface. The HEMT device consisted of InGaP/InGaAs materials stable even at 77 K. The amplifier has a differential amplifier as a first stage to cancel out ground-level fluctuations in the Josephson IC and showed a voltage gain of 23 dB and ~3-dB frequency of 8 GHz. A 0.63-V_p-p output was obtained from a 5-GHz, 30-mV_p-p complementary input signal. We succeeded in transfer ring a voltage signal from 10-stack Josephson high-voltage drivers to a 50-Ω system at room temperature with 0.7-V_p-p amplitude at 300-MHz clock using the HEMT amplifier     

A GaAs phase digitizing and summing system for microwave signalstorage

The analysis, design, and development of a microwave signal storage prototype system using phase-quantization sampling are described. A GaAs 4-bit D/A converter has been demonstrated in a 3-bit DRFM (digital RF memory) prototype system with digital Si emitter-coupled logic (ECL) and RF microwave components at a sample rate of 200 MHz and exhibiting typically a -17-dBc harmonic suppression. A monolithic GaAs A/D and D/A converter has been demonstrated within an RF signal acquisition system. Performance data on the monolithic sampler reveal that the 3-bit quantization system exhibits signal reconstruction with harmonic suppression exceeding 25 dB across an IF bandwidth of greater than 900 MHz     

Josephson junction millimeter microwave source and homodyne detector

A millimeter and submillimeter microwave source is described in which a point-contact Josephson junction is used as both the emitter and as a homodyne detector of the microwave radiation. The microwave radiation is conveyed from the Josephson junction to the room-temperature environment outside the Dewar of liquid helium by an oversize waveguide. A room-temperature Fabry-Perot resonator refocuses the radiation on the oversize waveguide which returns the radiation to the emitting junction which also serves as a coherent detector with sensitivity 10^-15W/√Hz. The detector is sufficiently sensitive that the emitted power of 10^-12W can be detected with high signal-to-noise ratio. Power required by the junction is of the order 10^-6W from the bias supply. For the experiments reported, the wavelength of the emission could be varied over discrete wavelengths between 1.1 and 2.6 mm by varying the voltage bias across the junction. These wavelengths corresponded to the resonant frequencies of a cavity tightly coupled to the Josephson junction, and the frequencies can be changed by modifying the geometry of the cavity.     

介观LC回路数-相量子化和Josephson结的Cooper对数-相量子化

传统的介观LC回路的量子化是将电量q和电感与电流的乘积L×I分别作为量子力学中的坐标算符Q和动量算符P来处理;本文采取另外一种量子化的观点,即将电量q(q=en)中的n作为荷数算符,并建立电流和相算符θ之间对应关系,就能实现介观LC回路的数-相范畴的量子化,并得到以数-相算符表示的Hamiltonian;通过引进纠缠态表象,对超导Josephson结也可以实现Cooper对数-相量子化,并给出了相应的物理解释.     

Josephson effect gain and noise in SIS mixers

The authors report measurements of gain and noise in SIS mixers at 230 and 492 GHz. Measurements were made of relatively high gain and noise associated with Josephson currents that have not been previously reported. These measurements show that Josephson currents are increasingly important as operating frequencies are raised. The techniques used to make these measurements are discussed. Measurements made with hot and cold black-bodies are shown to be inaccurate at high frequencies. The problem is that SIS mixers do not always respond linearly to the signal power incident on them. This is particularly important when (1) very broad band mixers are used and (2) Josephson effect currents are important. Both of these circumstances are present in the quasioptical SIS mixers favored for 500 GHz and higher. Monochromatic signals were used to measure gain and noise to get around these problems     

含有超导约瑟夫森结介观互感电路的量子化及其量子效应

给出了含有超导约瑟夫森结的介观互感电路的量子化方案,借助于压缩幺正变换求出了体系的能级以及基态矢量,研究了体系中结端"过剩电荷"(excess charge)与相位差在基态下的量子涨落.结果表明,体系的基态为一旋转的两单模压缩真空态.