Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect

This paper reports an analysis of floating body effect related gate tunneling leakage current behavior of the 40 nm PD SOI NMOS device using bipolar/MOS equivalent circuit approach. As confirmed by the experimentally measured data, the bipolar/MOS equivalent circuit approach could predict the gate tunneling leakage current behavior, which is strongly affected by the parasitic bipolar device in the floating body as observed from the perpendicular electric field along the path of the U-shaped edges of the polysilicon gate.     

Synthesis and analysis for a novel single-stage isolated high power factor correction converter

A novel single-stage isolated high power factor correction (HPFC) converter operating in the discontinuous conduction mode is proposed in this paper. It is an integration of a buck-boost converter with a flyback converter by means of components placement and synchronous switching technology. It can achieve HPFC, tight output voltage regulation and lower voltage stress of the bulk capacitor, which is independent of the loads. The small-signal mathematical model for the proposed converter is derived separately by the averaging method and the current injected equivalent circuit approach. The IsSpice simulations and experimental results successfully verify the dynamics and performances of the proposed converter.     

Essential-coupling-path models for non-contact EMI in switching power converters using lumped circuit elements

This paper proposes a simple lumped circuit modeling approach for describing noncontact EMI coupling mechanisms in switching power converters. The resulting model assumes a minimum number of noise sources and contains essential coupling paths that allow easy physical interpretations. Essentially, all capacitive couplings are represented by an equivalent noise voltage source and six coupling impedances, whereas all inductive couplings are represented by an equivalent noise current source and three coupling impedances. The resulting coupled noise appears as currents flowing into the terminals of the line-impedance-stabilization-network (LISN). The equivalent voltage source can be conveniently approximated as the switching-node-to-zero voltage, which is typically a rectangular pulse of a few hundred volts. The equivalent current source can be modeled as the current flowing around a loop containing the equivalent voltage source and parasitics such as winding capacitance of the power transformer, the snubber capacitance and connection inductances. Also, the coupling impedances can be estimated by making simplifying assumptions about the geometry of the components and tracks, or by direct measurements. Simulations and experiments verify how inductive and capacitive couplings through each path may produce substantial EMI measured by the LISN. Being based on a lumped circuit approach, the proposed model is easy to apply in practice for understanding, diagnosing and approximating EMI behaviors.     

一种分析含受控源电路的去耦等效法

分析含受控源电路是电路分析中的一个难点，尤其在用等效变换法化简电路时，因被控制支路对控制支路有依赖关系，使元件或支路不能合并化简，为此，提出了一种分析含受控源电路的去耦等效方法。由分析得出：在线性网络中，受控源支路一般可去耦等效为一个实际电源或电阻(在相量电路中为阻抗)；对于不包含独立源的线性一端口网络，受控源支路能去耦等效为电阻(在相量电路中为阻抗)。在对受控源去耦等效之后，电路模型中无受控源元件，因而化简后的电路不再受控制量的制约。     

Contributions of the gate current and channel current variation to the post-breakdown MOSFET performance

A new approach to the modelling of the post-breakdown (BD) performance of MOSFETs for circuit simulation is presented, which separately considers the additional post-BD gate current and the variation of the MOSFET channel current. The post-BD gate current is modelled using an improved equivalent circuit whereas the BSIM4 model is used to describe the MOSFET channel current. This approach has allowed to analyse the contributions of both currents on the post-BD I_D-V_D characteristics. The results show that the gate current increase and the variation of the channel current are determining factors of the MOSFET performance degradation after BD.     

Thermal analysis of laser diode module by an equivalent electrical network method

Heat generation and dissipationin LDpackages with-out TEC have been investigated both analytically andexperi mentally[1-4].However,the thermal analysis ofLDMincorporated with a TEC has not yet been suffi-cientlyinvestigated.Afinite element methodtoanalyse…     

UPS滤波研究

针对不间断供电电源(Uninterruptible Power Supply即UPS)产生的谐波，提出一种新型基于基波磁通补偿的串联型有源电力滤波器。从变压器的等效电路得出，只要在变压器的副方注入一个与其原方电流中基波分量方向相反、大小成一定比例的基波电流，便可使串联变压器对基波呈现原方的漏电抗，而对谐波呈现励磁阻抗。实验结果表明此滤波器具有很好的滤波效果。     

基于传输线理论的SRR结构异向介质的研究

根据裂缝环状谐振器(SRR)的结构特点,以及SRR结构在入射电磁场的作用下的电荷、电流分布关系,得到一种描述SRR的等效电路模型,应用传输线理论推导出相应的电报方程,该模型能够精确表征SRR结构复杂的本构关系.仿真数据表明,该模型所描述磁导率的变化趋势与传统的分析方法的结果相吻合;预测SRR的谐振频率精度高.验证了该等效电路模型是合理的、可信的,对分析其负磁导率的产生机理、设计性能更完善的SRR结构的异向介质具有指导意义.     

Transient simulation of heterojunction photodiodes-part I:computational methods

A novel approach is presented for incorporating the transient solution of one-dimensional semiconductor drift-diffusion equations within a general circuit simulation tool. This approach allows simple representation of localized carrier transport models of simulated devices through equivalent circuit elements such as voltage controlled current sources and capacitors. It also lends itself to mixed-mode transient simulation of devices and circuits. The utility of the new simulation approach in state-of-the-art device design is demonstrated by the transient response analysis of a GaAs heterojunction p-i-n photodiode, and by the time-domain analysis of an integrated photoreceiver circuit     

一种基于数值模型的4H-SiC MESFET大信号建模方法

提出了一种基于数值模型的4H-SiC MESFET大信号建模方法.该方法基于4H-SiC MESFET的物理参数和结构参数,采用MEDICI的小信号正弦稳态分析法和高频小信号等效电路,模拟得到电流和电容的非线性特性,通过大信号等效电路,分析了建立4H-SiC MESFET大信号模型的途径.模拟与实验测试值的比较表明这种方法是可行的,可用于预先评估器件大信号工作时的非线性特性,指导4H-SiC MESFET的器件设计.     

关断角控制型软启动器的简化分析与仿真

对于关断角控制型软启动器的三相晶闸管交流调压电路,将其等效为一个随关断角而变化的电抗,结合异步电机简化模型,得出软启动器主电路的等效电路。在此基础上,分析了关断角与电机定子电流、电磁转矩、最大电磁转矩和临界转差率的关系,进一步得到电机的启动电流可由关断角进行控制的结论。仿真结果验证了理论分析的有效性和可行性。     

The Design and Implementation of an On-Line Testable UART

This paper presents the design of a complex integrated circuit realised through a novel on-line test methodology. The circuit and its exact conventional equivalent both have been realised in FPGA technology. As such it represents one of the most complex designs realised to date using on-line test approaches. The approach used—IFIS incorporates dual-rail coding of individual data and a handshaking protocol, which substantially simplifies the detection of failure. Details of the IFIS methodology are given. The IFIS and conventional redesign of a commercial UART are reported, focusing on methodological issues as well as size and speed. Output traces are shown for the IFIS UART on FPGA operating under fault-free conditions and with deliberate failures injected.     

New synthesis method for a branch-line 3 dB hybrid: a hybridapproach comprising planar and transmission line circuit concepts

A synthesis method for a stripline-type branch-line 3-dB hybrid which is based on an equivalent circuit derived by the planar circuit approach is presented. The equivalent circuit of an ideal 3-dB hybrid is derived first from those of the segmented circuit elements, i.e., four three-port junctions and four quarter-wave transmission lines. A systematic synthesis process is then developed upon the basis of the equivalent circuit. Practical hybrid circuit having optimized circuit patterns which were constructed for center frequencies of 3, 5, and 7 GHz are discussed. Their measured characteristics are described. The results are shown to agree well with the theory     

A new common-emitter hybrid-π small-signal equivalent circuitfor bipolar transistors with significant neutral base recombination

The linear superposition approach to the modeling of small-signal parameters in the presence of substantial base recombination, which involves a virtual transistor without base recombination, is identified to cause incorrect emitter current modeling. All of the terminal current changes can be correctly modeled by using the measured forced-V_BE Early voltage in a new equivalent circuit, which properly accounts for NBR and Early effect in a physically consistent manner. As a result, practical situations of small collector-base resistance (τ _μ) can be properly handled, τ_μ is related to the ac current-drive and ac voltage-drive Early voltages, which facilitates parameter extraction and circuit modeling. Measurements on state-of-the-art UHV/CVD SiGe HBT's show that the conventional assumption that τ_μ is far larger than the forced-V_BE output resistance τ₀ does not apply to devices with significant NBR. In practice, τ_μ can be comparable to (and smaller than) τ₀ depending on the device processing, profiles and operating temperature. Temperature dependent data are presented, and circuit implications are discussed based on the new equivalent circuit     

An approximate approach for the inductance coefficients of anelectric circuit containing a number of branches

An approximate approach for calculating the inductance coefficients of an electric circuit containing a number of branches is derived from the definition of an inductance coefficient of a single loop. An equivalent circuit is then developed to calculate the current distribution when lightning strikes a launch tower system. A numerical example is given. The computed results are consistent with the results of test measurements     

Characteristic-function approach to parameter extraction for asymmetric equivalent circuit of on-chip spiral inductors

A novel approach to parameter extraction for an asymmetric equivalent circuit of silicon-on-chip spiral inductors based on measured S-parameter is proposed. The current methodology is based on the linear dependence of a set of characteristic functions on other functions or variables such as /spl omega//sup 2/ in a certain frequency range, and the model parameters can be derived from the corresponding linear coefficients. As applied to an asymmetric single-/spl pi/ equivalent circuit, the extracted parameters can simulate the inductor with a high precision up to 10 GHz.     

A cubical logic circuit modelling for reliability studies

A deeper insight into the problem of reliability analysis for combinational logic circuits is presented. Reliability is defined as the probability that the logic circuit correctly processes a given set of inputs. While the straightforward approach to this evaluation requires a formidable amount of computations, the presented approach is fast, easy to implement, memory efficient and applicable to circuits of any size and complexity. This is due to a new concept for logic circuit modelling, which allows the covering of all possible faults in a circuit by a relatively small number of sets of logically equivalent faults.For modelling purposes the excitations of inputs and the states of terminals in logic gates are presented in the form of a state vector. The logically equivalent state vectors are merged to form highest-order cubes which are mapped onto a gate equivalent graph (GEG). According to the connections among gates in the logic circuit this graphical model is extended to the circuit equivalent graph (CEG), which comprises the highest-order cubes for a circuit in the form of appropriate subgraphs, the so called state graphs (SGs).     

Gas discharge modulation noise in He-Ne lasers

This paper reports measurements on laser light noise and discharge current noise in a 6328 Å He-Ne laser. A cross-correlation experiment shows a strong correlation between the two noise phenomena, indicating that the laser light noise is caused by the modulation of the light beam by the discharge current noise. The discharge current noise has a spectrum with a sharp resonance at 40 kc/s that does not show up in the laser light noise. The noise is represented by an equivalent circuit. By measuring the two noise spectra and the absolute value and the phase of the cross-correlation coefficientcas functions of frequency, it is possible to evaluate some of the components of the equivalent circuit. The values thus obtained turn out to be quite reasonable, which supports the assumptions on which the equivalent circuit is based.     

Finding input signals in a cable current transformer

An approach for reconstructing the input currents in a cable current transformer (CCT) through the output signals is reported. A PSpice circuit simulator is used for the analysis of the transients in the equivalent nonlinear circuit. Such a procedure is very useful in the design of selective earth-fault protections and in many cases when the input excitations are to be found by known reactions     

Consistent modeling of capacitances and transit times of GaAs-based HBTs

This paper investigates how time delays and capacitances observed under small-signal conditions can be consistently accounted for in heterojunction bipolar transistor (HBT) large-signal models. The approach starts at the circuit level by mapping the large-signal equivalent circuit (which consists of charge and current sources) to the well-known small-signal circuit (which consists of capacitances, transit-time, and resistances). It is shown that and how bias dependent charge sources at either pn-junction impact transit-time, base-collector capacitance, and their mutual dependence. It is demonstrated for the example of a GaAs-based HBT that the interrelation of the elements is observed in measurements as predicted. The results of the investigation enhance understanding of HBT model characteristics and provide a criterion to check model consistency.