SnO_2基压敏陶瓷的阻抗谱的研究

研究了掺CoO、Nb2O5、La2O3的SnO2基压敏陶瓷,在25~300℃范围内的电特性。用尼奎斯特图表示了阻抗数据,结果表明:制备的样品有2个时间常数,分别代表两种激活能,一个在低频,一个在高频。这些激活能与晶界氧的吸附及氧与晶粒边界的作用有关,在晶界吸附的O′和O〞作为受主态,有利于形成肖特基势垒。     

磷锑共掺SnO2陶瓷的电阻-温度特性

采用湿化学法制备了磷锑共掺氧化锡Sn1-3xSbxP2xO2+6(x=0.004,0.010,0.030,0.050)材料.利用XRD、SEM、电阻-温度特性测试系统和交流阻抗技术对所制氧化锡材料的物相组成、微观结构及导电特性进行了研究.结果表明:在x=0.004和0.010时,所制氧化锡材料由纯四方结晶相组成,但在x≥0.030时,材料中出现了微量的P2O5和SnP2O7杂质相;所制氧化锡材料的电阻-温度特性具有负温度系数(NTC)效应,选主要是晶粒效应和晶界效应共同作用的结果;最后利用能带理论对该材料的NTC导电机理进行了分析讨论.     

SnO_2陶瓷材料的制备及其气敏特性

研究了Ｓｎ粒的硝酸氧化法、ＳｎＣｌ２溶液化学沉淀法、ＳｎＣｌ２与ＳｎＣｌ４混合盐沉淀法及Ｎａ２ＳｎＯ３溶液化学沉淀法等合成纳米ＳｎＯ２气敏材料的工艺条件、产率、结构和气敏性能及Ａｕ、Ａｇ、Ｐｄ、Ｐｔ等贵金属对不同工艺ＳｎＯ２的气体灵敏度和气敏选择性的影响。实验结果表明,制备工艺,颗粒尺寸,掺杂元素和工作温度等对ＳｎＯ２的气敏特性有影响。     

A study of atypical grain growth properties for SnO2 thin films

SnO₂ thin films were grown on Si substrate using the chemical vapor deposition(CVD) method. The surface of the thin film was examined using a transmission electron microscope (TEM) and a scanning electron microscope (SEM). Atypical shaped grains and atypical columnar structures were observed on the SnO₂ thin films that were exposed to air after first deposition and during re-deposition in anaerobic conditions in the CVD. The electrical properties of SnO₂ thin films feature a lower range of resistance in single mode, but after the atypical particles appear, the electrical resistance decreased.     

Design of a quasi-optical system with variable output beam size

A quasi-optical system consisting of a quasi-optical antenna and two ellipsoidal mirrors can convert the gyrotron output (TE₁₅ mode, 354GHz) into a gaussian-like beam. The waist size of the beam produced is adjusted by moving a second ellipsoidal mirror. The second mirror with focal length of 520mm offers a tunable range from 2.0mm to 5.4mm, and those with focal lengths of 1190mm and 2390mm offer other tunable ranges from 5.1mm to 12.9mm and from 12.0mm to 25.1mm, respectively.     

添加剂对SnO_2系湿敏陶瓷影响的研究进展

SnO2是一种优良的气湿敏陶瓷材料,应用十分广泛,是一类十分有前途的湿敏材料。综述了添加剂对SnO2系湿敏陶瓷的微结构和电性能的影响之研究现状。结果表明:添加适量的LiZnVO4和碱金属,可使材料获得规则的棒状晶粒微结构,低湿电阻较小,灵敏度适中等良好的湿敏性能。并阐明了SnO2系湿敏陶瓷未来的研究方向可以结合TiO2,制备TiO2,SnO2,LiZnVO4和碱金属复合材料。     

Impedance spectroscopy on copper phthalocyanine diodes with surface-induced molecular orientation

Molecular orientation and packing motif governs charge-transport property of organic semiconductor films, especially for planar small molecules. We analyze the surface-induced orientation of copper phthalocyannine (CuPc) molecules deposited on graphene or poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) covered indium-tin-oxide (PEDOT:PSS/ITO). The CuPc films deposited on graphene are templated with preferential face-on stacking, whereas the molecules on PEDOT:PSS/ITO crystallize with edge-on ordering. Static current–voltage measurement and small-signal impedance spectroscopy are combined to elucidate the structural impact on the electrical response when those films are part of a rectifying diode. The graphene-templated diode shows enhanced out-of-plane hole conduction as compared to the diode with a PEDOT:PSS/ITO contact. Equivalent circuits describing charge injection and transport properties are proposed.     

Design of a quasi-optical mode conversion system with variable output beam size

The quasi-optical system consisting of a quasi-optical antenna and two parabolic mirrors can convert the TE₀₃ mode output (f = 301 GHz) of the Gyrotron FU IV into a well collimated, linearly polarized beam. This system offers the possibility of tuning the size of the beam produced from 5 mm up to 24 mm by rotating and moving the two parabolic mirrors.     

SnO2对锂铌钛系微波介电陶瓷性能的影响

用SnO2作为掺杂剂对LiNb0.6Ti0.5–xSnxO3陶瓷进行改性,研究了SnO2添加量对LiNb0.6Ti0.5O3锂铌钛体系陶瓷的烧结性能,显微结构和微波介电性能的影响。结果表明:随着SnO2添加量的增加,陶瓷体密度和介电常数基本保持不变;而Q·f值随SnO2的加入有所提高,而后随SnO2含量继续增加而快速下降;在1100℃的烧结温度下,当x为0.01时,获得微波介电性能优良的微波陶瓷,其εr为67.8,τf为+4×10–6/℃,Q·f为6780GHz。     

Electromigration-induced failures in interconnects with bimodal grain size distributions

Interconnects containing bimodal grain size distributions are known to have lower me-dian times to electromigration-induced failure (MTTF). However, the deviation in the time to failure (DTTF) in such lines has not been well characterized. We find that Al-2%Cu-0.3%Cr interconnects with bimodally distributed grain sizes have MTTF’s which are more than an order of magnitude lower than lines with monomodally distributed small grain sizes. However, the DTTF’s for both types of lines are similar, and in fact slightly lower for lines with bimodal structures. An activation energy of 0.85 eV was obtained both for lines with monomodal large grain structures and bimodal grain struc-tures, suggesting that grain boundary diffusion is the controlling mechanism in both cases. A model based simply on microstructural characteristics,e.g. the distribution of the number of grain boundaries, can explain the lower MTTF’s and DTTF’s for lines with bimodal structures. The implications of bimodal grain size distributions on the reliability of large numbers of lines are discussed. Also, a new, convenient graphical tool for illustrating the failure rate of interconnects with lognormally distributed failure times is presented.     

Efficient architecture of variable size HEVC 2D-DCT for FPGA platforms

This study presents a design of two-dimensional (2D) discrete cosine transform (DCT) hardware architecture dedicated for High Efficiency Video Coding (HEVC) in field programmable gate array (FPGA) platforms. The proposed methodology efficiently proceeds 2D-DCT computation to fit internal components and characteristics of FPGA resources. A four-stage circuit architecture is developed to implement the proposed methodology. This architecture supports variable size of DCT computation, including 4 × 4, 8 × 8, 16 × 16, and 32 × 32. The proposed architecture has been implemented in System Verilog and synthesized in various FPGA platforms. Compared with existing related works in literature, this proposed architecture demonstrates significant advantages in hardware cost and performance improvement. The proposed architecture is able to sustain 4 K@30 fps ultra high definition (UHD) TV real-time encoding applications with a reduction of 31–64% in hardware cost.     

MPPT中一种新型变步长电导增量法的算法研究

世界能源的短缺以及环境污染已成为当今日益严重的问题,改变能源结构,寻找可再生绿色能源愈来愈受到重视。太阳能具有取之不尽、用之不竭、清洁安全等特点,并且太阳能光伏发电系统的研究对于缓解能源危机,减少环境污染,减小温室效应具有重要的意义。在传统的电导增量法的基础上提出了一种光伏电池阵列最大功率点跟踪的变步长电导增量算法。     

一种新的可变步长LMS算法及其性能分析

为了解决基本LMS（Least Mean Square）算法中收敛速度和稳态误差之间的矛盾，提出了一种新的可变步长LMS算法（λNVSS）。该算法通过引入修正系数β和遗忘因子λ，利用当前和过去共M（滤波器阶数）个误差信息来决定下一步的迭代步长。仿真结果显示，λNVSS算法对于平稳过程中的滤波器，能获得较NVSS更快的收敛速度和更小的稳态误差。同时，λNVSS算法还有较好的跟踪跃变系统的能力。     

自混合干涉信号的可变步长LMS滤波处理

为了提高参数估计和测量的精确度,针对干涉信号的特点,介绍了自混合干涉系统的构成,采用对原始自混合干涉信号的实验数据进行相位滤波.提出一种可变步长的LMS自适应滤波算法,该算法能够根据误差的变化调节滤波器的参数,从而提高收敛速度.经过理论分析和计算机仿真表明,经过滤波后的信号能够更好恢复理论模型仿真数据,其均方误差δ达到0.004 5;与传统的LMS滤波处理后的信号其均方误差相比,精度提高了20%.     

Unusually abrupt switching in submicrometer thin-film transistorsusing a polysilicon film with enhanced grain size

Unusually abrupt drain current change observed in polysilicon thin-film transistors (TFTs) with a channel length and width of 1 μm or smaller is discussed. The polysilicon used to fabricate the devices was deposited by low-pressure chemical vapor deposition (LPCVD) and the grain size of the film was enhanced by silicon ion implantation followed by a low-temperature anneal. The TFTs exhibited an abrupt drain current change of more than five orders of magnitude for a corresponding gate voltage change of less than 40 mV. A self-limiting positive feedback loop due to impact ionization currents and/or a parasitic bipolar effect are suggested as possible explanations     

Thermal stability improvements of ITO transparent conducting films with a SnO2 overlayer

采用射频磁控溅射法在ITO玻璃表面沉积了一层15nm左右的SnO2薄膜.利用霍尔效应测试仪、四探针电阻测试仪、场发射电子显微镜及紫外-可见-近红外光谱仪分析了所制薄膜的电学性质、表面形貌和光学性质.结果表明,在300-600℃退火后镀有SnO2覆盖层的ITO(SnO2/ITO)薄膜具有相对好的热学稳定性.在600℃退火后,ITO薄膜的方阻和电阻率分别为88.3Ω/□和2.5×10-3Ω·cm,而此时,SnO2/ITO薄膜的方阻和电阻率仅为43.8Ψ/□和1.2× 10-3Ω·cm.最后,阐述了SnO2覆盖层提高ITO薄膜热稳定性的机制.     

Analysis of a reflectarray antenna using microstrip patches of variable size

Microstrip reflectarrays typically use tuning stubs on each element to adjust the phase of the reflected field. The authors describe a new approach in which the need for tuning stubs is eliminated and phase control is achieved simply by adjusting the resonant length of the patch elements. The advantages of this approach are described, as are a full-wave analysis technique for computing the phase of the reflected field as a function of patch size and a design curve giving the change in patch size for a desired reflected field phase shift.<>     

Applications of a variable step size algorithm to QCEE adaptive IIRfilters

The quadratic constraint equation error (QCEE) method was proposed by Ho and Chan (see ibid., vol.43, no.1, p.51-62, 1995) to achieve bias removal for the equation error adaptive IIR filters. However, this approach is limited to slow convergence in estimation when a small step size is used; large step sizes lead to significant misadjustment. This article presents a variable step size (VSS) technique to greatly improve the QCEE under its quadratic constraint to achieve both fast convergence and reduced misadjustment for adaptive IIR filters     

Phonon spectroscopy of the nano- and microstructured ceramics

A relation of the diffusion coefficient of the subterahertz thermal phonons with the system of intergrain boundaries, grain size and structure, and the technological conditions for the synthesis of ceramics is established. It is demonstrated that the temperature dependence of the phonon diffusion coefficient at liquid-helium temperatures is determined by the spectral properties of the intergrain layer, which makes it possible to estimate the sample-averaged thickness and acoustic impedance. The conditions for and properties of the gap in the natural phonon spectrum of ceramics are studied. Specific features of the transport of sub-terahertz phonons in ceramic samples based on ferroelectric materials, solid solutions of electrolytes, and cermets are analyzed.     

On the pseudo-subthreshold characteristics ofpolycrystalline-silicon thin-film transistors with large grain size

A two-dimensional nonplanar device simulator for polycrystalline-silicon thin-film transistors (poly-Si TFTs) was developed, in which the influence of trapped charges and carrier scattering within the grain boundary region are incorporated into Poisson's equations and drift-diffusion current formulations, respectively. With this simulator, the I-V characteristics of poly-Si TFT devices can be characterized. TFTs in polycrystalline silicon were fabricated to test the simulator. Special attention was paid to the conduction mechanism in poly-Si TFTs with large grain size. A concept called the pseudo-subthreshold region is presented to explain the observed behavior. The key factors affecting the pseudosubthreshold slope were investigated and elucidated using the simulator