Reliability of ultra thin ZrO2 films on strained-Si

Ultra thin high-k zirconium oxide (equivalent oxide thickness 1.57 nm) films have been deposited on strained-Si/relaxed-Si_0.8Ge_0.2 heterolayers using zirconium tetra-tert-butoxide (ZTB) as an organometallic source at low temperature (<200 °C) by plasma enhanced chemical vapour deposition (PECVD) technique in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. The trapping/detrapping behavior of charge carriers in ultra thin ZrO₂ gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Stress induced leakage current (SILC) through ZrO₂ is modeled by taking into account the inelastic trap-assisted tunneling (ITAT) mechanism via traps located below the conduction band of ZrO₂ layer. Trap generation rate and trap cross-section are extracted. A capture cross-section in the range of 10⁻¹⁹ cm² as compared to 10⁻¹⁶ cm² in SiO₂ has been observed. The trapping charge density, Q_ot and charge centroid, X_t are also empirically modeled. The time dependence of defect density variation is calculated within the dispersive transport model, assuming that these defects are produced during random hopping transport of positively charge species in the insulating layer. Dielectric breakdown and reliability of the dielectric films have been studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd > 1500 s) is observed under high constant voltage stress.     

Sensing behavior and mechanism of titanium dioxide-based MOS hydrogen sensor

A Pd/TiO₂/Si MOS sensor (Pdtisin sensor) is proposed for the detection of hydrogen gas. The sensor is fabricated on a p-type 1 1 1 silicon wafer having resistivity of 3–6 Ω cm. The thickness of TiO₂ in this structure is about 600 nm. The capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics of the device is observed on the exposure of hydrogen gas at room temperature. The mechanism of hydrogen sensing of titanium dioxide-based MOS sensor (MOS capacitor) has been investigated by evaluating the change in flat-band voltage (V_FB) and fixed surface state density of the device in presence of hydrogen gas. The device exhibits very large parallel shift in C–V as well in G–V characteristics. The possible mechanism on Pd/TiO₂ and TiO₂/Si surface in presence of hydrogen gas has been proposed. The response and recovery time of the device is also measured at room temperature.     

Electrical properties of Ta/sub 2/O/sub 5/ gate dielectric on strained-Si

High dielectric constant (high-k) thin Ta/sub 2/O/sub 5/ films have been deposited on tensilely strained silicon (strained-Si) layers using a microwave plasma enhanced chemical vapour deposition technique at a low temperature. The deposited Ta/sub 2/O/sub 5/ films show good electrical properties as gate dielectrics and are suitable for microelectronic applications. The feasibility of integration of strained-Si and high-k dielectrics has been demonstrated.     

Design optimization of stacked layer dielectrics for minimum gate leakage currents

An effective model to evaluate the leakage currents for different stacked gates deep submicron MOS transistors is presented. For a given equivalent oxide thickness of a stacked gate, the gate leakage current decreases with an increase of high-k dielectric thickness or a decrease of interlayer thickness. Turning points at high gate biases of the I–V curves are observed for Si₃N₄/SiO₂, Ta₂O₅/SiO₂, Ta₂O₅/SiO_2−yN_y, Ta₂O₅/Si₃N₄, and TiO₂/SiO₂ stacked gates except for Al₂O₃/SiO₂ structure. Design optimization for the stacked gate architecture to obtain the minimum gate leakage current is evaluated.     

Refractory metal silicon device technology

Films 2000–5000 Å thick of Mo or W deposited over thin films of thermally grown SiO₂ are shown to be effective high temperature diffusion masks against both phosphorous and boron. These metal films may be precisely patterned and their diffusion masking properties can be used to define the source and drain regions of MOSFETs. In this manner, self-registered MOSFETs can be fabricated with a portion of the diffusion masking metal film acting as the gate electrode. Using P or B doped deposited glasses as diffusion sources, n or p channel enhancement mode MOSFETs were made by diffusion through the exposed thin SiO₂ film into p and n type Si to form source and drain junctions. Contact was subsequently made by etching holes through the oxide layers to the source and drain regions and to the refractory metal gate electrode buried within the oxide layers. These devices exhibit channel mobilities between 200 and 300 cm²/V-sec at gate voltages about 10 V above threshold. The stability of MOS structures processed in a similar manner has been measured. After being stressed at ±6 × 10⁵ V/cm and 250°C for 15 hr, these devices exhibited shifts in their C---V characteristics less than 200 mV.     

Optoelectronic properties of Zn0.52Se0.48/Si Schottky diodes

Zn_0.52Se_0.48/Si Schottky diodes are fabricated by depositing zinc selenide (Zn_0.52Se_0.48) thin films onto Si(1 0 0) substrates by vacuum evaporation technique. Rutherford backscattering spectrometry (RBS) analysis shows that the deposited films are nearly stoichiometric in nature. X-ray diffractogram of the films reveals the preferential orientation of the films along (1 1 1) direction. Structural parameters such as crystallite size (D), dislocation density (δ), strain (ε), and the lattice parameter are calculated as 29.13 nm, 1.187 × 10⁻¹⁵ lin/m², 1.354 × 10⁻³ lin⁻² m⁻⁴ and 5.676 × 10⁻¹⁰ m respectively. From the I–V measurements on the Zn_0.52Se_0.48/p-Si Schottky diodes, ideality and diode rectification factors are evaluated, as 1.749 (305 K) and 1.04 × 10⁴ (305 K) respectively. The built-in potential, effective carrier concentration (N_A) and barrier height were also evaluated from C–V measurement, which are found to be 1.02 V, 5.907 × 10¹⁵ cm⁻³ and 1.359 eV respectively.     

On the effect of non-degenerate doping of polysilicon gate in thin oxide MOS-devices—Analytical modeling

A one-dimensional model of the polysilicon-gate-oxide-bulk structure is presented in order to analyze the implanted gate MOS-devices. The influence of the ionized impurity concentration in the polysilicon-gate near the oxide and the charge at the polysilicon-oxide interface on the flat-band voltage, threshold voltage, inversion layer charge and the quasi-static C–V characteristic is quantitatively studied. The calculations show a considerable degradation of the inversion layer charge due to the voltage drop in the gate, especially in thin oxide devices. The calculated quasi-static C–V curves agree with the recently published data of implanted gate devices.     

Electrical conduction and dielectric breakdown in aluminum oxideinsulators on silicon

Leakage currents and dielectric breakdown were studied in MIS capacitors of metal-aluminum oxide-silicon. The aluminum oxide was produced by thermally oxidizing AlN at 800-1160°C under dry O₂ conditions. The AlN films were deposited by RF magnetron sputtering on p-type Si (100) substrates. Thermal oxidation produced Al ₂O₃ with a thickness and structure that depended on the process time and temperature. The MIS capacitors exhibited the charge regimes of accumulation, depletion, and inversion on the Si semiconductor surface. The best electrical properties were obtained when all of the AlN was fully oxidized to Al₂O₃ with no residual AlN. The MIS flatband voltage was near 0 V, the net oxide trapped charge density, Q_0x, was less than 10¹¹ cm ^-2, and the interface trap density, D_it, was less than 10¹¹ cm^-2 eV^-1, At an oxide electric field of 0.3 MV/cm, the leakage current density was less than 10^-7 A cm^-2, with a resistivity greater than 10 ¹² Ω-cm. The critical field for dielectric breakdown ranged from 4 to 5 MV/cm. The temperature dependence of the current versus electric field indicated that the conduction mechanism was Frenkel-Poole emission, which has the property that higher temperatures reduce the current. This may be important for the reliability of circuits operating under extreme conditions. The dielectric constant ranged from 3 to 9. The excellent electronic quality of aluminum oxide may be attractive for field effect transistor applications     

Multiferroic Bi 0.7Dy/ 0.3 FeO3 films as high k dielectric material for advanced non-volatile memory devices

Gate dielectric materials having high dielectric constant, low interface state density and good thermal stability are needed for advanced CMOS applications. In this letter, the electrical properties of novel multiferroic Bi_0.7Dy_0.3FeO₃ (BDFO) thin films deposited using the pulsed laser deposition technique on p-type (100) silicon substrate are reported. Using high frequency capacitance-voltage (C-V) measurements, the dielectric constant, effective oxide charge density and interface state density were estimated. The results suggest the potential application of multiferroic BDFO films as gate dielectric material for novel memory devices that can be electrically written and magnetically read.     

Low Weibull slope of breakdown distributions in high-k layers

The reliability of various Al₂O₃, ZrO₂ and Al₂O₃/ZrO₂ double layers with a physical oxide thickness from 3 nm to 15 nm and TiN gate electrodes was studied by measuring time-to-breakdown using gate injection and constant voltage stress. The extracted Weibull slope β of the breakdown distribution is found to be below 2 and shows no obvious thickness dependence. These findings deviate from previous results on intrinsic breakdown in SiO₂, where a strong thickness dependence was explained by the percolation model. Although promising performance on devices with high-k layers as dielectric can be obtained, it is argued that gate oxide reliability is likely limited by extrinsic factors     

High Transconductance MISFET With a Single InAs Nanowire Channel

Metal-insulator field-effect transistors (FETs) are fabricated using a single n-InAs nanowire (NW) with a diameter of d = 50 nm as a channel and a silicon nitride gate dielectric. The gate length and dielectric scaling behavior is experimentally studied by means of dc output- and transfer-characteristics and is modeled using the long-channel MOSFET equations. The device properties are studied for an insulating layer thickness of 20-90 nm, while the gate length is varied from 1 to 5 mum. The InAs NW FETs exhibit an excellent saturation behavior and best breakdown voltage values of V _BR > 3 V. The channel current divided by diameter d of an NW reaches 3 A/mm. A maximum normalized transconductance g_m /d > 2 S/mm at room temperature is routinely measured for devices with a gate length of les 2 mum and a gate dielectric layer thickness of les 30 nm.     

New solutions for intermetal dielectrics using trimethylsilane-based PECVD processes

Trimethylsilane, (CH₃)₃SiH, is a non-pyrophoric organosilicon gas. This material is easily used to deposit dielectric thin films in standard PECVD systems designed for SiH₄. In addition to deposition of standard dielectrics (e.g. SiO₂), trimethylsilane can be used to deposit reduced permittivity (low-k) dielectric versions of amorphous hydrogenated silicon carbide and its oxides. The low-k carbides (k<5.5) are highly insulating and useful as hard masks, etch stops and copper diffusion barriers. The low-k oxides (2.6<k<3.0) are useful as intermetal dielectrics, and exhibit stability and electrical properties which can meet many specifications in device fabrication that are now placed on SiO₂. This paper reviews PECVD processing using trimethylsilane. Examples will show that the 3MS-based dielectrics can be used in place of SiH₄-based oxides and nitrides in advanced device multilevel metal interconnection schemes to provide improved circuit performance.     

Memory effects in hybrid silicon-metallic nanoparticle-organic thin film structures

We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on silicon substrates and using organic thin films as the dielectric layers. These insulating thin films were produced by different methods, including spin-coating (polymethylmethacrylate), thermal evaporation (pentacene) and Langmuir–Blodgett deposition (cadmium arachidate). Gold nanoparticles, deposited at room temperature by chemical self-assembly, were used as charge storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A maximum memory window of 2.5 V was achieved by scanning the applied voltage of an Al/pentacene/Au nanoparticle/SiO₂/p-Si structure between 9 and −9 V.     

Performances of novel Pd/Sn and Pd/Sn/Au ohmic metallizations to n-GaAs

Performance of novel Pd/Sn and Pd/Sn/Au Ohmic metallizations to n-GaAs have been investigated. Metallizations were deposited using a resistance heating evaporator and annealings were performed utilizing a conventional graphite strip annealer (cGSA). Metallization samples were characterized using scanning tunneling microscopy (STM), secondary ion mass spectrometry (SIMS) and current–voltage (I–V) measurements. Contact resistivities, ρ_c, of the metallizations were measured utilizing conventional transmission line model (cTLM) method. Novel Pd/Sn and Pd/Sn/Au Ohmic contacts exhibit better thermal stability compared to non-alloyed Pd/Ge metallization. In order to investigate the effectiveness of novel Pd/Sn and Pd/Sn/Au Ohmic metallizations in device applications, gallium arsenide metal-semiconductor field-effect transistors (GaAs MESFETs) have been fabricated. MESFETs fabricated with Pd/Sn/Au Ohmic contacts show a extrinsic transconductance, g_me, of more than 133 mS/mm for a gate length, L_G, of 2 μm.     

Charge trapping and degradation in high-permittivityTiO2 dielectric films

Suitable replacement materials for ultrathin SiO₂ in deeply scaled MOSFETs such as lattice polarizable films, which have much higher permittivities than SiO₂, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown (TDDB), and capacitance-voltage (C-V) measurements were done on 190 Å layers of TiO₂ which were deposited through the metal-organic chemical vapor deposition (MOCVD) of titanium tetrakis-isopropoxide. Measurements of the high- and low-frequency capacitance indicate that virtually no interface states are created during constant current injection stress. The increase in leakage current upon electrical stress may be due to the creation of uncharged, near interface states in the TiO₂ film near the SiO₂ interfacial layer that give rise to increased tunneling leakage     

Electrical properties of W/Si interfaces with embedded Ge/Si islands

In this work, we investigated electrical and morphological properties of W/p-type Si Schottky diodes with intentional inhomogeneities introduced by macroscopic Ge-islands embedded beneath the interface. The Si-cap layer thickness (or the island-distance to the interface) was progressively reduced by successive chemical etching cycles. Electrical characterizations were achieved through reverse current–voltage (I–V) at room temperature and forward I–V measurements as a function of the temperature. In parallel, Rutherford backscattering spectroscopy analyses were performed to follow the Si-cap/Ge islands chemical thinning down with increasing the number of etching cycles. In addition, the comparison of topographical and electrical properties of the etched silicon-cap layer was carried out by conductive atomic force microscopy analyses with a nanometer-scale resolution. Our results indicate that the areas on the top of islands exhibit lower resistance than those which covered the wetting layer. This lateral variation of resistance at the surface of the semiconductor may correspond to Schottky barrier height inhomogeneities observed on broad area I–V characteristics of Schottky contacts.     

Electrical properties of N2O/NH3 plasma grownoxynitride on strained-Si

Growth of ultrathin (<100 Å) oxynitride on strained-Si using microwave N₂O and NH₃ plasma is reported. X-ray photoelectron spectroscopy (XPS) results indicate a nitrogen-rich layer at the strained-Si/SiO₂ interface. The electrical properties of oxynitrides have been characterized using a metal-insulator-semiconductor (MIS) structure. A moderately low value of insulator charge density (6.1×10¹⁰ cm^-2) has been obtained for NH₃ plasma treated N₂O oxide sample. Nitrided oxide shows a larger breakdown voltage and an improved charge trapping properties under Fowler-Nordheim (F-N) constant current stress     

A novel silicide nanopatterning method for the fabrication of ultra-short channel Schottky-tunneling MOSFETs

A novel nanometer patterning technique was developed to pattern epitaxial CoSi₂ layers and to fabricate Schottky-tunneling MOSFETs. The nanopatterning method is based on the local oxidation of silicide layers. A feature size as small as 50 nm was obtained for 20 nm epitaxial CoSi₂ layers on Si(100) after patterning by local rapid thermal oxidation in dry oxygen. A Schottky-tunneling MOSFET with epitaxial CoSi₂ Schottky contacts at both the source and the drain was fabricated using this nanopatterning method to make the 100 nm gate. The device shows good I–V characteristics at 300 K.     

Breakdown degradation associated with elementary screw dislocations in 4H-SiC pn junction rectifiers

It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vector>2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector=1c with no hollow core) in densities on the order of thousands per cm², nearly 100-fold micropipe densities. This paper describes an initial study into the impact of elementary screw dislocations on the reverse-bias current–voltage (I–V) characteristics of 4H-SiC p⁺n diodes. First, synchrotron white beam X-ray topography (SWBXT) was employed to map the exact locations of elementary screw dislocations within small-area 4H-SiC p⁺n mesa diodes. Then the high-field reverse leakage and breakdown properties of these diodes were subsequently characterized on a probing station outfitted with a dark box and video camera. Most devices without screw dislocations exhibited excellent characteristics, with no detectable leakage current prior to breakdown, a sharp breakdown I–V knee, and no visible concentration of breakdown current. In contrast, devices that contained at least one elementary screw dislocation exhibited 5–35% reduction in breakdown voltage, a softer breakdown I–V knee, and visible microplasmas in which highly localized breakdown current was concentrated. The locations of observed breakdown microplasmas corresponded exactly to the locations of elementary screw dislocations identified by SWBXT mapping. While not as detrimental to SiC device performance as micropipes, the undesirable breakdown characteristics of elementary screw dislocations could nevertheless adversely affect the performance and reliability of 4H-SiC power devices.     

Capacitance-voltage analysis of a high-k dielectric on silicon

正Device characteristics of TiO_2 gate dielectrics deposited by a sol-gel method and DC sputtering method on a P-type silicon wafer are reported.Metal-oxide-semiconductor capacitors with Al as the top electrode were fabricated to study the electrical properties of TiO_2 films.The films were physically characterized by using X-ray diffraction,a capacitor voltage measurement,scanning electron microscopy,and by spectroscopy ellipsometry.The XRD and DST-TG indicate the presence of an anatase TiO_2 phase in the film.Films deposited at higher temperatures showed better crystallinity.The dielectric constant calculated using the capacitance voltage measurement was found to be 18 and 73 for sputtering and sol-gel samples respectively.The refractive indices of the films were found to be 2.16 for sputtering and 2.42 for sol-gel samples.