(Ba0.5Sr0.5)TiO3/LaNiO3异质薄膜的介电调谐特性

用脉冲激光沉积工艺制备Ba0.5Sr0.5TiO3(简称BST)薄膜和Ba0.5Sr0.5TiO3/LaNiO3(简称BST/LNO)薄膜。在650℃原位退火10 min,获得了(100)和(110)择优取向生长的BST和BST/LNO薄膜,薄膜晶粒呈柱状结构,BST薄膜和BST/LNO异质结构薄膜的晶粒尺寸分别为150~200 nm和50~80 nm。在室温和1 MHz条件下,BST薄膜和BST/LNO异质结构薄膜的相对介电常数和介电调谐率分别达811和58.9%、986和60.1%;用LNO作底电极,可增益介电常数和介电调谐率。     

复合陶瓷BaTiO_3/Ni_(0.5)Zn_(0.5)Fe_2O_4的常温巨介电特性研究

采用传统的固相反应法和氧化物陶瓷工艺制备了无铅磁电复合陶瓷(1–x)BaTiO3/x Ni0.5Zn0.5Fe2O4(质量配比,x=0,0.2,0.5,0.8)(BTO/NZF),研究了NZF含量对复合陶瓷的物相组成、微观形貌、致密度和介电性能的影响。结果表明:当NZF含量较低(x=0,0.2,0.5)时,NZF对复合陶瓷有介电稀释效应;当NZF含量较高(x=0.8)时,复合陶瓷晶粒尺寸、致密度及两相间接触面积增大,其NZF含量达到复合陶瓷渗流阈值,产生Maxwell-Wagner(M-W)表面极化效应,使得复合陶瓷在低频(f=40 Hz)下具有高的巨介电常数(ε′=312 238)和较低的介电损耗(tanθ=0.40)。     

基于新型介电弹性体平行板电容器的研究

为了研究具有传感功能的可变电容器,采用新型介电弹性体材料制成平行板电容器。研究了该电容器充放电前后的外形变化及影响电容大小的因素。结果表明:在高压充放电前后,电容器的极板面积和两电极板间距离都发生了明显的变化;电容随着外加电压的增大而增大;在外加电压为6 000 V的条件下,电容随着材料预拉伸的增大出现一极大值,随后又减小,即在变化过程中存在拐点;另外,电容器的电极材料用石墨粉时要比用导电胶时电容大。     

Bi_(1.5)Zn_(1.0)Nb_(1.5)O_7/Ba_(0.5)Sr_(0.5)TiO_3复合薄膜介电性能的频率特性研究

采用射频磁控溅射法在蓝宝石基片上制备了Bi1.5Zn1.0Nb1.5O7(BZN)/Ba0.5Sr0.5TiO3(BST)双层复合薄膜,并研究了该薄膜在100 kHz~6 GHz频率范围内的介电性能。研究结果表明,BZN/BST复合薄膜的介电性能具有良好的频率稳定性。该复合薄膜的介电常数在研究的频率范围内基本与频率无关;其介电损耗在频率低于1 GHz时与频率无关,在频率高于1 GHz时随频率的上升而略微增大;薄膜在研究的频率范围内具有稳定的介电调谐率。     

应用于LED肋片散热的均温板效果实验研究

将紫铜板和不同尺寸的均温板作为均温组件,布置在LED模拟热源与肋片之间,研究它们在不同热流密度下的均温及热阻表现。实验结果表明,紫铜板和均温板都可使肋片底面温差显著下降,但均温板具有更短的启动时间。只有当热流密度超过一定值时,均温板的均温性能才会明显优于紫铜板,同时均温板尺寸对其均温性能有很大的影响。随着热流密度的增大,紫铜板热阻几乎不变,均温板热阻逐渐减小并趋于平缓；大尺寸均温板在获得小温差的同时,热阻也最小。     

添加Bi_4Ti_3O_(12)对BST陶瓷性能的影响

采用固相法制备了添加Bi4Ti3O12(BIT)的(Ba0.71Sr0.29)TiO3(BST)陶瓷,研究了BIT的加入量对所制BST陶瓷的微观结构和介电性能的影响。结果表明:随着BIT添加量的增加,BST陶瓷的晶粒尺寸先减小后增大,相对介电常数(εr)逐渐减小,介质损耗(tanδ)先减小后增大。当添加质量分数26%的BIT于1 120℃烧结,制得的BST陶瓷综合性能较好:εr为1 700,tanδ为0.006,容温特性符合X7R的要求,耐直流电压强度为5.0×103V/mm。     

R.F.溅射Ba_(0.5)Sr_(0.5)TiO_3/RuO_2薄膜及其介电特性研究

用R.F.磁控溅射法在p—Si(100)衬底上沉积Ba0.5Sr0.5TiO3/RuO2异质结,BST薄膜的晶相和表面形貌用XRD和SEM分析,表明在衬底温度为550℃时,薄膜的结晶度高、表面粗糙、晶粒较大.电容器InGa/BST/RuO2的介电特性由ε-V特性和I—V特性描述.薄膜在零偏压下ε=230、tgδ≈0.03.低电场条件下,薄膜的漏电流随电压呈饱和特性,属电子跳跃传导,且通过改善薄膜的结晶度可减小该漏电流.高电场条件下,漏电流符合肖特基发射规律.     

微加工射频可变电容的研究与进展

我们给出并比较各种最新颖的可变电容,这些电容包括上极板水平移动的可变电容、梳状水平移动的可变电容、平行板上下移动的可变电容、平行板梳状上下移动的可变电容、改变介质的交叠面积的可变电容、使用水平执行器的可变电容、使用绝缘衬底实现的可变电容和使用MEMS开关调节电容阵列来实现的可变电容,比较了目前的可变电容的各种结构以得出目前工艺条件可以较容易实现的高Q值的可变电容。     

xCa_(0.8)Sr_(0.2)TiO_3-(1-x)Li_(0.5)La_(0.5)TiO_3系陶瓷介电性能的调控

采用烧成法制备了xCa_(0.8)Sr_(0.2)TiO_3-(1-x)Li_(0.5)La_(0.5)TiO_3(CST-LLT)(x=0.4~0.8)系介质陶瓷,表征了其物相组成、结构特征及介电性能。所制备的材料具有钙钛矿结构特征,随着Li_(0.5)La_(0.5)TiO_3组分的减少,1 170~1 260℃烧结的CST-LLT陶瓷介电常数(ε_r)变化范围在154.8~275.2,而品质因数(Q·f)在1 360~1 479GHz内先增加后逐渐减小,谐振频率温度系数(τ_f)变化范围为(-720.6~470.5)×10~(-6)/℃。当x=0.5,烧成温度为1 200℃,保温3h时,可得到理想的介电性能的介质陶瓷:ε_r=230,Q·f=1 455GHz,τ_f=24.5×10~(-6)/℃。     

(Nd0.5Ta0.5)4+复合离子对BNT-BKT陶瓷微结构及电学性能的影响

采用固相烧结法制备了(Nd_(0.5)Ta_(0.5))~(4+)复合离子调控的Bi_(0.5)(Na_(0.82)K_(0.18))_(0.5)Ti_(1-x)(Nd_(0.5)Ta_(0.5))_xO_3(BNKT-xNT)无铅陶瓷。研究了(Nd_(0.5)Ta_(0.5))~(4+)复合离子掺杂量对BNKT陶瓷的表面形貌、微观结构,以及铁电、介电、储能、阻抗等电学性能的影响。研究结果表明:(Nd_(0.5)Ta_(0.5))~(4+)复合离子进入了BNKT陶瓷的B位并形成了单一的钙钛矿结构;晶粒分布均匀、致密,晶界清晰;(Nd_(0.5)Ta_(0.5))~(4+)复合离子的引入显著降低了BNKT陶瓷的剩余极化强度、饱和极化强度以及矫顽场,电滞回线变得瘦小、细长,储能效率随之升高,并在x=0.08和60×10~3 V/cm电场下达到了70%;储能密度先减小、后增大、再减小,在x=0.04时达到最大值0.36 J/cm~3;电致应变在x=0.03时最大为0.183%;随着掺杂含量的增加,BNKT-xNT陶瓷从铁电相与弛豫铁电相共存转变为弛豫铁电相,其介电常数峰T_m逐渐降低且平坦化;交流阻抗谱表明BNKT-xNT陶瓷在低温下具有良好的绝缘性。     

High-density MIM capacitors using Al2O3 andAlTiOx dielectrics

We have investigated the electrical characteristics of Al₂ O₃ and AlTiO_x MIM capacitors from the IF (100 KHz) to RF (20 GHz) frequency range. Record high capacitance density of 0.5 and 1.0 μF/cm² are obtained for Al₂ O₃ and AlTiO_x MIM capacitors, respectively, and the fabrication process is compatible to existing VLSI backend integration. However, the AlTiO_x MIM capacitor has very large capacitance reduction at increasing frequencies. In contrast, good device integrity has been obtained for the Al₂O₃ MIM capacitor as evidenced from the small frequency dependence, low leakage current, good reliability, small temperature coefficient, and low loss tangent     

Structural and Electrical Characters of Ba0.6Sr0.4TiO3/La0.5Sr0.5CoO3 Thin Films by Plus Laser Deposition

Epitaxial Ba0.6Sr0.4TiO3 (BST) thin films were deposited on LaAlO3 (LAO) substrates with the conductive metallic oxide La0.5Sr0.5CoO3 (LSCO) film as a bottom electrode by pulsed laser deposition (PLD). X-ray diffraction ~2 and Ф scan showed that the epitaxial relationship of BST/LSCO/LAO was [001] BST//[001] LSCO//[001] LAO. The atomic force microscope (AFM) revealed a smooth and crack-free surface of BST films on LSCO-coated LAO substrate with the average grain size of 120 nm and the RMS of 1.564 nm for BST films. Pt/BST/LSCO capacitor was fabricated to perform CapacitanceVoltage measurement indicating good insulating characteristics. For epitaxial BST film, the dielectric constant and dielectric loss were determined as 471 and 0.03, respectively. The tunabilty was 79.59% and the leakage current was 2.6310-7 A/cm2 under an applied filed of 200 kV/cm. Furthermore, it was found that epitaxial BST (60/40) films demonstrate well-behaved ferroelectric properties with the remnate polarization of 6.085 C/cm2 and the coercive field of 72 kV/cm. The different electric properties from bulk BST (60/40) materials with intrinsic paraelectric characteristic are attributed to the interface effects.     

Characterization of pulsed laser deposited Ba0.6Sr0.4TiO3 on Pt-coated silicon substrates

The high dielectric constant (Ba,Sr)TiO₃ (BST) films have been widely used to realize capacitors integrated on silicon with a high value of capacitance. The multilayer Pt/Ti/SiO₂/Si is one of the most currently used bottom electrodes for the integration of BST on silicon. However, the crystal orientation and the dielectric properties of ferroelectric thin films are greatly influenced by the underlying Pt/Ti metallization, and particularly by the out-diffusion of titanium towards the platinum surface during thermal treatments. In this study, we show that the heating stage of the Pt/Ti/SiO₂/Si substrate before the BST pulsed laser deposition is of primary importance in both favoring the (1 1 1) growth of the BST material within a wide range of oxygen deposition pressure and in reducing drastically the loss tangent values of Al/BST/Pt capacitors because of the oxygen saturation of platinum. Electrical measurements indicate the existence of an interfacial layer degrading the capacitance. They support the presence of an interfacial depleted layer. The dramatic increase of the loss tangent under positive polarities applied on the platinum electrode is attributed to the ohmic contact of the BST/Al interface. Except this increase, all of the electrical properties are very promising in view to realize capacitors with high capacitance value and low dispersion.     

Tunable barium strontium titanate thin film capacitors for RF andmicrowave applications

The measurement results for thin film barium strontium titanate (BST) based voltage tunable capacitors intended for RF applications are reported. At 9 V DC, BST capacitors fabricated using MOCVD (metalorganic chemical vapor deposition) method achieved 71% (3.4:1) tunability. The measured device quality factor (Q) for BST varactors is comparable with the device Q for commercially available varactor diodes of similar capacitance. The typical dielectric loss tangent was in the range 0.003-0.009 at VHF. Large signal measurement and modeling results for BST thin film capacitors are also presented     

Temperature dependence of Al/undoped Al0.5Ga0.5As/GaAs capacitors

Undoped Al0.5Ga0.5As is used in place of the insulator layer in the fabrication of MIS-type capacitors with Schottky gates. The current-voltage and capacitance-voltage characteristics of the capacitors were measured as a function of temperature in the range 300-77 K. At high temperatures current is by thermionic emission over the barrier determined by the Schottky contact and the Al0.5Ga0.5As/ GaAs conduction band discontinuity. As the temperature is lowered, Fowler-Nordheim tunneling is observed at sufficiently large gate biases and at 77 K conduction is ohmic. Based on I-V and C-V data the electron accumulation layer density is estimated to be about 1 × 10¹²cm^-2at 77 K when the capacitor is positively biased. The results obtained indicate that for an appropriate choice of parameters it should be possible to fabricate MIS-like transistors suitable for high-speed operation at 77 K.     

Wide-Tunable Low-Field Interdigitated Barium Strontium Titanate Capacitors

This letter reports low-field wide-tunable interdigitated barium strontium titanate (BST) capacitors. The capacitors consisting of BST thin film dielectric, silicon substrate, and gold metallization have been fabricated. The capacitance exhibits 0.2 pF at zero-bias and shows a tunability of 63% with an applied electric field of 1.4 V/mum. This corresponds to a 3.5 mum electrode gap width and a 5 V dc bias. Microwave measurements reveal a zero bias film quality of 50 around 30 GHz.     

High Density Double and Triple Layer Tantalum Pentoxide Decoupling Capacitors

High-performance integrated circuits (ICs) require extremely low impedance power distribution. The low voltage, high current requirements of these devices must be provided by decoupling capacitors very close to the IC. Currently this decoupling is provided by discrete surface mount capacitors with relatively high parasitic inductance, requiring many devices in parallel to provide low impedance at high frequencies. Thin film, large area tantalum pentoxide (TaO) dielectric capacitors exhibit very low parasitic inductance, but have been limited in capacitance density to 100nF/cm for single layer devices. Multilayer thin film capacitors can substantially increase the available capacitance. These multilayer thin film capacitors can be fabricated in a variety of ways, allowing them to be embedded between FR-4 layers, under ICs, or even embedded in IC packages. We previously described the initial results of two-layer capacitors fabricated on silicon . These devices had two dielectric layers and three copper plates. Recently we extended the technology to three dielectric layers, and fabricated devices with dielectrics as thin as 1000, to yield a total capacitance density of 0.6F/cm. Capacitors were fabricated on silicon wafers by sputtering a metal plate topped with tantalum, and then wet anodizing the tantalum layer. The process was repeated to create a multilayer stack. The stack was then patterned from top to bottom by successive lithographic and etching steps. This paper will describe the fabrication process in detail. Detailed electrical properties for the resulting two and three layer devices, such as capacitance density, leakage current, breakdown voltage, and impedance will be presented. Using the three-layer process, we fabricated devices for inclusion in a 3-D electronic assembly for a DARPA program, and these devices will be described. Screening and test methods to ensure device reliability will be briefly discussed.     

Analysis of electrical characteristics of Au/SiO2/n-Si (MOS) capacitors using the high-low frequency capacitance and conductance methods

The purpose of this paper is to analyze electrical characteristics in Au/SiO₂/n-Si (MOS) capacitors by using the high-low frequency (C_HF-C_LF) capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements have been carried out in the frequency range of 1 kHz-10 MHz and bias voltage range of (−12 V) to (12 V) at room temperature. It was found that both C and G/ω of the MOS capacitor were quite sensitive to frequency at relatively low frequencies, and decrease with increasing frequency. The increase in capacitance especially at low frequencies is resulting from the presence of interface states at Si/SiO₂ interface. Therefore, the interfacial states can more easily follow an ac signal at low frequencies, consequently, which contributes to the improvement of electrical properties of MOS capacitor. The interface states density (N_ss) have been determined by taking into account the surface potential as a function of applied bias. The energy density distribution profile of N_ss was obtained from C_HF-C_LF capacitance method and gives a peak at about the mid-gap of Si. In addition, the high frequency (1 MHz) capacitance and conductance values measured under both reverse and forward bias have been corrected for the effect of series resistance (R_s) to obtain the real capacitance of MOS capacitors. The frequency dependent C-V and G/ω-V characteristics confirm that the N_ss and R_s of the MOS capacitors are important parameters that strongly influence the electrical properties of MOS capacitors.     

Influence of the metal electrode on the characteristics of thermal Ta2O5 capacitors

The effect of various electrodes (Al, W, TiN) deposited by evaporation (Al) and sputtering (W, TiN) on the electrical characteristics of thermal thin film (15-35 nm) Ta₂O₅ capacitors has been investigated. The absolute level of leakage currents, breakdown fields, mechanism of conductivity, dielectric constant values are discussed in the terms of possible reactions between Ta₂O₅ and electrode material as well as electrode deposition process-induced defects acting as electrically active centers. The dielectric constant values are in the range 12-26 in dependence on both Ta₂O₅ thickness and gate material. The results show that during deposition of TiN and Al a reaction that worsens the properties of Ta₂O₅ occurs while there is not an indication for detectable reduction of Ta₂O₅ when top electrode is W, and the leakage current is 5-7 orders of magnitude lower as compared to Al and TiN-electroded capacitors. The high level of leakage current for TiN and Al gate capacitors are related to the radiation defects generated in Ta₂O₅ during sputtering of TiN, and damaged interface at the electrode due to a reaction between Al and Ta₂O₅, respectively. It is demonstrated that the quality of the top electrode affects the electrical characteristics of the capacitors and the sputtered W is found to be the best. The sputtered W gate provides Ta₂O₅ capacitors with a good quality: the current density <7 × 10⁻¹⁰ A/cm² at 1 V (0.7 MV/cm, 15 nm thick Ta₂O₅). W deposition is not accompanied by an introduction of a detectable damage leading to a change of the properties of the initial as-grown Ta₂O₅ as in the case of TiN electrode. Damage introduced during TiN sputtering is responsible for current deterioration (high leakage current) and poor breakdown characteristics. It is concluded that the sputtered W top electrode is a good candidate as a top electrode of storage capacitors in dynamic random access memories giving a stable contact with Ta₂O₅, but sputtering technique is less suitable (favorable) for deposition of TiN as a metal electrode due to the introduction of radiation defects causing both deterioration of leakage current and poor breakdown characteristics.     

$hboxBaSm_2hboxTi_4hboxO_12$Thin Film for High-Performance Metal–Insulator–Metal Capacitors

A high capacitance density of 4.84$hboxfF/muhboxm^2$and a low leakage current density of 4.28 fA/pF$cdot$V were obtained for a 138-nm-thick crystalline$hboxBaSm_2hboxTi_4hboxO_12$(BST) film. The 100-nm-thick amorphous BST film exhibited a high capacitance density of 3.91$hboxfF/muhboxm^2$and a low leakage current of 1.24 fA/pF$cdot$V. The crystalline BST film had quadratic and linear voltage coefficient of capacitance (VCC) of$-hbox295 hboxppm/V^2$and 684 ppm/V, respectively, and a temperature coefficient of capacitance (TCC) of$-hbox136 hboxppm/^circhboxC$at 100 kHz. The amorphous BST film also showed quadratic and linear VCCs of 48.6$hboxppm/V^2$and$-$738 ppm/V, respectively, with a low TCC of 169$hboxppm/^circhboxC$at 100 kHz.