PY22型温度表等新产品通过鉴定

上海电表厂在1981年内先后试制成功下列10种新产品,并通过了技术鉴定.1.PY22型面板式数字温度表.感温元件为各种WZB型铂电阻或WZG型铜电阻,精度为±1℃分辨率为0.5℃.2.PY23型面板式数字温度表.配用LL-2、LB-3、EU-2、EA-2四种热电偶,精度为±0.3%满     

一种具有±0.5℃精度的CMOS数字温度传感器

该文设计了一种基于0.35μm CMOS工艺的采用双极型晶体管作为感温元件的数字温度传感器.该温度传感器主要由正温度系数电流产生电路、负温度系数电流产生电路、一阶连续时间Σ-Δ调制器、计数器和I2C总线接口等模块组成.为提高温度传感器的测量精度,该文深入分析了在不采用校准技术的情况下工艺漂移对温度传感器精度的影响,并在...     

光纤维温度的传感器

日本某公司研制成一种用于红外一可见变换发光的光纤维温度传感器.与应用荧光体的温度传感器不同,它是由红外发光二极管激励发光,发光和接收元件都采用半导体元件,所以提高了可靠性,而且减少了光纤维传输损耗,增长了计测的距离.在温度计测中,也可以利用光学现象,根据余辉积分亮度这种新的感温     

热电偶测温系统设计

用热电偶测量温度是航空温度测量中应用最广泛的一种方式,常用来测量高温气流及高速气流。提出了一种可以应用于管道内流体测量的热电偶测温系统的设计方法:以热电偶作为感温元件,配合变换器实现准确可靠的温度测量,输出的电压信号与对应温度成线性关系。通过设计实例及试验,验证了系统的精度性能,实现了预期的设计目标。     

自调微型节流制冷器感温管的试验研究

使用了一种新型材料制成的感温管,代替了微型节流制冷器原来自调机构的不锈钢感温管。在自调机构的充气压力,波纹管刚度和工质不变的情况下,仅只改变感温管的材料制作了新的制冷器,通过试验和测试,新制成的制冷器性能有了很大提高。     

一种基于SWC的数字温度计的设计

SWC是一种将感温元件与模数转换(A/D)集成于一体的新型数字式温度传感器。采用SWC设计了一种电路结构简单、可靠的数字温度计,测试表明,该数字温度计具有测温快速、准确的特点。     

中航实现某红外探测器国产化 填补关键空白

据《中国航空报》报道,近日,中航工业南方科研课题《某型挂飞训练弹红外探测器国产化研究》通过专家组验收评审,标志着南方公司某型挂飞训练弹的红外探测器国产化工作取得圆满成功。红外探测器组件是某型挂飞训练弹实现目标捕获及跟踪的重要元件。在训练弹的研制初期,红外探测器组件中制冷器关键元件的感温材料问题在国内无法得到解决,只能采用外购原品。为此,南方公司成立项目组着手进行攻关,展开     

黑体炉温度数字显示装置

本文介绍了一种中温黑体炉配用的简单适用的温度数字显示装置。它采用铂电阻作感温元件,非线性R-V转换电路进行线性化,三重积分型A/D转换,以四位数字进行温度显示。测温范围为73K到1000K,分辨率0.1K,精度为0.1％,并且附有炉温上限的设定和超温报警电路。黑体炉系统加装此显示装置后,提高了测温精度,简化了系统,方便了使用。     

冰箱温控器的简易修理

家用电冰箱若出现温控失灵的故障,通常是由于温度控制器的感温系统异常所致。而感温系统密封不良,导致感温介质逐渐渗漏,则是产生故障的根本原因。本文介绍一种向感温系统重新灌注感温介质的简易方法,供读者参考。1.对温控器感温系统试压。将温控器感温系统毛细铜管原焊接处焊开(或切     

DX型中波发射机整流柜泄放电路的优化设计

DX型中波发射机播出运行时若遭遇持久的雷暴天气或外电不稳等因素的干扰,会引发发射机频繁重启,并伴随发射机频繁保护放电,触发DX型泄放电阻感温接点因升温闭合,产生保护信号,致使PB关机,这样虽然避免了泄放电阻因为温度过高而烧损,但却会造成较长时间停播.针对此情况,对设备中原有的电荷泄放线路进行优化设计和改造,使恶劣因素干扰下播出的发射机在频繁启动过程中不再频繁放电,既避免了放电元件受损,也避免出现关机停播.     

Integrated SMD pressure/flow/temperature multisensor for compressed air in LTCC technology: Thermal flow and temperature sensing

In this work, we present and analyse the flow-sensing part of a recently-developed multisensor in LTCC (low-temperature co-fired ceramic) technology; this device integrates flow/pressure/temperature sensing and is designed for diagnostics monitoring of standard industrial compressed air circuits and devices such as valves and actuators. In this prototype, flow is sensed using the constant-temperature anemometric principle, with temperature-sensing active and reference thermistors placed in the fluidic channel integrated within the LTCC structure. The LTCC bridge structuration technology and electronics are analysed, and possible improvements in fabrication yield and efficiency outlined.     

Self-Powered Light-Temperature Dual-Parameter Sensor Using Nb-Doped SrTiO3 Materials Via Thermo-Phototronic Effect

Multifunctional sensors that can simultaneously detect light and thermal stimuli play an essential role in the research of portable devices and complex arrays of electronics. Lots of effort has been made to realize the simultaneous detection of light and temperature in a standalone device. However, since there is a strong interference of electric signals, accurate simultaneous sensing remains a challenge. Here, a self-powered dual-parameter sensor based on thermo-phototronic effect in Nb-doped SrTiO₃ (NSTO) single crystal to achieve decoupled light and temperature sensing is developed. High light- and temperature-sensing sensitivities of 0.201 µA mW cm⁻² and 16.77 µA K⁻¹ are realized, respectively. The excellent simultaneous sensing capability may be attributed to effective light-to-electrical and thermal-to-electrical energy conversion in the NSTO crystal. The excellent simultaneous sensing performance of the dual-parameter sensors, together with their ease of fabrication, pushes forward the development of highly sensitive multifunctional sensors.     

共振隧穿三极管(RTT)———共振隧穿器件讲座(10)

在简述共振隧穿三极管(RTT)的特点、定义、分类的基础上,全面、系统地介绍了各种结构RTT的材料结构、器件结构、工作原理、制造工艺及器件性能参数等,对某些RTT还给出了其应用前景。由于RTT的器件结构种类繁多,其工作原理也存在差异。为了便于介绍,在栅型RTT中以Schottky栅RTT为重点,在复合型RTT中以发射极中含DBS的RTBT和RTD/HEMT型RTT为重点进行了较为详细的阐述。总之,栅型RTT结构比较简单,但增益和驱动能力较小;复合型RTT结构较复杂,但增益和驱动能力较大,而且易于和HBT或HEMT电路兼容。     

Efficiency of body biasing in 90-nm CMOS for low-power digital circuits

The efficiency of body biasing for leakage reduction and performance improvement in a 90-nm CMOS low-power technology with triple-well option is evaluated. Static measurements of single devices and dynamic measurements of ring oscillators and 32-b parallel prefix adders are presented. Whereas forward biasing still provides a significant performance improvement of up to 37% for low-leakage devices with 2.2-nm gate oxide thickness, the application of reverse biasing to reduce subthreshold leakage currents is inefficient due to additional leakage currents such as gate leakage and gate-induced drain leakage. Experimental results confirm that, in 90-nm CMOS circuits, the efficiency of body biasing strongly depends on the device type and operating temperature. Moreover, the impact of the zero-temperature coefficient point on static device and dynamic circuit performance is investigated.     

Thermal detection of device failure by atomic force microscopy

Device and interconnect electrical failures often occur in the form of short or open circuits which produce hot or cold spots under voltage bias. With the minimum device feature size shrinking to 0.25 μm and less, it is impossible to locate the exact position of defects by traditional thermal or optical techniques such as infra-red emission thermometry, liquid crystals or optical beam induced current. We have used a temperature-sensing probe in an atomic force microscope to locate a hot spot created by a short-circuit defect between the gate and the drain of a Si MOSFET with a spatial resolution of about 0.5 μm. The technique has the potential to produce spatial resolutions in the range of 0.05 μm and efforts are underway to reach this goal     

亚100nm SOI器件的结构优化分析

分析了SOI器件各结构参数对器件性能的影响,给出了器件各结构参数的优化方向,找出了可行硅膜厚度和可行沟道掺杂浓度之间的设计容区.在部分耗尽与全耗尽SOI器件的交界处,阈值电压的漂移有一个峰值,在器件设计时应避免选用这一交界区.此外,随着硅膜厚度的减小,器件的泄漏电流随着沟道掺杂浓度的不同,有一个极小值.通过模拟分析发现,只要合理选择器件的结构参数,就能得到性能优良的SOI器件     

Schottky‐Barrier‐Controllable Graphene Electrode to Boost Rectification in Organic Vertical P–N Junction Photodiodes

Monolayer graphene is used as an electrode to develop novel electronic device architectures that exploit the unique, atomically thin structure of the material with a low density of states at its charge neutrality point. For example, a single semiconductor layer stacked onto graphene can provide a semiconductor–electrode junction with a tunable injection barrier, which is the basis for a primitive transistor architecture known as the Schottky barrier field‐effect transistor. This work demonstrates the next level of complexity in a vertical graphene–semiconductor architecture. Specifically, an organic vertical p‐n junction (p‐type pentacene/n‐type N,N′‐dioctyl‐3,4,9,10‐perylenedicarboximide (PTCDI‐C₈)) on top of a graphene electrode constituting a novel gate‐tunable photodiode device structure is fabricated. The model device confirms that controlling the Schottky barrier height at the pentacene–graphene junction can (i) suppress the dark current density and (ii) enhance the photocurrent of the device, both of which are critical to improve the performance of a photodiode.     

Device mismatch and tradeoffs in the design of analog circuits

Random device mismatch plays an important role in the design of accurate analog circuits. Models for the matching of MOS and bipolar devices from open literature show that matching improves with increasing device area. As a result, accuracy requirements impose a minimal device area and this paper explores the impact of this constraint on the performance of general analog circuits. It results in a fixed bandwidth-accuracy-power tradeoff which is set by technology constants. This tradeoff is independent of bias point for bipolar circuits whereas for MOS circuits some bias point optimizations are possible. The performance limitations imposed by matching are compared to the limits imposed by thermal noise. For MOS circuits the power constraints due to matching are several orders of magnitude higher than for thermal noise. For the bipolar case the constraints due to noise and matching are of comparable order of magnitude. The impact of technology scaling on the conclusions of this work are briefly explored.     

Fundamental narrow MOSFET gate dielectric breakdown behaviors and their impacts on device performance

The post-breakdown (BD) degradation of ultrathin gate oxide Si MOSFET devices is studied by electrical characterization, cross-sectional transmission electron microscopy (TEM) analysis, and theoretical simulation. It is shown that MOSFET devices can remain functional even if a physically direct short between the gate electrode and Si substrate is established. On the other hand, a device can suffer from total failure while no physical damages can be observed under TEM. The physical location of the BD point is shown to be of critical importance in determining the type of BD and the post-BD electrical characteristics of the device. The ability to precisely categorize the gate oxide BD modes in narrow MOSFETs enables us to reevaluate the impact of the gate dielectric BD on the post-BD device performance, and its influence at the circuit levels.