基于SABL的防御差分功耗分析移位寄存器设计

通过对传统移位寄存器原理和灵敏放大型逻辑(Sense Amplifier Based Logic,SABL)电路的研究,提出一种能够防御差分功耗分析的移位寄存器设计方案。该方案首先采用主从触发的方式,设计基于SABL电路的清零置位D触发器;然后利用该触发器与SABL逻辑门实现多位移位寄存器电路。Spectre仿真验证表明,所设计的移位寄存器逻辑功能正确,在多种PVT组合下NED均低于2.66%、NSD均低于0.63%,具有显著的防御差分功耗分析性能。     

基于FPGA的可变长度移位寄存器优化设计

结合FPGA的结构,针对高速数据采集系统中触发控制单元的特点,提出了采用优化结构的可变长度移位寄存器改进基于FPGA的触发控制单元的方法,同时从器件的搭配和寄存器结构两方面探讨了可变长度移位寄存器的优化方案,并给出了应用示例。     

可编程S盒及反馈移位寄存器的设计方法

可编程S盒和可编程反馈移位寄存器是可编程密码芯片的两个重要的部件。文章给出了可编程S盒和可编程反馈移位寄存器的一种逻辑设计方法,按照该方法设计的S盒能够通过编程实现任意的布尔逻辑函数,按照该方法设计的反馈移位寄存器能够通过编程灵活地改变反馈抽头和反馈函数。     

基于Virtex-5的PN码发生器设计

提出了基于Virtex-5的常用PN序列的VHDL实现方法。PN序列是扩频系统的核心,它的生成需要运用线性反馈移位寄存器（LSFRs）。在Virtex-5系列FPGA中,每个查找表（LUT）都可被配置成一个16位的移位寄存器。因此,可以用最少的资源有效地实现PN发生器。首先介绍了PN序列的实现原理,接着详细阐述了其VHDL设计方法,并进行了性能评估。该设计在工程实践中已经得到使用,并取得了很好的效果。     

基于CompactPCI的抗恶劣环境CAN总线模块设计

为了扩展抗恶劣环境计算机的CAN总线接口,提出了一种基于CompactPCI的抗恶劣环境CAN总线模块的设计方法。该方法中包括基于CompactPCI的抗恶劣环境CAN总线模块的设计思路和实现过程。在该方法采用了FPGA实现寄存器设计与逻辑控制,在工控3U板幅上实现了4路光电隔离CAN总线接口的紧凑设计。该方法应经投入应用,在应用过程中取得了良好的效果。     

基于AES的可重构加密系统的FPGA设计

针对传统软件加密方法在速度和资源消耗上的不足,提出了基于AES高级加密标准的硬件设计方案。采用了目前流行的EDA技术,在FPGA芯片上实现一种可重构的加密系统,利用硬件描述语言实现加密算法中的移位、S盒置换函数、线性反馈移位寄存器等功能,设计输入、模型综合、布局布线、功能仿真都在Altera公司的Quartus II开发平台中完成,产生的下载文件通过Cyclone系列的FPGA芯片进行测试。实验结果表明,该系统具有独特的物理安全性和高速性。     

基于新型FPGA的FFT设计与实现

在基于FPGA的FFT设计中,为了提高速度,本文提出了用移位寄存器存储旋转因子的方法,并且在Altera公司的Stratix系列的FPGA上做了验证。实验结果表明,该方法和普遍采用ROM做旋转因子存储器的方法相比,大幅提高了FFF的处理速度,能够更好地满足了FFT实时处理的要求。     

可重构线性反馈移位寄存器设计

线性反馈移位寄存器是序列密码的重要组成部分,介绍了一种可重构线性反馈移位寄存器的设计.根据需要,它可以被配置成为GF(2),GF(28),GF(216)或GF(232)域上一定长度范围内的任意一个线性反馈移位寄存器.该可重构线性反馈移位寄存器原型已在Altera公司的EP2S60F1020C5 FPGA上实现,最高可工作在100 MHz时钟下.试验结果表明:该可重构线性反馈移位寄存器占用硬件资源少,性能稳定.     

基于FPGA的并串转换电路硬件实现

并串转换电路在通信接口中具有广泛的应用,可编程逻辑阵列由于具备灵活、可重构等特点非常适应于并串转换硬件电路的实现。为了解决硬件电路结构中资源与性能的矛盾,分析比较了移位寄存器、计数器与组合逻辑条件判定三种不同的并串转换硬件电路结构,并通过设计仿真对其进行了功能验证和性能评估。实验结果表明采用移位寄存器的实现方法具有最优的速度性能,采用计数器的实现方法具有最优的性价比,采用组合逻辑条件判定的实现方法具有最少的寄存器资源消耗,可根据实际应用需求合理选择并串转换硬件电路实现方式。     

一种基于FPGA的可重构计算系统设计

介绍可重构计算的概念和基于SRAM工艺的FPGA器件的特点。设计了一种基于FPGA器件的可重构计算系统,着重讲述了该系统的在线重配置电路的总体结构,FIFO、FPGA配置逻辑模块、控制寄存器和控制逻辑等功能模块及系统的工作流程。最后探讨了可重构计算相关研究面临的问题和发展方向。     

正规逻辑程序回答集存在性研究

判断逻辑程序的回答集是否存在是回答集程序设计的一个重要问题,也是NP完全问题。当前利用否定圈边数的奇偶性来判断回答集存在性的方法还具有一定的局限性,即:对于非分层逻辑程序,现有方法并不能准确判断其回答集存在性。针对该问题,提出了一种新的基于否定圈的判断方法,给出了该判断方法的算法框架,证明了算法的正确性,并以实例分析说明了方法的有效性。     

基于格值一阶逻辑LF（X）的自动推理算法

基于谓词逻辑的归结推理方法是目前理论上较为成熟、可以在计算机上实现的推理方法之一。针对格值一阶逻辑LF(X)中归结自动推理问题,以格值一阶逻辑LF(X)的α-归结原理为理论基础,通过对例子进行分析,提出了LF(X)中简单广义子句集的归结自动推理算法,并证明了该算法的可靠性和完备性。     

Item-Location Assignment Using Fuzzy Logic Guided Genetic Algorithms

In today's logistics environment, large-scale combinatorial problems will inevitably be met during industrial operations. This paper deals with a novel real-world optimization problem, called the item-location assignment problem, faced by a logistics company in Shenzhen, China. The objective of the company in this particular operation is to assign items to suitable locations such that the required sum of the total traveling time of the workers to complete all orders is minimized. A stochastic search technique called fuzzy logic guided genetic algorithms (FLGA) is proposed to solve this operational problem. In GA, a specially designed crossover operation, called a shift and uniform based multi-point (SUMP) crossover, and swap mutation are adopted. The performance of this novel crossover operation is tested and is shown to be more effective by comparing it to other crossover methods. Furthermore, the role of fuzzy logic is to dynamically adjust the crossover and mutation rates after each ten consecutive generations. In order to demonstrate the effectiveness of the FLGA and make comparisons with the FLGA through simulations, various search methods such as branch and bound, standard GA (i.e., without the guide of fuzzy logic), simulated annealing, tabu search, differential evolution, and two modified versions of differential evolution are adopted. Results show that the FLGA outperforms the other search methods in all of the three considered scenarios.      

粘贴DNA计算模型的几种分子逻辑门的实现

理论上来说,基于DNA的分子逻辑门是DNA计算机体系结构的产生基础和DNA计算机实现技术的硬件基础。在这篇论文中,我们在先前提出的基于粘贴DNA计算模型的分子逻辑与门的实现方法的基础上,进一步提出了基于粘贴DNA计算模型的分子逻辑或门和与非门的实现方法。与先前方法类似,逻辑门、输入信号和输出信号是DNA分子。可以实现OR,NOT和NAND类型的逻辑门操作。需要使用包括聚合酶链反应(PCR),琼脂糖凝胶电泳,探针的标记与检测等生物工程技术。这些技术集成于DNA芯片中可用于DNA计算机的研制。     

Mean shift tracker combined with online learning-based detector and Kalman filtering for real-time tracking

Color-based visual object tracking is one of the most commonly used tracking methods. Among many tracking methods, the mean shift tracker is used most often because it is simple to implement and consumes less computational time. However, mean shift trackers exhibit several limitations when used for long-term tracking. In challenging conditions that include occlusions, pose variations, scale changes, and illumination changes, the mean shift tracker does not work well. In this paper, an improved tracking algorithm based on a mean shift tracker is proposed to overcome the weaknesses of existing methods based on mean shift tracker. The main contributions of this paper are to integrate mean shift tracker with an online learning-based detector and to newly define the Kalman filter-based validation region for reducing computational burden of the detector. We combine the mean shift tracker with the online learning-based detector, and integrate the Kalman filter to develop a novel tracking algorithm. The proposed algorithm can reinitialize the target when it converges to a local minima and it can cope with scale changes, occlusions and appearance changes by using the online learning-based detector. It updates the target model for the tracker in order to ensure long-term tracking. Moreover, the validation region obtained by using the Kalman filter and the Mahalanobis distance is used in order to operate detector in real-time. Through a comparison against various mean shift tracker-based methods and other state-of-the-art methods on eight challenging video sequences, we demonstrate that the proposed algorithm is efficient and superior in terms of accuracy and speed. Hence, it is expected that the proposed method can be applied to various applications which need to detect and track an object in real-time.     

基于逻辑Petri网的服务流程结构演化研究

流程结构演化是实现服务流程重构的一种有效手段,可以充分利用已有流程资源快速定制满足新业务需求的服务流程.然而,当前服务演化研究多关注于流程局部组成服务以及接口参数的兼容替换,对于流程结构演化所提供的操作过于简单,难以应对复杂流程演化场景.针对上述问题,提出一种基于逻辑Petri网的服务流程结构演化形式化描述方法.利用逻辑Petri网将服务流程建模为服务网,在服务网的基础上,针对不同的演化需求构建相应的结构演化运算;引入结构范式概念评价服务流程的结构健壮性,并借助逻辑Petri网的结构性质来分析与验证所建立的演化运算对流程结构范式的级别保持问题.给出了基于流程结构演化的服务流程定制框架,并基于所提出结构演化运算设计开发了仿真验证平台,验证了方法的有效性.     

基于均值偏移的彩色图像分割算法

提出了一种基于均值偏移的彩色图像分割算法。首先阐述了在CIE LUV均匀彩色模型下均值偏移算法的基本原理,然后给出了在图像分割中的具体实现方法：选定一个像素,在适当的空间窗和色彩窗限定的特征空间中寻找模式点,实现窗口中心从选定点到模式点的偏移,重复此过程,直到找到稳定的模式点并用模式点的色彩值代替该像素,遍历所有像素,最终达到对所有像素进行聚类。通过两幅图像对算法进行检验,实验结果证明该算法对彩色图像具有良好的分割效果。     

Interval type-2 fuzzy inverse controller design in nonlinear IMC structure

In the recent years it has been demonstrated that type-2 fuzzy logic systems are more effective in modeling and control of complex nonlinear systems compared to type-1 fuzzy logic systems. An inverse controller based on type-2 fuzzy model can be proposed since inverse model controllers provide an efficient way to control nonlinear processes. Even though various fuzzy inversion methods have been devised for type-1 fuzzy logic systems up to now, there does not exist any method for type-2 fuzzy logic systems. In this study, a systematic method has been proposed to form the inverse of the interval type-2 Takagi-Sugeno fuzzy model based on a pure analytical method. The calculation of inverse model is done based on simple manipulations of the antecedent and consequence parts of the fuzzy model. Moreover, the type-2 fuzzy model and its inverse as the primary controller are embedded into a nonlinear internal model control structure to provide an effective and robust control performance. Finally, the proposed control scheme has been implemented on an experimental pH neutralization process where the beneficial sides are shown clearly.     

利用新型的电源屏蔽实现方法降低测试功耗

为了削减芯片在测试过程中由于测试向量移入/移出所导致的静态功耗和动态功耗,提出一种电源屏蔽实现方法.在后端设计布局阶段,首先以时钟门控单元为参考点将触发器聚类摆放,以实现时序逻辑与组合逻辑在物理上的隔离;然后引入屏蔽单元对电源网络进行修改,最终解决扫描触发器与组合逻辑异构供电的难题.针对龙芯3号浮点乘积模块的实验结果表明,采用该方法可以节省45%的测试功耗,面积稍有增加,而对性能和测试覆盖率几乎没有影响,并且可以容易地嵌入目前的主流设计方法中.