晶圆尺寸级封装器件的热应力及翘曲变形

晶圆尺寸级封装(WLCSP)器件的尺寸参数和材料参数都会对其可靠性产生影响。使用有限元分析软件MSCMarc,对EPS/APTOS生产的WLCSP器件在热循环条件下的热应力及翘曲变形情况进行了模拟,分析了器件中各个尺寸参数对其热应力及翘曲变形的影响。结果表明:芯片厚度、PCB厚度、BCB厚度和上焊盘高度对WLCSP的热应力影响较为明显。其中,当芯片厚度由0.25mm增加到0.60mm时,热应力增加了21.60MPa;WLCSP的翘曲变形主要受PCB厚度的影响,当PCB厚度由1.0mm增加到1.60mm时,最大翘曲量降低了20%。     

基于析因实验设计的QFN热可靠性分析

在微电子封装器件的生产或使用过程中,由于封装材料热膨胀系数不匹配,不同材料的交界处会产生热应力,热应力是导致微电子封装器件失效的主要原因之一。文章采用MSC．Marc有限元软件,分析了QFN器件在回流焊过程中的热应力、翘曲变形、主应力及剪应力,并由析因实验设计得到影响热应力的关键因素。研究表明：在回流焊过程中,QFN器件的最大热应力出现在芯片与粘结剂接触面的边角处;主应力和剪切应力的最大值也出现在芯片与粘结剂连接的角点处,其值分别为21．42MPa和-28．47MPa;由析因实验设计可知粘结剂厚度对QFN热应力的影响最大。     

基于析因实验设计的QFN热可靠性分析

在微电子封装器件的生产或使用过程中,由于封装材料热膨胀系数不匹配,不同材料的交界处会产生热应力．热应力是导致微电子封装器件失效的主要原因之一。采用MSC．Marc有限元软件．分析了QFN器件在回流焊过程中的热应力、翘曲变形、主应力及剪应力,并由析因实验设计得到影响热应力的关键因素。研究表明：在回流焊过程中,QFN器件的最大热应力出现在芯片与粘结剂接触面的边角处：主应力和剪切应力的最大值也出现在芯片与粘结剂连接的角点处．其值分别为21．42MPa和-28．47MPa：由析N实验设计可知粘结剂厚度对QFN热应力的影响最大。     

基于析因实验设计的QFN热可靠性分析

在微电子封装器件的生产或使用过程中,由于封装材料热膨胀系数不匹配,不同材料的交界处会产生热应力,热应力是导致微电子封装器件失效的主要原因之一。本文采用MSC．Marc有限元软件,分析了QFNN件在回流焊过程中的热应力、翘曲变形、主应力及剪应力,并由析因实验哼殳计得到影响热应力的关键因素。研究表明：在回流焊过程中,QFN器件的最大热应力出现在芯片与粘结剂接触面的边角处;主应力和剪切应力的最大值也出现在芯片与粘结剂连接的角点处,其值分别为21．42MPa和-28．47MPa;由析因实验设计可知粘结剂厚度对QFN热应力的影响最大。     

响应曲面法在叠层封装结构优化中的应用

本文对八层叠层CSP封装器件进行热应力分析。结果表明,热应力集中出现在上层芯片（die8）、die7的悬置端和底层芯片（die1）与粘结剂的边角处。进一步,采用响应曲面法（RSM）与有限元分析相结合的方法研究die8、die7、die1和粘结剂厚度对器件热应力的影响。应用响应曲面法优化芯片和粘结剂的厚度以得到最小VonMises应力,其结果为106．87Mpa。与初始设计时的应力值143．9Mpa相比减小了25．7％。应力减小有助于提高封装产品的可靠性。     

多芯片叠层封装中的芯片应力分析及结构优化

针对典型的四层芯片叠层封装产品,采用正交试验设计与有限元分析相结合的方法研究了芯片、粘合剂、顶层芯片钝化层和密封剂等十个封装组件的厚度变化对芯片上最大热应力的影响,并利用找到的主要影响因子对封装结构进行优化.结果表明,该封装产品可以在更低的封装高度下实现,并具有更低的芯片热应力水平及更小的封装体翘曲,这有助于提高多芯片叠层封装产品的可靠性.     

基于三维多芯片柔性封装的热应力分析

利用ANSYS软件针对一种三维多芯片柔性封装结构进行建模,通过有限元2D模型模拟该封装结构在热循环温度-40~125℃条件下产生的热应力/应变情况,讨论了芯片厚度、基板厚度、微凸点高度及模塑封材料对热应力/应变的影响。结果表明,三维多芯片柔性封装体的等效热应力发生在微凸点与芯片的连接处,其数值随着芯片厚度的减薄呈递减趋势;基板厚度也对热应变有一定的影响;增加微凸点高度有利于减小等效热应力;通过比较塑封材料得知,采用热膨胀系数较大,且杨氏模量与温度的依赖关系较强的模塑封材料进行塑封会产生较大应变。     

叠层芯片封装元件热应力分析及焊点寿命预测

研究了温度循环载荷下叠层芯片封装元件(SCSP)的热应力分布情况,建立了SCSP的有限元模型。采用修正后的Coffin-Masson公式,计算了SCSP焊点的热疲劳寿命。结果表明:多层芯片间存在热应力差异。其中顶部与底部芯片的热应力高于中间的隔离芯片。并且由于环氧模塑封材料、芯片之间的热膨胀系数失配,芯片热应力集中区域有发生脱层开裂的可能性。SCSP的焊点热疲劳寿命模拟值为1 052个循环周,低于单芯片封装元件的焊点热疲劳寿命(2 656个循环周)。     

空洞对功率芯片粘贴焊层热可靠性影响的分析

采用有限元方法,建立了功率器件封装的三维有限元模型,分析了封装体的温度场和应力场,讨论了芯片粘贴焊层厚度、空洞等因数对大功率器件封装温度场和应力场的影响.有限元结果表明,封装体的最高温度为73.45℃,位于芯片的上端表面,焊层热应力最大值为171 MPa,出现在芯片顶角的下面位置.拐角空洞对芯片最高温度影响最大,其次是中心空洞.空洞沿着对角线从中点移动到端点,芯片最高温度先减小后增加.焊层最大热应力出现在拐角空洞处,最大值为309 MPa.最后分析了芯片粘贴工艺中空洞形成的机理,并根据有限元分析结论对工艺的改善优化提出建议.     

粘结剂形态及尺寸对QFN器件热应力的影响

使用有限元软件MSC.Marc分析了芯片粘结剂的形态、厚度和宽度对典型微电子封装QFN(四方扁平无引脚封装)器件热应力的影响。结果表明:在有限元网格密度相同的条件下,粘结剂形态的不同会对QFN器件的热应力产生较大影响,粘结剂无溢出形态的最大热应力为85.87MPa,而粘结剂有溢出形态的最大热应力为77.84MPa,并且最大热应力出现的位置也不同;粘结剂的厚度和宽度对热应力的影响不明显;由于粘结剂形态的不同界面热应力的分布会有较大差别。     

Finite element analysis for solder ball failures in chip scale package

The failure mechanism of solder ball connect in chip scale package (CSP) utilizing wire-bonded ball grid array was elucidated using finite element analysis in this study. The macro-micro-coupling technique was used in the current model. There exist two factors which contribute to solder ball cracking: shear stress due to thermal expansion mismatch between the package and the PCB and warpage of the package itself. This study revealed that shear stress due to the thermal expansion mismatch prevailed over warpage of the package in causing the solder ball cracking in the present type of CSP.     

多目标优化方法在叠层QFN封装结构优化中的应用

文章采用响应曲面法试验设计与有限元仿真相结合的方法对叠层QFN封装器件在热循环条件下进行仿真分析,通过优化结构参数来降低叠层QFN封装在热循环条件下的Von Mises应力和封装翘曲。使用多目标优化设计方法中的统一目标法来综合考虑Von Mises应力和封装翘曲。应用遗传算法对评价函数在约束条件下进行搜索最优解,得出叠层QFN封装结构优化的方案,以提高封装的可靠性。     

Procedure for design optimization of a T-cap flip chip package

In this study, a 1/4 three-dimensional finite element model of a T-cap flip chip package containing the substrate, underfill, solder bump, silicon die, metal cap and cap attachment was established to conduct thermo-mechanical reliability study during the flip chip fabrication processes. The applied thermal load was cooled from 183 °C to ambience 25 °C to determine the thermal stress and warpage during the curing period of solder ball mounting process. Under fixed geometry, two levels of underfill, metal caps and cap attachments were used to conduct the 2³ factorial design for determining reliable material combinations. The statistical tests revealed that the significant effects affecting the thermal stress were the underfill, metal cap, cap attachment and the interaction between the underfill and cap attachment. The metal cap, cap attachment and their interaction significantly affected the warpage. The proposed regression models were used to perform the surface response simulations and were useful in selecting suitable materials for constructing the package. This study provides a powerful strategy to help the designer to easily determine reliable packaging structures under various reliability considerations.     

LQFP和eLQFP热机械可靠性的有限元分析

封装形式的差异性对产品可靠性具有重要影响。基于有限元法,对比分析了薄型四方扁平封装(LQFP)和载体外露薄型四方扁平封装(eLQFP)在室温和回流焊温度下的翘曲、芯片和粘片胶的应力水平以及各材料界面应力分布。研究表明,LQFP的翘曲比eLQFP的大,但芯片和粘片胶上的最大应力无明显差别;eLQFP在塑封材料与芯片有源面界面的应力水平比LQFP的大;eLQFP在芯片与粘片胶界面、粘片胶与芯片载体界面的剪切应力比LQFP的大,但eLQFP在芯片与粘片胶界面、粘片胶与芯片载体界面的剥离应力比LQFP的小;eLQFP在塑封材料与芯片载体镀银区界面的应力水平高于LQFP的应力水平,由于塑封材料与镀银芯片载体的结合强度弱,eLQFP更易发生界面分层。     

基于内聚力模型脱粘仿真的内埋芯片PI分层研究

芯片埋入式封装技术的难点主要集中在封装制造过程对芯片造成的一系列不利影响,如裂纹、分层、翘曲、静电等.基板埋入芯片的特殊结构,大大增加了封装工艺难度.首先根据开发过程中出现的芯片聚酰亚胺分层现象建立简化模型,其次应用ANSYS工具中的内聚力单元对界面脱粘过程进行了模拟仿真,并分析了模型的等效应力值分布.结果 表明,实验...     

Characterization of the Effect of Shape Memory Alloy on Solder Joint Strength Through Modeling and Testing

Currently some of the most common problems that surface mount technology encounters are warpage, delamination, and inelastic strain concentration accumulated in the solder joint during thermal cycling because of mismatch of thermal expansion coefficient between the package and chip side. Material as well as package structure are the critical issues with respect to these problems. The objective of this research is to investigate how shape memory alloy (SMA) applied in the under bump metallization (UBM) can affect solder joint reliability under thermal mechanical stress. Joint strength tests revealed the better strength of solder joints with SMA UBM after accelerated thermal cycling test. Finite element modeling as well as multilayer stress calculations revealed less strain accumulated in the solder and more stress concentrated in Si in the solder joint with SMA UBM. A mechanism by which the SMA accommodates most of the stress and strain caused by the mismatch of the thermal expansion coefficients was proposed to explain the reinforcement of the solder joint by the SMA UBM.     

Deformation Behavior of MEMS Gyroscope Sensor Package Subjected to Temperature Change

In microelectromechanical system (MEMS) devices, the deformation of MEMS structure caused by packaging induced stress is of great concern since it directly affects the performance of the device. In this paper, deformation behavior of the MEMS gyroscope package subjected to temperature change is investigated using a high-sensitivity moire interferometry. Temperature dependent analyses of warpage and extension/contraction of the package are presented. Analysis of the package reveals that global bending deformation occurs due to the mismatch of the coefficient of thermal expansion between the chip, the molding compound, and the printed circuit board. Detailed global and local deformations of the package by temperature change are investigated, and their effect on the frequency shift of the MEMS gyroscope is studied. It is found that package deformation or package induced stress results in the frequency shift of the MEMS gyroscope structure. In order to increase robustness of the structure against deformation, a "crab-leg" type spring is replaced with a semi-folded spring. The results show that the frequency shift is greatly reduced after applying the semi-folded spring. This frequency shift is within the tolerance limit of the gyroscope sensor in this work     

Warpage evolution of overmolded ball grid array package during post-mold curing thermal process

Two of the main driving forces for warpage deformation and residual stress in electronic packages are the thermal expansion mismatch between dissimilar package constituents and the crosslinking reaction of polymers during packaging thermal processes. For the purpose of quantitatively characterizing these two driving forces and assessing the process effect on warpage deformation, experimental and numerical analyses were applied to study the warpage evolution of overmolded ball grid array (BGA) package under post-mold curing (PMC) thermal histories. From in situ shadow Moiré warpage analyses on bimaterial and package specimens, it was observed that, during the isothermal curing condition, a significant increase in specimen warpage occurred as a result of molding compound shrinkage. A numerical modeling procedure that incorporates the models for the thermochemical cure kinetics, the curing- and chemical aging-induced shrinkage strains, and the cure-dependent viscoelastic relaxation modulus for the molding compound was then applied to simulate and compare to the experimentally obtained warpage evolutions. It can be seen from the analysis results that the evolution of package warpage over multiple thermal histories can be superpositioned by the thermal expansion mismatch-driven warpage change during non-isothermal stages and the chemical shrinkage-induced warpage evolution during isothermal aging at temperatures above the material glass transition point.