Controlled Doping of Wafer‐Scale PtSe2 Films for Device Application

Semiconductive transition metal dichalcogenides (TMDs) have been considered as next generation semiconductors, but to date most device investigations are still based on microscale exfoliation with a low yield. Wafer scale growth of TMDs has been reported but effective doping approaches remain challenging due to their atomically thick nature. This work reports the synthesis of wafer‐scale continuous few‐layer PtSe₂ films with effective doping in a controllable manner. Chemical component analyses confirm that both n‐doping and p‐doping can be effectively modulated through a controlled selenization process. The electrical properties of PtSe₂ films have been systematically studied by fabricating top‐gated field effect transistors (FETs). The device current on/off ratio is optimized in two‐layer PtSe₂ FETs, and four‐terminal configuration displays a reasonably high effective field effect mobility (14 and 15 cm² V^?1 s^?1 for p‐type and n‐type FETs, respectively) with a nearly symmetric p‐type and n‐type performance. Temperature dependent measurement reveals that the variable range hopping is dominant at low temperatures. To further establish feasible application based on controllable doping of PtSe₂, a logic inverter and vertically stacked p–n junction arrays are demonstrated. These results validate that PtSe₂ is a promising candidate among the family of TMDs for future functional electronic applications.     

Bottom-Up Synthesized Nanoporous Graphene Transistors

Nanoporous graphene (NPG) can exhibit a uniform electronic band gap and rationally-engineered emergent electronic properties, promising for electronic devices such as field-effect transistors (FETs), when synthesized with atomic precision. Bottom-up, on-surface synthetic approaches developed for graphene nanoribbons (GNRs) now provide the necessary atomic precision in NPG formation to access these desirable properties. However, the potential of bottom-up synthesized NPG for electronic devices has remained largely unexplored to date. Here, FETs based on bottom-up synthesized chevron-type NPG (C-NPG), consisting of ordered arrays of nanopores defined by laterally connected chevron GNRs, are demonstrated. C-NPG FETs show excellent switching performance with on–off ratios exceeding 10⁴, which are tightly linked to the structural quality of C-NPG. The devices operate as p-type transistors in the air, while n-type transport is observed when measured under vacuum, which is associated with reversible adsorption of gases or moisture. Theoretical analysis of charge transport in C-NPG is also performed through electronic structure and transport calculations, which reveal strong conductance anisotropy effects in C-NPG. The present study provides important insights into the design of high-performance graphene-based electronic devices where ballistic conductance and conduction anisotropy are achieved, which could be used in logic applications, and ultra-sensitive sensors for chemical or biological detection.     

Enhanced performance of multilayer MoS2 transistor employing a polymer capping layer

Two-dimensional (2D) MoS₂ field-effect transistors (FETs) have attracted many attentions due to their intriguing electronic, optical, and mechanical properties. In this work, the electrical properties of multilayer MoS₂ FETs are significantly enhanced by using water-soluble polyvinyl alcohol (PVA) polymer as the capping layer. The key parameter, field-effect mobilities (μ), can be increased from 0.28 cm²/Vs to 269.2 cm²/Vs after applying the PVA capping layer, which means it has almost three orders of magnitudes increase. An energy band diagram based on Schottky barrier modulation is proposed to understand the device mechanism. The results represent a significant step towards applications of 2D MoS₂ FETs for future integrated circuit, sensors, and flexible electronics.     

High-performance C60 and picene thin film field-effect transistors with conducting polymer electrodes in bottom contact structure

C₆₀ and picene thin film field-effect transistors (FETs) in bottom contact structure have been fabricated with poly(3,4-ethylenedioxythiophene): poly(styrenesulfonate) (PEDOT:PSS) electrodes for a realization of mechanical flexible organic FETs. The C₆₀ thin film FETs showed n-channel enhancement-type characteristics with the field-effect mobility μ value of 0.41 cm² V^?1 s^?1, while the picene thin film FET showed p-channel enhancement-type characteristics with the μ of 0.61 cm² V^?1 s^?1. The μ values recorded for C₆₀ and picene thin film FETs are comparable to those for C₆₀ and picene thin film FETs with Au electrodes.     

AIGaAsSb Buffer/Barrier on GaAs substrate for InAs channel devices with high electron mobility and practical reliability

InAs/AlGaAsSb deep quantum well was successfully formed on GaAs substrate and examined for two electron devices, Hall elements (HEs), and field-effect transistors (FETs). With a thin buffer layer of 600 nm AIGaAsSb on GaAs substrate, we observed high electron mobility more than 23000 cm²/Vs and extrinsic effective electron velocity of 2.2 x 10⁷ cm/s for a 15 nm thick InAs channel at room temperature. AIGaAsSb lattice matched to InAs was discussed from the view points of insulating property, carrier confinement, and oxidization rate. Reliability data good enough for practical use were also obtained for HEs. We demonstrated AIGaAsSb as a promising buffer/barrier layers for InAs channel devices on GaAs substrate, and we discussed the possible advantages of AIGaAsSb also for InGaAs FETs.     

Fast,Self‐Driven,Air‐Stable,and Broadband Photodetector Based on Vertically Aligned PtSe2/GaAs Heterojunction

Group‐10 layered transitional metal dichalcogenides including PtS₂, PtSe₂, and PtTe₂ are excellent potential candidates for optoelectronic devices due to their unique properties such as high carrier mobility, tunable bandgap, stability, and flexibility. Large‐area platinum diselenide (PtSe₂) with semiconducting characteristics is far scarcely investigated. Here, the development of a high‐performance photodetector based on vertically aligned PtSe₂‐GaAs heterojunction which exhibits a broadband sensitivity from deep ultraviolet to near‐infrared light, with peak sensitivity from 650 to 810 nm, is reported. The I_light/I_dark ratio and responsivity of photodetector are 3 × 10⁴ and 262 mA W^?1 measured at 808 nm under zero bias voltage. The response speed of τ_r/τ_f is 5.5/6.5 µs, which represents the best result achieved for Group‐10 TMDs based optoelectronic device thus far. According to first‐principle density functional theory, the broad photoresponse ranging from visible to near‐infrared region is associated with the semiconducting characteristics of PtSe₂ which has interstitial Se atoms within the PtSe₂ layers. It is also revealed that the PtSe₂/GaAs photodetector does not exhibit performance degradation after six weeks in air. The generality of the above good results suggests that the vertically aligned PtSe₂ is an ideal material for high‐performance optoelectronic systems in the future.     

Implementation of Low‐Power Electronic Devices Using Solution‐Processed Tantalum Pentoxide Dielectric

The development of solution‐processed field effect transistors (FETs) based on organic and hybrid materials over the past two decades has demonstrated the incredible potential in these technologies. However, solution processed FETs generally require impracticably high voltages to switch on and off, which precludes their application in low‐power devices and prevent their integration with standard logic circuitry. Here, a universal and environmentally benign solution‐processing method for the preparation of Ta₂O₅, HfO₂ and ZrO₂ amorphous dielectric thin films is demonstrated. High mobility CdS FETs are fabricated on such high‐κ dielectric substrates entirely via solution‐processing. The highest mobility, 2.97 cm² V^?1 s^?1 is achieved in the device with Ta₂O₅ dielectric with a low threshold voltage of 1.00 V, which is higher than the mobility of the reference CdS FET with SiO₂ dielectric with an order of magnitude decrease in threshold voltage as well. Because these FETs can be operated at less than 5 V, they may potentially be integrated with existing logic and display circuitry without significant signal amplification. This report demonstrates high‐mobility FETs using solution‐processed Ta₂O₅ dielectrics with drastically reduced power consumption; ≈95% reduction compared to that of the device with a conventional SiO₂ gate dielectric.     

An inkjet-printed passivation layer based on a photocrosslinkable polymer for long-term stable pentacene field-effect transistors

Herein, we investigate the effects of the solvents used in the passivation process on the behavior of pentacene field-effect transistors (FETs) and report on the fabrication of a passivation layer for pentacene FETs via inkjet-printing using photocrosslinkable poly(vinyl alcohol), N-methyl-4(4′formylstyryl) pyridinium methosulfate acetal (SbQ-PVA). The passivated pentacene FETs – composed of inkjet-printed SbQ-PVA containing polystyrene/SiO₂ and poly(4-vinyl phenol)/SiO₂ dual-layer gate dielectrics – retain their electrical properties for much longer periods than the unpassivated devices. Studies of the device performance show that inkjet-printed passivation is better than spin-coated passivation.     

Coexistence of Negative and Positive Photoconductivity in Few-Layer PtSe2 Field-Effect Transistors

Platinum diselenide (PtSe₂) field-effect transistors with ultrathin channel regions exhibit p-type electrical conductivity that is sensitive to temperature and environmental pressure. Exposure to a supercontinuum white light source reveals that positive and negative photoconductivity coexists in the same device. The dominance of one type of photoconductivity over the other is controlled by environmental pressure. Indeed, positive photoconductivity observed in high vacuum converts to negative photoconductivity when the pressure is raised. Density functional theory calculations confirm that physisorbed oxygen molecules on the PtSe₂ surface act as acceptors. The desorption of oxygen molecules from the surface, caused by light irradiation, leads to decreased carrier concentration in the channel conductivity. The understanding of the charge transfer occurring between the physisorbed oxygen molecules and the PtSe₂ film provides an effective route for modulating the density of carriers and the optical properties of the material.     

Achieving Ultrahigh Electron Mobility in PdSe2 Field-Effect Transistors via Semimetal Antimony as Contacts

Even though atomically thin 2D semiconductors have shown great potential for next-generation electronics, the low carrier mobility caused by poor metal–semiconductor contacts and the inherently high density of impurity scatterings remains a critical issue. Herein, high-mobility field-effect transistors (FETs) by introducing few-layer PdSe₂ flakes as channels is achieved, via directly depositing semimetal antimony (Sb) as drain–source electrodes. The formation of clean and defect-free van der Waals (vdW) stackings at the Sb–PdSe₂ heterointerfaces boosts the room temperature transport characteristics, including low contact resistance down to 0.55 kΩ µm, high on-current density reaching 96 µA µm⁻¹, and high electron mobility of 383 cm² V⁻¹ s⁻¹. Furthermore, metal–insulator transition (MIT) is observed in the PdSe₂ FETs with and without hexagonal boron nitride (h–BN) as buffer layers. However, the layered h–BN/PdSe₂ vdW stacking eliminates the interference of interfacial disorders, and thus the corresponding device exhibits a lower MIT crossing point, larger mobility exponent of γ ∼ 1.73, significantly decreased hopping parameter of T₀, and ultrahigh electron mobility of 2,184 cm² V⁻¹ s⁻¹ at 10 K. These findings are expected to be significant for developing high mobility 2D-based quantum devices.     

Low temperature,solution-processed ambipolar field-effect transistors based on polymer/self-assembled monolayer modified InOx hybrid structures for balanced hole and electron mobilities exceeding 1 cm2 V−1 s−1

Ambipolar field-effect transistors (FETs) based on solution-processed organic-inorganic bilayer structures were investigated. An amorphous indium oxide (InO_x) film, as the n-type semiconducting layer, was prepared with an environmentally friendly method and annealed at a low temperature; and a low band-gap (LBG) donor–acceptor (D–A) conjugated polymer, FBT-Th₄(1,4), was spin-coated on the InO_x film as the p-type semiconducting layer. To improve the p-type mobility, a self-assembled monolayer (SAM) of octadecyl-phosphonic acid was introduced to modify the surface of InO_x. The ambipolar FETs showed high and well-balanced hole and electron mobilities of 1.1 and 1.5 cm² V⁻¹ s⁻¹, respectively. Furthermore we found that ambipolar FETs could be integrated into functional complementary metal oxide semiconductor (CMOS)-like inverters.     

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al_0.2Ga_0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al_0.3Ga_0.7N/GaN channel/Al_0.2Ga_0.8N/p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80-μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al_0.3GaN_0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.     

Graphene-Enhanced Metal Transfer Printing for Strong van der Waals Contacts between 3D Metals and 2D Semiconductors

2D semiconductors have shown great potentials for ultra-short channel field-effect transistors (FETs) in next-generation electronics. However, because of intractable surface states and interface barriers, it is challenging to realize high-quality contacts with low contact resistances for both p- and n- 2D FETs. Here, a graphene-enhanced van der Waals (vdWs) integration approach is demonstrated, which is a multi-scale (nanometer to centimeter scale) and reliable (≈100% yield) metal transfer strategy applicable to various metals and 2D semiconductors. Scanning transmission electron microscopy imaging shows that 2D/2D/3D semiconductor/graphene/metal interfaces are atomically flat, ultraclean, and defect-free. First principles calculations indicate that the sandwiched graphene monolayer can eliminate gap states induced by 3D metals in 2D semiconductors. Through this approach, Schottky barrier-free contacts are realized on both p- and n-type 2D FETs, achieving p-type MoTe₂, p-type black phosphorus and n-type MoS₂ FETs with on-state current densities of 404, 1520, and 761 µA µm⁻¹, respectively, which are among the highest values reported in literature.     

Electrical transport properties in electroless-etched Si nanowire field-effect transistors

We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(1 1 1) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag⁺ ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO₂ gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.     

Solution-processed natural gelatin was used as a gate dielectric for the fabrication of oxide field-effect transistors

Biocompatible and biodegradable materials are attractive for environmentally safe, flexible and biosustainable devices since they are nontoxic renewable materials with a low cost. Gelatin, a natural protein, is a promising biopolymer for photography, cosmetic manufacturing and food. In this paper, solution-processed natural gelatin was used as a gate dielectric for the fabrication of oxide field-effect transistors (FETs). Similarly to a polyelectrolyte, mobile ions can be generated in gelatin in air environment. A high gate specific capacitance larger than 0.93 μF/cm² was obtained in gelatin processed at low concentrations, due to the formation of electric-double-layers (EDLs). As gelatin films processed at a low concentration of 0.02 g/mL, the fabricated FETs showed excellent electrical performances. The average current on/off ratio and the mobility were estimated to be 1.36 × 10⁵ and 33.2 cm²/V, respectively. The proposed technique may be application in the bioelectronics field, including biosensors and synaptic devices.     

Fully Transparent p‐MoTe2 2D Transistors Using Ultrathin MoOx/Pt Contact Media for Indium‐Tin‐Oxide Source/Drain

Since transition metal dichalcogenide (TMD) semiconductors are found as 2D van der Waals materials with a discrete energy bandgap, many 2D‐like thin field effect transistors (FETs) and PN diodes are reported as prototype electrical and optoelectronic devices. As a potential application of display electronics, transparent 2D FET devices are also reported recently. Such transparent 2D FETs are very few in report, yet no p‐type channel 2D‐like FETs are seen. Here, 2D‐like thin transparent p‐channel MoTe₂ FETs with oxygen (O₂) plasma‐induced MoO_x/Pt/indium‐tin‐oxide (ITO) contact are reported for the first time. For source/drain contact, 60 s short O₂ plasma and ultrathin Pt‐deposition processes on MoTe₂ surface are sequentially introduced before ITO thin film deposition and patterning. As a result, almost transparent 2D FETs are obtained with a decent mobility of ≈5 cm² V^?1 s^?1, a high ON/OFF current ratio of ≈10⁵, and 70% transmittance. In particular, for normal MoTe₂ FETs without ITO, O₂ plasma process greatly improves the hole injection efficiency and device mobility (≈60 cm² V^?1 s^?1), introducing ultrathin MoO_x between Pt source/drain and MoTe₂. As a final device application, a photovoltaic current modulator, where the transparent FET stably operates as gated by photovoltaic effects, is integrated.     

Correlating Nanocrystalline Structure with Electronic Properties in 2D Platinum Diselenide

Platinum diselenide (PtSe₂) is a 2D material with outstanding electronic and piezoresistive properties. The material can be grown at low temperatures in a scalable manner, which makes it extremely appealing for many potential electronics, photonics, and sensing applications. Here, the nanocrystalline structure of different PtSe₂ thin films grown by thermally assisted conversion (TAC) is investigated and is correlated with their electronic and piezoresistive properties. Scanning transmission electron microscopy for structural analysis, X-ray photoelectron spectroscopy (XPS) for chemical analysis, and Raman spectroscopy for phase identification are used. Electronic devices are fabricated using transferred PtSe₂ films for electrical characterization and piezoresistive gauge factor measurements. The variations of crystallite size and their orientations are found to have a strong correlation with the electronic and piezoresistive properties of the films, especially the sheet resistivity and the effective charge carrier mobility. The findings may pave the way for tuning and optimizing the properties of TAC-grown PtSe₂ toward numerous applications.     

ε‐Branched Flexible Side Chain Substituted Diketopyrrolopyrrole‐Containing Polymers Designed for High Hole and Electron Mobilities

Based on the integrated consideration and engineering of both conjugated backbones and flexible side chains, solution‐processable polymeric semiconductors consisting of a diketopyrrolopyrrole (DPP) backbone and a finely modulated branching side chain (ε‐branched chain) are reported. The subtle change in the branching point from the backbone alters the π?π stacking and the lamellar distances between polymer backbones, which has a significant influence on the charge‐transport properties and in turn the performances of field‐effect transistors (FETs). In addition to their excellent electron mobilities (up to 2.25 cm² V^?1 s^?1), ultra‐high hole mobilities (up to 12.25 cm² V^?1 s^?1) with an on/off ratio (I_on/I_off) of at least 10⁶ are achieved in the FETs fabricated using the polymers. The developed polymers exhibit extraordinarily high electrical performance with both hole and electron mobilities superior to that of unipolar amorphous silicon.     

High permittivity dielectrics for poly(3-alkylthiophene) field-effect transistor devices

In an attempt to disentangle the effects of permittivity and surface energy of the gate insulator (expressed by its dielectric constant k and water contact angle, respectively) on the performance of organic field-effect transistors (FETs), we fabricated top- and bottom-gate FET architectures with poly(3-alkylthiophenes) (P3ATs) of different side-chain lengths, using a range of gate dielectrics. We find that this class of semiconductor, including the short butyl-(C₄-) substituted derivative, is significantly less susceptible to the often detrimental effects that high-k dielectrics can have on the performance of many organic FETs. For bottom gate devices we identify the surface energy of the gate dielectric to predominantly dictate the device mobility.     

Van Der Waals Heterojunction Modulated Charge Collection for H2O2 Production Photocathode

Efficient photocarrier generation and collection are highly desirable for solar-fuel conversion systems. However, the latter is challenging for many photoelectrodes due to carrier losses happening in the semiconductor-electrolyte interface and the semiconductor-substrate interface. To overcome it, a novel Au/CuBi₂O₄ (CBO)/PtSe₂ van der Waals heterojunction photocathode has been developed to boost photocarrier collection. As a result, the ohmic contact at Au/CBO interface shows a low resistance for hole transfer. Meanwhile, while promoting electron transfer, the Van der Waals heterojunction of CBO/PtSe₂ interface with energy barrier-blocked holes. Concurrently, the composite photocathode exhibits significantly enhanced performance: a photocurrent of −0.59 mA cm⁻² at 0.5 V versus reversible hydrogen electrode and an H₂O₂ generation rate of 2.39 mol (Lhm²)⁻¹. This work demonstrates the charge regulation role of Van der Waals heterojunctions in the solar-fuel system. More broadly, Van der Waals heterojunctions provide an excellent bond-free approach to creating versatile optoelectronic devices.