数字信号处理模块中的串行RapidIO设计

RapidIO互连构架是一种基于可靠性的开放式标准,可应用于连接多处理器、存储器和通用计算机平台.本文基于集成双核处理器MPC8641D和FPGA芯片XC5VSX240T的数字信号处理平台,进行了串行RapidIO(SRIO)技术的开发.文中给出了SRIO互连架构的硬件设计方案以及MPC8641D中SRIO数据通信软件...     

基于FPGA的全数字锁相环设计与实现

针对模拟锁相环抗干扰能力差、可靠性不高,生产成本过高的弱点,采用Verilog编程语言,通过Quartus ii软件仿真,设计了一款基于FPGA的全数字锁相环。该锁相环能对输入数字信号进行快速地位同步时钟提取,并已经应用于以Altera公司生产的Cyclone iii系列FPGA芯片[1]为核心的软件无线电硬件平台的时钟同步提取当中。     

Combining aspects and object-orientation in model-driven engineering for distributed industrial mechatronics systems

Recent advances in technology enable the creation of complex industrial systems comprising mechanical, electrical, and logical – software – components. It is clear that new project techniques are demanded to support the design of such systems. At design phase, it is extremely important to raise abstraction level in earlier stages of product development in order to deal with such a complexity in an efficient way. This paper discusses Model Driven Engineering (MDE) applied to design industrial mechatronics systems. An aspect-oriented MDE approach is presented by means of a real-world case study, comprising requirements engineering up to code generation. An assessment of two well-known high-level paradigms, namely Aspect- and Object-Oriented paradigms, is deeply presented. Their concepts are applied at every design step of an embedded and real-time mechatronics system, specifically for controlling a product assembler industrial cell. The handling of functional and non-functional requirements (at modeling level) using aspects and objects is further emphasized. Both designs are compared using a set of software engineering metrics, which were adapted to be applied at modeling level. Particularly, the achieved results show the suitability of each paradigm for the system specification in terms of reusability quality of model elements. Focused on the generated code for each case study, statistics depicted an improvement in number of lines using aspects.     

基于FPGA的数字下变频器的设计

采用软件无线电思想,设计和实现了基于FPGA的数字下变频器,应用于数字中频接收机中,主要完成信号的下变频、多速率抽取和滤波等功能。采用自上向下的模块化设计方法,将数字下变频的功能划分为不同的模块,通过VHDL语言和IP核设计各功能模块。通过ISE和Matlab工具对数字下变频器进行了仿真设计,在FPGA硬件平台上进行了测试验证,结果表明:数字下变频器稳定可靠、通用性强、灵活性高,满足数字中频接收机的设计要求。     

Mechatronics education at CDHAW of Tongji University: Laboratory guidelines,framework, implementations and improvements

Engineering education is facing unprecedented challenges and exciting opportunities, particularly in the mechatronics engineering education area. Due to the highly applied nature of mechatronics engineering, mechatronics students need a focused laboratory environment which is as close as possible to the real-world situation to apply and absorb mechatronics concepts, and to assist them in the development of “hands-on” skills. The Chinese–German School of Applied Sciences (Chinesisch-Deutsche Hochschule für Angewandte Wissenschaften, CDHAW) is an educational project of the Chinese Ministry of Education and the German Federal Ministry of Education and Research, implemented by the Tongji University and a consortium of German Universities of Applied Sciences. In a previous paper – mechatronics education at CDHAW of Tongji University: structure, orientation and curriculum, which was published in Journal Mechatronics 2008;18:172–7, the authors presented the orientation and curriculum design of mechatronics education at CDHAW. In this paper, we will discuss systematically the guidelines, framework, implementations and improvements of our mechatronics laboratory corresponding to our orientation and curriculum design.     

基于FPGA的混沌序列发生器的设计

本文提出了一种产生混沌序列的新方法:在FPGA嵌入式系统中设计了一个用于产生混沌序列的IP核。传统的混沌序列生成方法是通过软件编程实现,序列的生成速度较慢且占用资源较多。本文设计了一个IP核,利用硬件实现混沌序列的产生,提高了序列的产生速度。本文在Virtex-Ⅱ Pro开发平台上,运用EDK工具搭建了一个FPGA嵌入式平台,并添加了设计的IP核,验证了IP核的功能。     

基于LabVIEW的电路参数测试系统的设计与实现

采用DDS数字合成技术,由FPGA产生测试系统的信号源,通过阻抗的数字化测量方法,设计一个基于虚拟仪器技术的参数测试系统,实现对电路参数的自动测量.该系统采用上层软件和下层硬件分级工作的总体设计方案,以当今测控领域最流行的虚拟仪器开发工具LabVIEW为软件平台,以NI ELVIS虚拟仪器套件,ALTERA公司的DE2开发板和PC机为硬件平台.系统成本较低,具有友好、灵活的人机界面,精度较高,使用方便.     

CDMA2000系统中前向链路卷积编码器的FPGA实现

为了缩短卷积编码器设计周期,使硬件设计更具灵活性,在介绍卷积编码器原理的基础上,论述了一种基于可编程逻辑器件,采用模块化设计方法,利用VHDL硬件描述语言实现CDMA2000系统前向链路卷积编码器的方法,给出了在QuartusⅡ软件下的仿真结果,并在FPGA器件上验证实现。仿真和实验都证明了这种方法的可行性和正确性。     

Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors

Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.     

基于DSP+FPGA的高速数字信号处理平台的电源设计

介绍了一种高速数字信号处理平台的电源设计实现方案,主要是基于FPGA DSP的结构实现高速数字信号处理。该方案采用先进的FPGA,DA转换器和DSP芯片,通过对DSP芯片和FPGA芯片及DA芯片的正确供电和电源监控来实现具有通用性、可扩充性的硬件平台,并对电源设计中的多项关键参数进行分析与阐述。     

Cycle-Accurate Energy Measurement and Characterization of FPGAs

Field Programmable Gate Arrays (FPGAs) play many important roles, ranging from small glue logic replacement to System-on-Chip (SoC) designs. Nevertheless, FPGA vendors cannot accurately specify the power consumption of their products on device data sheets because the power consumption of FPGAs is strongly dependent on the target circuit, including resource utilization, logic partitioning, mapping, placement and routing. Although major CAD tools have started to report average power consumption under given transition activities, power-efficient FPGA design demands more detailed information about power consumption. In this paper, we introduce an in-house cycle-accurate FPGA energy measurement tool and energy characterization schemes spanning low-level to high-level design. This tool offers all the capabilities necessary to investigate the energy consumption of FPGAs for operation-based energy characterization, which is applicable to high-level and system-wide energy estimation. It also includes features for low-level energy characterization. We compare our tool with Xilinx XPower and demonstrate the state-machine-based energy characterization of an SDRAM controller.The RIACT at Seoul National University provide research facilities for this study. This work was partly supported by the Brain Korea 21 Project.Hyung Gyu Lee received the B.S. degree in Dept. of Computer Engineering from DongGuk University, in 1999, M.S. degree in School of Computer Science and Engineering from Seoul National University, Seoul, Korea, in 2001, and is currently working toward the Ph.D. degree at Seoul National University. His research interests include device-level energy measurement and characterization, system-level low power design and low-power FPGA design.KyungSoo Lee is a M.S. student at the School of Computer Science and Engineering, Seoul National University. He received the B.S. degree in the School of Computer Science and Engineering from Seoul National University, Seoul, Korea, in 2004. He is currently working on low-power systems and embedded systems for his M.S. degree.Yongseok Choi received the B.S. and M.S. degree in the School of Computer Science and Engineering from Seoul National University, Seoul, Korea, in 2000 and 2002, respectively. He is currently working toward the Ph.D. degree in the School of Computer Science and Engineering at Seoul National University. His research interests include embedded systems and low power systems.Naehyuck Chang received his B.S., M.S. and Ph.D. degrees all from Dept. of Control and Instrumentation Engineering, Seoul National University, Seoul, Korea, in 1989, 1992 and 1996, respectively. Since 1997, he has been with School of Computer Science and Engineering, Seoul National University and currently is an Associate Professor. His research interest includes system-level low-power design and embedded systems design.     

中频采样全数字接收机的设计与实现

根据侦察接收机的需要,基于软件无线电理论提出了一种中频采样全数字接收机的设计方案,对其中的带通采样单元、数字下变频单元和解调单元进行了分析。数字下变频采用高效滤波抽取方案,对CIC、HB和FIR滤波器的设计进行了详细介绍。最后在基于FPGA的CPCI接口信号处理平台上进行了实现,完成了多种信号的解调处理,系统具有高度的灵活性和可扩展空间。     

基于FPGA的多功能数字钟设计

文中简要介绍了一种基于FPGA的多功能数字钟设计方案。在实现数字钟计时、校时和整点报时等基本功能的基础上增加世界时钟功能,能够将北京时间快速转换为格林威治标准时。该方案采用VHDL和原理图相结合的设计输入方式,在QuartusⅡ开发环境下完成设计、编译和仿真,并在FPGA硬件开发板上进行测试,实验证明该设计方案切实可行,对FPGA的应用和数字钟的设计具有一定参考价值。     

A Low-Power Multithreaded Processor for Software Defined Radio

Embedded digital signal processors for software defined radio have stringent design constraints including high computational bandwidth, low power consumption, and low interrupt latency. Furthermore, due to rapidly evolving communication standards with increasing code complexity, these processors must be compiler-friendly, so that code for them can quickly be developed in a high-level language. In this paper, we present the design of the Sandblaster Processor, a low-power multithreaded digital signal processor for software defined radio. The processor uses a unique combination of token triggered threading, powerful compound instructions, and SIMD vector operations to provide real-time baseband processing capabilities with very low power consumption. We describe the processor’s architecture and microarchitecture, along with various techniques for achieving high performance and low power dissipation. We also describe the processor’s programming environment and the SB3010 platform, a complete system-on-chip solution for software defined radio. Using a super-computer class vectorizing compiler, the SB3010 achieves real-time performance in software on a variety of communication protocols including 802.11b, GPS, AM/FM radio, Bluetooth, GPRS, and WCDMA. In addition to providing a programmable platform for SDR, the processor also provides efficient support for a wide variety of digital signal processing and multimedia applications. Michael Schulte received a B.S. degree in Electrical Engineering from the University of Wisconsin-Madison in 1991, and M.S. and Ph.D. degrees in Electrical Engineering from the University of Texas at Austin in 1992 and 1996, respectively. From 1996 to 2002, he was an assistant and associate professor at Lehigh University, where he directed the Computer Architecture and Arithmetic Research Laboratory. He is currently an assistant professor at the University of Wisconsin-Madison, where he leads the Madison Embedded Systems and Architectures Group. His research interests include high-performance embedded processors, computer architecture, domain-specific systems, computer arithmetic, and wireless systems. He is a senior member of the IEEE and the IEEE Computer Society, and an associate editor for the IEEE Transactions on Computers and the Journal of VLSI Signal Processing. John Glossner is CTO & Executive Vice President at Sandbridge Technologies. Prior to co-founding Sandbridge, John managed the Advanced DSP Technology group, Broadband Transmission Systems group, and was Access Aggregation Business Development manager at IBM’s T.J. Watson Research Center. Prior to IBM, John managed the software effort in Lucent/Motorola’s Starcore DSP design center. John received a Ph.D. in Computer Architecture from TU Delft in the Netherlands for his work on a Multithreaded Java processor with DSP capability. He also received an M.S. degree in Engineering Management and an M.S.E.E. from NTU. John also holds a B.S.E.E. degree from Penn State. John has more than 60 publications and 12 issued patents. Dr. Sanjay Jinturkar is the Director of Software at Sandbridge and manages the systems software and communications software groups. Previously, he managed the software tools group at StarCore. He has a Ph.D in Computer Science from University of Virginia and holds 20 publications and 4 patents. Mayan Moudgill obtained a Ph.D. in Computer Science from Cornell University in 1994, after which he joined IBM at the Thomas J. Watson Research Center. He worked on a variety of computer architecture and compiler related projects, including the VLIW research compiler, Linux ports for the 40x series embedded processors and simulators for the Power 4. In 2001, he co-founded Sandbridge Technologies, a start-up that is developing digital signal processors targeted at 3G wireless phones. Suman Mamidi is a graduate student in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison. He received his M.S. degree from the University of Wisconsin-Madison in December, 2003 and is currently working towards his PhD. His research interests include low-power processors, hardware accelerators, multithreaded processors, reconfigurable hardware, and embedded systems. Stamatis Vassiliadis was born in Manolates, Samos, Greece, in 1951. He is currently a Chair Professor in the Electrical Engineering, Mathematics, and Computer Science (EEMCS) department of Delft University of Technology (TU Delft), The Netherlands. He previously served in the Electrical and Computer Engineering faculties of Cornell University, Ithaca, NY and the State University of New York (S.U.N.Y.), Binghamton, NY. For a decade, he worked with IBM, where he was involved in a number of advanced research and development projects. He received numerous awards for his work, including 24 publication awards, 15 invention awards, and an outstanding innovation award for engineering/scientific hardware design. His 73 USA patents rank him as the top all time IBM inventor. Dr. Vassiliadis is an ACM fellow, an IEEE fellow and a member of the Royal Netherlands Academy of Arts and Sciences (KNAW).     

Digital phase control for resonant inverters

This letter presents an approach for direct digital phase control of resonant inverters that is based on inductor current or voltage sensing. Compared to frequency control, phase control provides the advantages of self-tuning to the tank resonant frequency, reduced sensitivity for improved control near resonance, and inherent protection against operation below resonance to avoid hard switching. The digital control algorithm suitable for implementation using standard CMOS logic is derived. The design details of an experimental test platform based on a Xilinx field programmable gate array (FPGA) and experimental results for a typical resonant inverter are provided.     

数字视频采集回放系统的SoPC设计

介绍了一种基于SoPC技术的嵌入式数字视频图像采集控制模块的设计方案,通过在CycloneⅡFPGA上配置NiosⅡ软核处理器、ADV7181的I2C配置模块、视频图像采集模块、视频图像解码及颜色转换等相关接口模块来实现硬件平台,并利用Altera公司的软件集成开发环境NiosⅡIDE进行软件设计来控制整个采集流程.对...     

基于SOPC技术的数字音频处理系统设计

介绍了一种基于语音编解码芯片TLV320AIC23和可编程片上系统(SOPC)技术的嵌入式数字音频处理系统设计方案,通过在Altera公司的CycloneⅡFPGA上配置NiosⅡ软核处理器、语音芯片TLV320AIC23的I2C配置模块、数字音频处理模块等相关接口模块来搭建硬件平台,并利用软件集成开发环境NiosⅡIDE进行软件设计来控制整个系统工作。最后对整个系统进行了调试,实验结果表明系统实现了数字音频的高速采集、存储及回放等功能。     

基于FPGA的光纤光斑中心定位算法研究

为了解决传统数字图像处理算法中数据运算量大、复杂度高、耗时长的问题,提出一种基于可编程门阵列（FPGA）光纤光斑中心定位的方法。采用数字信号处理系统,利用开发工具（DSP builder）,设计了光斑图像预处理算法和边缘检测算法,用最小二乘法拟合光斑边界,采用流水线设计,增强了数据处理的并行能力,提高了处理速度。在Cyclone V平台上进行理论分析和实验验证,取得了光斑图像边界、中心坐标数据。结果表明,在保证对光斑中心定位的绝对误差小于0.1pixel的条件下,使用FPGA比计算机运算速度能提高21倍以上。该研究能够在FPGA平台上快速准确定位光斑中心。