超声波清洗引入的芯片金属化裂纹机理分析

对某塑封器件进行破坏性物理分析(DPA),发现芯片表面存在玻璃钝化层裂纹和金属化层划伤的缺陷。对缺陷部位进行扫描电子显微镜(SEM)检查和能谱(EDS)分析,通过形貌和成分判断其形成原因为开封后的超声波清洗过程中,超声波振荡导致环氧塑封料中的二氧化硅填充颗粒碰撞挤压芯片表面,从而产生裂纹。最后,进行了相关的验证试验。研究结论对塑封器件的开封方法提出了改进措施,对塑封器件的DPA检测及失效分析(FA)有一定借鉴意义。     

InGaP/GaAs HBT器件的制备及其特性

采用在发射区台面腐蚀时保留InGaP钝化层和去除InGaP钝化层的方法制备了两种InGaP/GaAs异质结双极晶体管(HBT)器件,研究了InGaP钝化层对HBT器件基区表面电流复合以及器件直流和射频微波特性的影响.对制备的两种器件进行了对比测试后得到:保留InGaP钝化层的HBT器件最大直流增益(β)为130,最高振荡频率(fmax)大于53 GHz,功率附加效率达到61％,线性功率增益为23 dB;而去除InGaP钝化层的器件最大β为50,fnax大于43 GHz,功率附加效率为57％,线性功率增益为18 dB.测试结果表明,InGaP钝化层作为一种耗尽型的钝化层能有效抑制基区表面电流的复合,提高器件直流增益,改善器件的射频微波特性.     

不同钝化结构的HgCdTe光伏探测器暗电流机制

在同一HgCdTe晶片上制备了单层ZnS钝化和双层(CdTe+ZnS)钝化的两种光伏探测器,对器件的性能进行了测试,发现双层钝化的器件具有较好的性能.通过理论计算,分析了器件的暗电流机制,发现单层钝化具有较高的表面隧道电流.通过高分辨X射线衍射中的倒易点阵技术研究了单双层钝化对HgCdTe外延层晶格完整性的影响,发现单层ZnS钝化的HgCdTe外延层产生了大量缺陷,而这些缺陷正是单层钝化器件具有较高表面隧道电流的原因.     

影响AlGaN/GaN HFET器件二维电子气的若干因素

基于Sentaurus Workbench(SWB)TCAD可制造性设计平台进行AlGaN/GaN器件的结构设计和仿真,并对影响二维电子气的重要参数因素进行了研究及优化,诸如AlGaN势垒层中Al组分x、AlGaN势垒层厚度h、应变弛豫度r和栅偏压Vg等因素。参数相关性的制约结果,无疑会反映在对器件物理特性的制约及影响上。研究结果表明,在一定条件下增大势垒层中Al组分和势垒层厚度可以提高器件的电流传输特性。然而随着二者的不断增大将会引起应变弛豫的发生,而应变弛豫的发生会降低器件的性能。     

不同钝化结构的HgCdTe光伏探测器暗电流机制

在同一HgCdTe晶片上制备了单层ZnS钝化和双层（CdTe+ZnS）钝化的两种光伏探测器,对器件的性能进行了测试,发现双层钝化的器件具有较好的性能．通过理论计算,分析了器件的暗电流机制,发现单层钝化具有较高的表面隧道电流．通过高分辨X射线衍射中的倒易点阵技术研究了单双层钝化对HgCdTe外延层晶格完整性的影响,发现单层ZnS钝化的HgCdTe外延层产生了大量缺陷,而这些缺陷正是单层钝化器件具有较高表面隧道电流的原因．     

超低噪声场效应晶体管参数退化失效分析

某型号超低噪声场效应管使用3～5年后,在气候潮热区域和时期会集中出现饱和漏电流、跨导减小的参数退化现象.首先对失效器件进行了电特性测试、热成像分析、聚焦离子束(FIB)分析、能谱分析,通过故障树法排除了过电应力、结温过高、芯片自身缺陷等可能失效原因;其次结合失效场效应管钝化层薄、环氧胶封等工艺特点以及特殊的失效环境,通过推理假设,最终试验验证得出:低噪声场效应管在长时间高温高湿的环境下,水汽穿透场效应管的环氧胶粘合线进入管壳内部,在电场集中的漏极区域水汽发生电化学反应对芯片造成腐蚀,最终引起参数退化.     

钝化边沿的制作及其对GalnP/GaAs SHBT 性能的影响

利用光刻胶形成保护侧墙,用湿法腐蚀来形成发射极钝化边沿.这种方法工艺简单,不需要额外的绝缘介质作为掩膜,也不需要双层腐蚀终止层.研发出了带发射极钝化边沿的GalnP/GaAs单异质结双极型晶体管(SHBT),并对不同尺寸有无钝化边沿的器件特性进行对比,结果表明钝化边沿能有效改善小尺寸器件的直流特性,对器件的高频特性无明显影响.     

Si3N4钝化层质量分析研究

采用扫描电镜(SEM)、X光电子能谱仪(XPS)、二次离子质谱仪(SIMS)等多种微分析手段对失效器件芯片表面生成物产生原因进行了分析,同时结合器件制备工艺和器件可靠性实验分析了Si3N4钝化层质量与工艺的关系.通过大量分析实验,确定了器件失效的重要原因是Si3N4钝化层存在缺陷而导致器件因表面漏电而失效.实验结果表明,将Si3N4钝化层中SiOx含量控制在10%以下,器件管壳内水分控制在1%以下,器件经过100O h电老化后芯片表面无生成物产生.     

SIPOS钝化功率晶体管“双线击穿”曲线现象的分析

测试半绝缘掺氧多晶硅(SIPOS)层钝化的功率晶体管管芯反向击穿电压曲线时,出现异常击穿曲线--"双线击穿"曲线现象.通过对SIPOS钝化的功率晶体管管芯进行逐层腐蚀,再进行反向击穿曲线测试,以及扫描电镜对SIPOS层结构进行能谱分析,结果显示SIPOS层中氧含量过大,从而产生界面效应造成击穿电压回移,并解释了在应用特定测试仪器测试时显示出"双线击穿曲线"的现象.同时提出解决双线击穿曲线现象的方法.     

Hg1-xCdxTe长波光伏探测器的低频噪声研究

在同一Hg1-xCdxTe晶片上（x=0．217）制备了单层ZnS钝化和双层（CdTe＋ZnS）钝化的两种器件,对器件的低频噪声和暗电流进行了测试．发现单层钝化的器件在反偏较高时具有较高的低频噪声,在对器件的暗电流拟合计算中发现,单层钝化的器件具有较大的表面隧道电流,而这正是单层钝化器件具有较高低频噪声的原因．并通过高分辨X射线衍射中的倒易点阵技术RSM（reciprocal space mapping）研究了两种钝化对HgCdTe外延层晶格完整性的影响,发现单层ZnS钝化的HgCdTe外延层产生了大量缺陷,而这些缺陷正是单层钝化器件具有较高的低频噪声和表面隧道电流的原因．     

多模计数器静电放电损伤的失效分析

静电放电(ESD)损伤会降低半导体器件和集成电路的可靠性并导致其性能退化.针对一款国产2-32型多模计数器的失效现象,通过分析该计数器的电路结构,利用X射线成像、显微红外热成像、光束感生电阻变化以及钝化层、金属化层去除等技术对计数器进行了失效分析,将失效点准确定位至输出端口逻辑单元电路的2只晶体管上.分析结果表明,多模计数器的ESD损伤使输出端口驱动晶体管以及为负载晶体管提供栅偏置的前级电路晶体管同时受损,导致计数器端口高、低电平输出均失效而丧失计数功能.对相关的失效机理展开了讨论,同时提出了在电路研制和使用过程中的ESD防护措施.     

高温氧化对SiC MOS器件栅氧可靠性的影响

SiC金属氧化物半导体(MOS)器件中SiO2栅氧化层的可靠性直接影响器件的功能.为了开发高可靠性的栅氧化层,将n型4H-SiC (0001)外延片分别在1 200,1 250,1 350,1 450和1 550℃5种温度下进行高温干氧氧化实验来制备SiO2栅氧化层.在室温下,对SiC MOS电容样品的栅氧化层进行零时击穿(TZDB)和与时间有关的击穿(TDDB)测试,并对不同干氧氧化温度处理下的栅氧化层样品分别进行了可靠性分析.结果发现,在1 250℃下进行高温干氧氧化时所得的击穿场强和击穿电荷最大,分别为11.21 MV/cm和5.5×10-4 C/cm2,势垒高度(2.43 eV)最接近理论值.当温度高于1 250℃时生成的SiO2栅氧化层的可靠性随之降低.     

Degradation of ZnSe/ZnTe multiquantum well contacts to p-ZnSe

The work presented in this paper studied the degradation of ZnTe/ZnSe multiquantum well contacts to p-ZnSe under high current loading (1000 to 1500 A/cm²). During degradation, localized heating (up to 200°C > the bulk substrate and heat sink) was observed to occur at the point were electrical power was supplied. Auger data from degraded samples indicated that due to the localized heating, Zn and Te from the ZnTe layers and Zn from the ZnSe layer diffused through the Au metallization to the samples surface. In addition, thermal stress from the localized heating generated micro-cracks in the ZnSe which acted as high diffusivity paths for impurities. Rectangular defects were also found to form in the degraded region. These defects were oriented to the micro-cracks and had similar geometries as dislocation patches (dark line defects) which have been reported to form in the quantum well region of degraded ZnSe based laser devices. The similarities between the rectangular defects and dark line defects suggest the formation of similar dislocation patches in the quantum well region of the multiquantum well contacts.     

Effects of intermediate semiconductor layers on carrier transport mechanisms through p-ZnSe/metals interfaces

The effects of formation of intermediate semiconductor layers at p-ZnSe/metals interfaces on carrier transport mechanisms were studied by comparing contacts prepared by the deposition and annealing (DA) technique or the molecular beam epitaxy (MBE) technique. Current density vs voltage (J-V) curves of the MBE contact with a p-ZnSe/p-ZnTe superlattice intermediate layer showed ohmic behavior. However, J-V curves of the DA contact with a ZnTe intermediate layer showed rectifying behavior. The difference of the electrical properties between these two contacts was due to existence of a highly resistive intermediate layer with highly dense defects in the DA contact and a low resistance p-type conductive intermediate layer with relatively small densities of crystalline defects in the MBE contacts. From the present results, it was concluded that formation of the highly resistive semiconductor layer with dense crystalline defects prevented the DA contact to transit from non-ohmic J-V behavior to ohmic.     

Analytical method for cell displacement defect quantum-dot cellular automata primitive

Quantum-dot cellular automata (QCA) is an emerging computational paradigm which can overcome scaling limitations of the existing complementary metal oxide semiconductor (CMOS) technology. The existence of defects cannot be ignored, considering the fabrication of QCA devices at the molecular level where it could alter the functionality. Therefore, defects in QCA devices need to be analyzed. So far, the simulation-based displacement defect analysis has been presented in the literature, which results in an increased demand in the corresponding mathematical model. In this paper, the displacement defect analysis of the QCA main primitive, majority voter (MV), is presented and carried out both in simulation and mathematics, where the kink energy based mathematical model is applied. The results demonstrate that this model is valid for the displacement defect in QCA MV.     

Fabrication and characterization of 4H-SiC planar MESFETs

The planar 4H-SiC MESFETs were fabricated by employing an ion-implantation process instead of a recess gate etching process, which is commonly adapted in compound semiconductor MESFETs, to eliminate potential damage to the gate region during etching process. Excellent ohmic and Schottky contact properties were achieved by using the modified RCA cleaning of 4H-SiC surface and the sacrificial thermal oxide layer. The fabricated MESFETs was also free from drain current instability, which the most of SiC MESFETs have been reported to suffer for the charge trapping. The drain current recovery characteristics were also improved by passivating the surface with a thermal oxide layer and eliminating the charge trapping at the surface. The performance of fabricated MESFETs was characterized by analyzing the small-signal equivalent circuit parameters extracted from the measured parameters.     

热界面材料对高功率LED热阻的影响

散热不良是制约大功率LED发展的主要瓶颈之一, 直接影响着大高功率LED器件的寿 命、出光效率和可靠性等。本文采用T3ster热阻测试仪和 ANSYS热学模拟的方法对LED器件进行热学分析,以三种热界面材料(金锡,锡膏,银胶)对LE D热阻及芯片结温的影响为例,分析了热界面材料的热导率、厚度对LED器件热学性能的影响 ,实验结果表明界面热阻在LED器件总热阻中所占比重较大,是影响LED结温高低的主要因素 之一;热学模拟结果表明,界面材料的热导率、厚度及界面材料的有效接触率均会影响到LE D器件结温的变化,所以在LED器件界面互连的设计中,需要综合考虑以上三个关键参数的控 制,以实现散热性能最佳化。     

对n型Si外延片表面处理方法的研究

Si外延片是制造半导体器件和集成电路最常用的半导体材料。外延层电阻率是外延片最重要的参数之一,它直接影响器件的性能。简要分析了自动汞探针C-V测试仪测量电阻率前进行表面处理的原因,研究了不同的表面处理方法对电阻率测试结果的影响,发现对于外延层的电阻率ρ>1Ω.cm的n型Si外延片,采用紫外光(UV)表面处理是一种合适的表面处理方法,该方法应用于实际生产测试过程。     

高功率微波效应的多物理场建模方法研究

为了实现对微波器件高功率微波效应的分析,主要从不同尺度半导体器件和波导器件出发,基于具有谱精度的谱元时域法,开展从微米尺度到纳米尺度半导体器件电热耦合一体化分析的方法以及高功率微波气体放电效应及抑制机理的研究.得到了半导体器件在电磁信号作用下发生的电热参数分布变化规律和微波器件在高功率微波下发生的气体放电及其抑制机理,根据以上相关效应机理,可为复杂电磁环境中的器件设计提供理论指导.     

Use of the three-dimensional TLM method in the thermal simulationand design of semiconductor devices

The thermal behavior of semiconductor devices fabricated with a variety of different materials has been analyzed using the three-dimensional transmission-line matrix (TLM) method. This method can easily incorporate the temperature dependence of thermal parameters, is numerically stable, and compares favorably with other numerical techniques in computational expenditure and convenience in modeling complex geometries. As an example, a three-dimensional thermal analysis of a typical microwave power device structure is presented. The model demonstrates the effects of overlay metal and conductivity of the substrate material in limiting the temperature rise. Both the transient and steady-state thermal operation are quantitatively studied. The study shows that the TLM method has considerable potential in the thermal analysis and design of semiconductor devices