Numerical modeling of magnetic-field-sensitive semiconductor devices

Semiconductor devices in the presence of a magnetic field have been modeled numerically. The two-dimensional distributions of the electric potential, the electron concentration, and the hole concentration in a silicon slab exposed to a magnetic field have been computed. We have generalized the well-known Scharfetter-Gummel scheme to the case of two dimensions and nonzero magnetic field and employed a finite-difference technique. Our results are in support of earlier results in case of Hall plates. In intrinsic or closely intrinsic silicon, our results show both magnetoconcentration and space-charge effects. As a realistic example of a magnetic-field sensor, we have modeled a p⁺-i-n⁺silicon diode with split contacts.     

A comparison of semiconductor devices for high-speed logic

The bipolar transistor and FET are compared, considering both today's most advanced implementations and "ultimate" scaled-down devices. The differences between the devices are quantified in terms of transconductance and intrinsic speed. Old limits are re-examined and ways of extending the devices toward their ultimate in performance are proposed. While the major emphasis is on silicon, a comparison is made with the GaAs MESFET. Other semiconductor devices are discussed in the context of "bipolar-like" and "FET-like" devices, and the HEMT is considered a very promising candidate for high-speed logic. While Josephson junction logic is not discussed at length, it is a continual point of reference. In addition to comparing devices, the on-chip wiring environment is discussed, especially concerning its impact on power-delay products.     

Thermal modeling of single event burnout failure in semiconductor power devices

Experimental investigations of single event burnout (SEB) of power devices due to heavy ion impacts have identified the conditions required to produce device failure. A key feature observed in the data is an anomalistic secondary rise in current occurring shortly after the ion strike. To verify these findings including the thermally induced secondary plateau, simulations have been performed on the model single event burnout. The new models include additional thermally dependent electrical components to capture thermally induced physical effects. Through the inclusion of analytic temperature models coupled with the electrical model, the electrical response is predicted with reasonable accuracy. The simulations provide order-of-magnitude estimates as well as prediction of phenomenological features such as the secondary rise in current. This work represents a first attempt to characterize thermal failure of power devices due to heavy ion impacts by including temperature dependent components that until now have not been modeled. The thermal model in the present work produces qualitative agreement with experiments on SEB that have been previously unexplained.     

Ion-implanted semiconductor devices

Ion implantation is finding increased usage in device fabrication owing to precise control and reproducibility of the charge and depth distribution of the implanted-dopant profile. The MOST illustrates the application of charge control through threshold-voltage adjustment and though predepostion for drive-in diffusion to form complementary devices. A compilation of range-energy data for B, P, and As in silicon is given along with factors which influence the implanted-dopant distributions after anneal treatments. Implantation procedures are presented for high-frequency bipolar transistors which depend critically on both charge and depth control of the emitter and base profiles. Another important aspect of ion implantation is lateral control, a feature which is necessary for high packing density circuits. Disorder effects associated with implantation through oxide masks are discussed. A brief account of implantation for GaAs devices is also included.     

Nonvolatile semiconductor memory devices

An attempt is made to survey and assess the nonvolatile semiconductor memory devices including charge-storage devices and FET's with ferroelectric gate insulators. The charge-storage devices are further divided into two groups: 1) charges-trapping devices such as the MNOS and the MAOS, and 2) floating-gate devices such as the FAMOS and the DDC. Approaches for achieving virtual nonvolatility in otherwise volatile semiconductor memories are briefly disscused. Novel structures which provide nonvolatility as well as the theoretical limit of memory array density are also explored.     

Electron bombarded semiconductor devices

The first electron bombarded semiconductor (EBS) devices have recently appeared on the market. These devices have already demonstrated that EBS has considerable promise as an important new electron device for power amplification and control. EBS devices are described with particular emphasis on power devices. The basic EBS principle, some of the analysis used in device design, general considerations in designing the various elements of the device, overall device design, semiconductor processing, and reliability considerations are discussed. Predictions of general directions for future work are made. Some historical information is also presented as well as a brief comparison with other competing power devices.     

Active semiconductor microdisk devices

The design of active semiconductor microdisk switches, modulators, or wavelength routers enabled by modulating the transfer characteristics of a resonant cavity is investigated. A simple theoretical model based on coupled-mode theory is used to elucidate design trends and constraints in the cases where electroabsorption, gain, and free carrier injection are employed to modulate the resonator characteristic     

Single nanoparticle semiconductor devices

Using a new technique in forming the cubic single-crystal silicon nanoparticles that are about 40 nm on a side, the authors have demonstrated a vertical-flow surround-gate Schottky-barrier transistor. This approach allows the use of well-known approaches to surface passivation and contact formation within the context of deposited single-crystal materials for device applications. It opens the door to the novel three-dimensional integrated circuits and new approaches to hyper integration. The fabrication process involves successive deposition and planarization and does not require nonoptical lithography. Device characteristics show reasonable turn-off characteristics and on-current densities of more than 10/sup 7/ A/cm/sup 2/.     

Bulk negative-resistance semiconductor devices

Recent research on semiconductors that exhibit bulk negative resistivity has led to new devices for pulse regeneration, logic function generation, amplification, and millimeter-wave power generation. These are bulk devices in the sense that ac gain is derived from the bulk negative-resistance property of certain uniform semiconductors, rather than from the properties of junctions between different types of semiconductors. Bulk devices are capable of operating with more power at higher speeds and frequencies than conventional junction devices such as transistors.     

A survey of semiconductor devices

This paper attempts to present a complete collection of semiconductor devices. A total of 67 “major” devices have been identified, together with about 110 device variations which are considered to be “related” devices to the former. These devices are organized into groups and subgroups for a better overview, and the justification for such classification is discussed. After the list is presented, the author offers some comments and observations from his viewpoint     

Modeling of discrete semiconductor devices

Numerical modeling established itself as a powerful tool for the analysis and design of discrete semiconductor devices and integrated circuits. The paper reviews the basic semiconductor equations, the physical internal mechanisms implemented in the present simulation programs and the numerical methods used to solve the nonlinear semiconductor equations. Selected results of numerical simulation of high frequency and high power discrete devices are given. The exemples comprise bipolar and FET devices made on Si or GaAs, operating in steady state or transient conditions and modeled in one or two dimensions.     

Rigorous numerical analysis of mode beating in tapered semiconductor amplifiers

The evolution of the optical beam profile along a high-power tapered semiconductor amplifier has been demonstrated by using rigorous and full-vectorial numerical approaches, based on the finite-element method. Numerically simulated results indicate the generation of many higher order modes, and their interference with the fundamental mode causes a variation of the optical beam, both along the transverse and the axial directions, which could significantly modify the output beam quality.     

Reduction of damping in high-speed semiconductor lasers

An analytical expression for the intrinsic gain suppression factor based on carrier heating is derived. The theory shows good agreement with the published experimental value of ∈=+1.5×10^-17 cm³ for in-plane lasers. For the first time, a negative gain suppression factor for particular laser designs is predicted and experimentally observed. A negative gain suppression factor can lead to the elimination of damping in semiconductor lasers. Using vertical-cavity surface-emitting lasers, a negative gain suppression factor of -2.2×10^-17 cm³ is observed     

Radiation effects on semiconductor devices

The radiation-induced degradation of semiconductor material parameters is reviewed. These results are related to the degradation of semiconductor-device performance. Design techniques for minimizing the radiation-induced degradation are evaluated. Emphasis is placed on the effects of neutron-produced displacement damage on devices and on the effects of ionizing radiation on MOS structures. Transient ionization effects and circuit latchup are considered. The present degree of understanding of radiation effects in silicon devices is summarized.     

Trends in power semiconductor devices

This paper reviews recent trends in power semiconductor device technology that are leading to improvements in power losses for power electronic systems. In the case of low voltage (<100 V) power rectifiers, the silicon P-i-N rectifier has been displaced by the silicon Schottky rectifier, and it is projected that the silicon TMBS rectifier will be the preferred choice in the future. In the case of high voltage (>100 V) power rectifiers, the silicon P-i-N rectifier continues to dominate but significant improvements are expected by the introduction of the silicon MPS rectifier followed by the GaAs and SiC based Schottky rectifiers. Equally important developments are occurring in power switch technology. The silicon bipolar power transistor has been displaced by silicon power MOSFETs in low voltage (<100 V) systems and by the silicon IGBTs in high voltage (>100 V) systems. The process technology for these MOS-gated devices has shifted from V-MOS in the early 1970s to DMOS in the 1980s, with more recent introduction of the UMOS technology in the 1990s. For the very high power systems, the thyristor and GTO continue to dominate, but significant effort is underway to develop MOS-gated thyristors (MCTs, ESTs, DG-BRTs) to replace them before the turn of the century. Beyond that time frame, it is projected that silicon carbide based switches will begin to displace these silicon devices     

Optimum semiconductor for microwave devices

The best semiconductors for microwave devices, silicon and gallium arsenide, are restricted in their performance because the electron drift velocity saturates at a fairly low value. It is proposed that InAs-InP alloys should give better performance. Detailed calculations of drift velocity are made by a Monte Carlo technique, and it is shown that some alloys should give drift velocities greater than 4×107cm/s.     

Strained layer piezoelectric semiconductor devices

III–V semiconductors are piezoelectric. Quantum wells grown pseudomorphically strained on the (111) face are axially polarized and include strong, built-in do electric fields. The associated loss of inversion symmetry in the wells has important consequences for the electrooptic properties of these structures. They can be exploited to improve the performance of a number of existing optoelectronic devices and also to generate new ones. In this paper we review some of these properties and discuss the work at Sheffield investigating the prospects for improved performance and novel. devices in the strained InGaAs/AlGaAs/GaAs and InGaAs/InAlAs/InP systems.