Chemical and morphological studies of plasma-treated integrated circuit bond pads

The effect of plasma treatment on the surface chemistry and morphology of Al-1%Si bond pads has been studied by a battery of analytical techniques. The ball shear strengths of the bond pads increased by ∼17% after CF₄ plasma treatment. The improvement in wire bondability after plasma treatment is largely attributed to a decrease in the oxide thickness and a reduction in the height of the crystallites on the bond pad surface. However, micro-pits were formed after CF₄ plasma treatment. The micro-pits become initiation sites of the first stage of a fluorine-induced corrosion where breakdown of the native passivating oxide occurs. In the second stage of corrosion, fresh Al beneath the oxide is exposed to the attack from the fluoride ions in the presence of water.     

Effect of plasma treatment of Au-Ni-Cu bond pads on process windows of Au wire bonding

The wire bondability of Au-Ni-Cu bond pads with different Au plating schemes, including electrolytic and immersion plates, are evaluated after plasma treatment. The plasma cleaning conditions, such as cleaning power and time, are optimized based on the process window and wire pull strength measurements for different bond pad temperatures. Difference in the efficiency of plasma treatment in improving the wire bondability for different Au plates is identified. The plasma-cleaned bond pads are exposed to air to evaluate the recontamination process and the corresponding degradation of wire pull strength. The changes in bond pad surface characteristics, such as surface free energy and polar functionality, with exposure time are correlated to the wire pull strength, which in turn provides practical information about the shelf life of wire bonding after plasma cleaning.     

An integrated expandor circuit

Presents a bipolar monolithic version, for frequency division telephone multiplex equipment, that has a marked improvement in performance compared with discrete component versions. The principles of operation and the design criteria and limits are discussed in full detail, particularly with respect to CCITT recommendations. Special attention is devoted to the analysis of the circuit and technological solutions that have been implemented to achieve an overall operation accuracy of 0.2 dB together with a high level of reliability.     

An integrated JK flip-flop circuit

An integrated JK flip-flop circuit, which is constructed using an RS flip-flop and four gates, is described. The circuit operation is based on an original concept, which is different from the conventional master-slave principle. Results of a monolithic integration using emitter-coupled logic (ECL) circuits are also given. As compared with the conventional master-slave-type JK flip-flop, which is constructed using ECL, a 40 percent improvement in speed-power product has been obtained.     

An integrated electronic telephone circuit

An integrated electronic telephone circuit (ETC) providing all the necessary elements of a telephone station apparatus is described. The ETC includes a speech network, tone ringer, dual-tone multifrequency (DTMF) dialer and DC line interface circuit. A microprocessor port facilitates automatic dialing features under control of a separate microprocessor. The speech network and dialer circuits operate with instantaneous input voltage as low as 1.4 V. The DTMF generator incorporates a high-precision frequency synthesis technique. Because of the reduction of frequency errors, an inexpensive ceramic resonator can be used as the frequency reference for the dialer. A linear/I/SUP 2/L process with two-layer metal interconnects is used to fabricate the 125/spl times/146 mil ETC die.     

Characterization of copper precipitates on aluminum copper bond pads formed after plasma clean and de-ionized water exposure

Semiconductor bond pads made from aluminum and small percentages of copper is susceptible to galvanic corrosion. In galvanic corrosion, the cathode (copper precipitate) is usually protected by the aluminum oxide that covers the surface of aluminum which acts as the anode. However, when the aluminum oxide thickness is reduced by plasma cleaning, the precipitates can be exposed. When exposed precipitates come in contact with de-ionized water, galvanic corrosion takes place. Therefore, though plasma cleaning in general is supposed to improve semiconductor bond pad surface in preparation for package level interconnection, adding the plasma clean step just before a process with de-ionized water can cause bond pad corrosion through the galvanic reaction between the exposed precipitate (cathode) and the surrounding aluminum (anode). This paper aims to investigate the mechanism of corrosion and characterize corroded bond pads by using wire bond ball shear method.     

An integrated circuit for GSM mobile communications

An integrated circuit for the Pan European GSM mobile communications system is described which performs GMSK digital modulation and front-end functions for both base and mobile stations. The circuit includes, as main functional blocks, a 10-bit D/A converter, a 13-MHz switched-capacitor interpolating filter, and a power buffer. A fully differential approach was used. The circuit has been fabricated using a 2-m CMOS process. The chip size is 6.7×5.3 mm². The overall circuit performance fully meets GSM specifications.     

An integrated m-out-of-n detection circuit using threshold logic

The design of the integrated 4-out-of-9 detector is based on a threshold logic approach. A differential current-switching circuit configuration is used, and the detector is fully compatible with conventional emitter-coupled logic (ECL). The circuit has a propagation delay of 16 ns and dissipates only 100 mW. The functional power-delay product of 1600 pJ is an order of magnitude below that achieved with an efficient gate design.     

An improved GaAs MESFET equivalent circuit model for analog integrated circuit applications

An improved equivalent circuit model of a gallium-arsenide (GaAs) MESFET that is optimized for the design and analysis of precision analog integrated circuits is described. These circuits entail different modeling requirements from digital or microwave circuits, for which existing equivalent circuit models are optimized. Improved techniques are presented to model the drain-to-source conductance, device capacitance, and the functional dependence of drain-to-source current.     

An investigation of corrosion on integrated circuits viapressure-temperature-humidity-bias stressing

Pressure-temperature-humidity-bias (PTHB) is a consistent, repeatable stress capable of reducing qualification and evaluation cycle time through acceleration of moisture- and bias-induced failure mechanisms. Moreover, PTHB is more capable of finding susceptibility to corrosion than either THB or autoclave stressing, as illustrated by the historical monitor and precondition stressing results. Therefore, PTHB was implemented as the primary humidity stress in environmental stressing for device qualification and evaluation and for the monitor program. Specifically, bond-pad corrosion of a memory device was investigated. The mold compound was found to be inferior with respect to prevention of corrosion failures. All memory devices which were previously assembled with this mold compound have been converted to other mold compounds with lower extractable chloride content     

Bondability analysis of bond pads by thermoelectric temperature measurements

To reduce cost and enhance reliability for microelectronics applications, a complete understanding of the thermosonic bonding process is required. In particular, the question of whether melting, diffusion, or significant heating occurs along the interface during friction has often been raised. We present results obtained with a new device based on thermoelectric temperature measurements to determine the temperature at the bond interface. In addition to the temperature information, the data characterizes the bonding process in real time on a micrometer scale. The basic principle of the developed apparatus is temperature measurement by an Au-Ni thermocouple fixed within the inside chamfer of a bonding capillary. Different bond substrates with high and low bond contact quality have been investigated. The thermoelectric temperature measurements very precisely determines the bonding behavior of the bond pads. A few nanometers surface contamination on a bond pad significantly reduces the temperature rise at the bond interface and therefore impairs bondability of the substrate. These results demonstrate the sensitivity and accuracy of the measurement principle. The apparatus is a powerful tool to measure the tribology of the bond system and to characterize the bondability of different bond pads.     

PMOS integrated circuit fabrication using BF3 plasma immersion ion implantation

The feasibility of plasma immersion ion implantation (PHI) for multi-implant integrated circuit fabrication is demonstrated. Patterned Si wafers were immersed in a BF₃ plasma forp-type doping steps. Boron implants of up to 3 × 10¹⁵ atoms/cm² were achieved by applying microsecond negative voltage (-2 to -30 kV) pulses to the wafers at a frequency of 100 Hz to 1 kHz. After implantation the wafers were annealed using rapid thermal annealing (RTA) at 1060° C for 20 sec to activate the dopants and to recrystallize the implant damaged Si. For the PMOS process sequence both the Si source-drain and polycrystalline Si (poly-Si) gate doping steps were performed using PIII. The functionality of several types of devices, including diodes, capacitors, and transistors, were electrically measured to evaluate the compatibility of PIII with MOS process integration.     

An integrated circuit for multiplexing and driving injection lasers

A monolithic silicon integrated circuit has been designed to provide feedback-stabilized biasing and high-speed modulation for semiconductor injection lasers. The circuit is capable of selecting and controlling any one of a group of four lasers, and in the event of laser darkening it automatically switches to a replacement laser. The laser driver consists of a high-speed modulator and a feedback loop that incorporates the selected laser and an external backlight photodetector. The feedback controls the bias current of the laser so as to stabilize its light output against variations due to aging, replacement, or environmental changes. The feedback loop itself is compensated to allow arbitrary variation in the duty cycle or frequency of the modulation signal. Prototypes of the laser driver have been integrated in a junction-isolated bipolar technology. The integrated circuit is capable of supplying bias currents of 500 mA and modulation currents as high as 100 mA. At lower currents, modulation rates in excess of 100 Mbits/s have been achieved.     

An optical integrated circuit for time-division 2-D velocitymeasurement

An LiNbO₃ optical integrated circuit pigtailed with two single-mode fibres, which allows time-division two-dimensional velocity measurement, is discussed. To detect time-division multiplexed beat signals corresponding to velocity components v_X and v_γ of a moving object, a waveguide switch is integrated on a Z-propagating LiNbO₃ substrate of 28×7 mm² in addition to a waveguide interferometer with a frequency shifter. In the optical IC, either v_X or v_γ could be measured selectively with signal-to-noise ratio of 20 dB by driving an electronic gate placed after a photodiode in synchronization with the waveguide switch     

An integrated circuit technique for saturation control of switching transistors

A limited-saturation device technique found to improve the absolute value, spread, and temperature dependence of storage times in integrated transistors, and compatible to existing integrated-circuit processing is described.     

An improved GaAs device model for the simulation of analog integrated circuit

This paper describes an improved device model of GaAs MESFETs and heterojunction FETs for the design and analysis of analog integrated circuits. The proposed device model provides a new expression for the current and the capacitance of the device,which gives excellent agreements with experimental data for all regions of device operation. For the expression of the low frequency anomalies of GaAs devices, an improved technique with an equivalent circuit are presented to model the frequency dispersion of the transconductance and the drain conductance of the device, which give a good agreement with the experimental data of both the frequency dispersion and the lag effect of the device. The new device model proposed here clearly provides a superior prediction of the performance of GaAs analog integrated circuit.     

TFEL optoelectronic integrated circuit on Si

A unique optoelectronic integrated circuit fabricated with AC thin film electroluminescent (TFEL) devices directly onto the drain of an Si DMOS transistor is demonstrated. DMOS switching controls the high voltage ratio between the TFEL device and DMOS transistor. Active matrix addressing for electroluminescent devices is demonstrated using CMOS circuitry     

An ultra low noise readout integrated circuit for uncooled microbolometers

A low noise readout architecture for uncooled microbolometer focal plane arrays is described. The on-chip readout circuit contains an integration circuit in which the bolometer current is directed injected into a capacitor, and exhibits extremely low noise with no decrease in signal by using an ultra low noise capacitive transimpedance amplifier (CTIA). The simple configuration of the integration circuit makes it possible to operate more circuits in parallel, and increases the integration time and number of pixels. A 40 × 30 uncooled microbolometer focal plane array based on the low noise ROIC was implemented on silicon using a 0.5 μm CMOS technology. The total output noise voltage is 260 μV RMS. A noise at this level is so low that can loosen required TCR in the bolometer material. Experimental values of voltage responsivities of 3.98 × 10⁵ V/W on average at 1 Hz modulation frequency have been achieved.