3‐Level Envelope Delta‐Sigma Modulation RF Signal Generator for High‐Efficiency Transmitters

This paper presents a 0.13 μm CMOS 3‐level envelope delta‐sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz‐centered fully symmetrical 3‐level EDSM signal for high‐efficiency power amplifier architectures. It consists of an I‐Q phase modulator, a Class B wideband buffer, an up‐conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3‐state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second‐order BPF as its load to provide enough bandwidth. To achieve an accurate 3‐state envelope level in the up‐mixer output, the LO bias level is optimized. The I‐Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I‐Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of –1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.     

一种非线性元件实现线性放大的改进技术与仿真

提出了一种改进的非线性元件实现线性放大（Linear Amplifier Using Nonlinear Components,LINC）理论,将幅度和相位均有变化的射频信号分离成包络信号和恒包络角调信号,将包络信号分两路反相调制到后者的相位中,对两路调制后的恒包络信号进行变频放大,通过减法电路得到放大后的上变频输入射频信号.因为恒幅信号可以在放大器的非线性区放大而不失真,提高了整体效率高.推导出其电压增益为KG/Em,并对不同频率和幅度进行了仿真,仿真结果表明实现了理论分析预期的放大效果.     

A LINC-based polar transmitter with reduced envelope bandwidth for wideband communications

This paper presents a polar transmitter with reduced envelope bandwidth and the linear amplifier with nonlinear components (LINC) technique is used to produce constant-envelope signals according to the remaining envelope information. This architecture relaxes the bandwidth requirement for the traditional envelope modulators. Only the low-frequency part of the envelope signal is amplified to provide power supply for the power amplifier (PA) stage. In the LINC path, the remaining envelope information is modulated into the phase signals, which are used as the radio frequency (RF) input to the nonlinear PA pair. At the RF output, the envelope information is retrieved from these two parts by the supply-modulated PA pair. The simulation results show that the envelope bandwidth is reduced to around one third of the original bandwidth by the proposed technique. For 2-level LINC structures, the combining efficiency of the proposed architecture is improved to more than twice as the one of LINC-only structure since the combining angles are reduced.     

一款X波段高效率GaN负载调制平衡放大器MMIC

报道了一款采用0.25μm GaN HEMT工艺的X波段高效率负载调制平衡放大器芯片。该芯片由两个射频端口的90°Lange耦合器,一对平衡功率放大器和一个控制信号功率放大器组成。通过改变同频率处控制信号的幅度与相位去调制平衡功率放大器的阻抗。在连续波测试条件下,该负载调制平衡放大器芯片在8~11 GHz范围内,最大输出功率为42.5 dBm,饱和效率为45%~55%,当输出功率回退6 dB时,效率为40%~45%。     

A New Two-Branch Amplification Architecture and its Application with Various Modulated Signals

This paper proposes a new two-branch amplification architecture that combines baseband signal decomposition with RF front-end optimization. In the proposed architecture, the filtered modulated signals are separated into two components that are then amplified independently and combined to regenerate an amplified version of the original signal. A branch with an efficient amplifier transmits a low-varying envelope signal that contains the main part of the information. Another branch amplifies the residual portion of the signal. The baseband decomposition and parameters of the RF part are optimized to find the configuration that gives the best power efficiency and linearity. For M-ary quadrature amplitude modulation （M-QAM） signals, this technique is limited in terms of power efficiency. However, for filtered continuous phase modulation （CPM） signals, especially for minimum shift keying （MSK） and Gaussian MSK （GMSK） signals, high power efficiency can be achieved with no significant impact on the overall linearity. The results show that this technique gives better performance than the single-ended ctass-B amplifier.     

A Transmitter Architecture Based on Delta–Sigma Modulation and Switch-Mode Power Amplification

This brief presents a method of deploying RF switch-mode power amplification for varying envelope signals. Thereby the power amplifier can be operated as a switch with a high power efficiency as the result. The key idea is to transmit either a full RF period or none at all in such a way that the correct modulated RF signal is obtained after filtering. This is accomplished in a novel configuration of a low-pass DeltaSigma modulator using a phase modulated clock combined with a simple AND-gate. The designed modulator is easy to implement, displays very good linearity and offers time domain signals that promote the power efficiency of the power amplifier. The working principle is described through theory and simulations, and validation is done via measurements on a prototype of the modulator. Measurements on the prototype show that the presented modulator modulates a UMTS signal with more than 10-dB margin to the spectrum mask and EVM below 0.85% RMS (req<17.5%). Delta-sigma, power amplifier (PA), RF, switch mode, transmitter architecture, varying envelope.     

High Average-Efficiency Multimode RF Transmitter Using a Hybrid Quadrature Polar Modulator

This paper presents a hybrid quadrature polar modulator (HQPM) to drive the power amplifier (PA) highly efficiently in a wireless RF transmitter required for multimode operation. For enhancing the transmit efficiency, a switching-mode PA realized as Class-E design is used in the transmitter. The HQPM consists of a quadrature modulator for processing the RF modulated carrier and a Class-S modulator for processing the supply-voltage signal. The quadrature modulator and the Class-S modulator deliver the output signals with proportional envelope variation before being inserted into the RF-input terminal and the supply-voltage terminal of a Class-E PA, respectively, causing the double envelope modulation to distort the modulated RF signal at the PA output. Therefore, a digital predistorter is embedded in the HQPM for compensation. The proposed HQPM-based transmitter can help reducing the average dc and input RF powers and the output feedthrough levels so as to enhance power added efficiency and adjacent channel power rejection remarkably.     

A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth

This paper presents a CMOS RF power amplifier that employs a digital polar architecture to improve the overall power efficiency when amplifying signals with high linearity requirements. The power amplifier comprises 64 parallel RF amplifiers that are driven by a constant envelope RF phase-modulated signal. The unit amplifiers are digitally activated by a 6-bit envelope code to construct a non-constant envelope RF output, thereby performing a digital-to-RF conversion. In order to suppress the spectral images resulting from the discrete-time to continuous-time conversion of the envelope, the use of oversampling and four-fold linear interpolation is explored. An experimental prototype of the polar amplifier has been integrated in a 0.18- mum CMOS technology, occupies a total die area of 1.8 mm² , operates at a 1.6-GHz carrier frequency with a channel bandwidth of 20 MHz. For an OFDM signal, it achieves a power-added efficiency of 6.7% with an EVM of - 26.8 dB while delivering 13.6 dBm of linear output power and drawing 145 mA from a 1.7-V supply.     

Theoretical and experimental study of amplifier linearization basedon harmonic and baseband signal injection technique

This paper presents a novel linearization scheme for RF amplifiers based on simultaneous harmonic and baseband signal injection. In this method, second-order frequency components generated by predistortion circuits are fed to the input of the main amplifier to mix with the fundamental signal for third-order intermodulation distortion (IMD) cancellation. A general and rigorous analytical formulation of baseband, harmonic, and the proposed injection techniques is presented, and from these derived expressions, the optimum conditions for IMD suppression are developed. The result also reveals the practical limitation of the proposed method subject to gain and phase error associated with the RF and baseband circuitry. For comparison purposes, an amplifying system is constructed for the experimental investigation of second-order signal injection approach. Both two-tone and digitally modulated waveforms are employed in these measurements     

Analysis of a Fully Matched Saturated Doherty Amplifier With Excellent Efficiency

A saturated Doherty amplifier based on class-F amplifiers is analyzed in terms of its load modulation behavior, efficiency, and linearity. Simulations included the amplitude ratio and phase difference between the fundamental and third harmonic voltages, the current/voltage waveforms, load lines, and the third-order intermodulation amplitudes/phases of the carrier and peaking amplifiers. The saturated doherty power amplifier was implemented using two Eudyna EGN010MK GaN HEMTs with a 10-W peak envelope power. For a 2.14-GHz forward-fink wideband code-division multiple-access signal, the doherty amplifier delivers an excellent efficiency of 52.4% with an acceptable linearity of -28.3 dBc at an average output power of 36 dBm. Moreover, the amplifier can provide the high linearity performance of -50 dBc using the digital feedback predistortion technique.     

Binary Power Amplifier with 2‐Bit Sigma‐Delta Modulation Method for EER Transmitter

A novel power amplifier for a polar transmitter is proposed to achieve better spectral performance for a wideband envelope signal. In the proposed scheme, 2‐bit sigma‐delta (ΣΔ) modulation of the envelope signal is introduced, and the power amplifier configuration is modified in a binary form to accommodate the 2‐bit digitized envelope signals. The 2‐bit ΣΔ modulator lowers the noise of the envelope signal by fine quantization and thus enhances the spectral property of the RF signal. The Ptolemy simulation results of the proposed structure show that the spectral noise is reduced by 10 dB in a full transmit band of the EDGE system. The dynamic range is also enhanced. Since the performance is improved without increasing the over‐sampling ratio, this technique is best suited for wireless communication with high data rates.     

A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control

A digitally modulated power amplifier (DPA) in 1.2 V 0.13$ muhbox{m}$ SOI CMOS is presented, to be used as a building block in multi-standard, multi-band polar transmitters. It performs direct amplitude modulation of an input RF carrier by digitally controlling an array of 127 unary-weighted and three binary-weighted elementary gain cells. The DPA is based on a novel two-stage topology, which allows seamless operation from 800 MHz through 2$~$ GHz, with a full-power efficiency larger than 40% and a 25.2 dBm maximum envelope power.      

基于RF2422正交调制的分析与仿真

第3代移动通信系统采用了线性化调制方式,对放大器的线性度的要求也很高,因此设计一款高线性度的放大器有着十分重要的意义。针对前馈射频放大器设计中插入导频法自适应控制而采取的一种解决方法:通过RF2422正交调制双音频信号的载波信号作为导频信号,利用音频信号幅度的变化来控制幅度与相位变化,并利用ADS做出部分仿真。     

The class BD high-efficiency RF power amplifier

Class B and class D operation of the same RF power amplifier circuit is not normally possible because of constraints imposed by the tuned output circuit and DC power input circuit. The use of square-wave drive in a current switching class D RF amplifier circuit allows the amplifier to move gradually from current source to current switch operation. This amplifier, called class BD, has a linear transfer characteristic (drive envelope to output envelope) and an efficiency 1.23 times that of a class B RF amplifier with the same peak output. The addition of a resistive AC current path to ground in the DC power input circuit of the class BD RF amplifier allows operation with sinewave driving waveforms. While this lowers the efficiency at the peak output, it can raise it at lower outputs, making possible a factor of 1.57 improvement in efficiency in the amplification of signals with large peak-to-average ratios. The class BD RF amplifier may therefore be used as a broad-band replacement for a Doherty-type amplifier.     

A Polar Modulator Using Self-Oscillating Amplifiers and an Injection-Locked Upconversion Mixer

A polar modulator for use with non-constant envelope signals is presented. Techniques for efficient behavior of both the amplitude (AM) and phase (PM) path are introduced. The amplitude modulation technique is based on asynchronous pulse-width modulation of a phase-modulated RF signal. The digital signal generated in this way is suited for amplification using a nonlinear, efficient type of PA, while preserving the AM modulation, since this information is present in the signal. The efficiency of the switching amplifier is less dependent of the output power, compared to class B operation. Using a self-oscillating, asynchronous type of pulse-width modulator, the spurs are concentrated in narrow bands well separated from the signal band. These switching spurs are filtered out by the filters already present in the transmitter. The feasibility of this RF-pulse-width-modulation is proven by measurements with amplitude modulated signals on a prototype in 0.18 mum CMOS. Unmodulated, the circuit is able to deliver a peak output power of 8.26 dBm with a drain efficiency of 35%. In the phase-modulation path of the polar modulator, injection locking of an oscillator is used as a single-stage high-gain amplifier. Avoiding multiple stages and related power loss improves the overall power efficiency.     

LINC power amplifier combiner method efficiency optimization

Linear amplification using nonlinear components (LINC) is a method of vector summing two constant amplitude phase-modulated signals to achieve power amplification. The theoretical efficiency of the LINC power amplifier has been reported as 100% since highly efficient nonlinear constant amplitude amplifiers can be used. However, the 100% efficiency performance is only possible at one or two loads along the power output curve. The bulk of the papers regarding LINC has focused on clever implementations of the signal vector decomposition as well as methods to achieve highly linear signal separation. There has been little regard in the literature to the signal combiner implementation necessary to achieve the high power-added efficiency (PAE) of the LINC radio frequency (RF) power amplifier. Efficiency is not an intrinsic property of the combiner implementations, however, the combiner method is the single biggest contributor to efficient performance of a LINC RF power amplifier. This paper develops an analysis method that determines the efficiency of the LINC power amplifier as a function of the amplitude modulation statistics. This can be employed to design the RF communication system amplitude modulation characteristics and to tradeoff and optimize the RF transmitter PAE     

A Class‐D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise

A class‐D audio amplifier for a digital hearing aid is described. The class‐D amplifier operates with a pulsecode modulated (PCM) digital input and consists of an interpolation filter, a digital sigma‐delta modulator (SDM), and an analog SDM, along with an H‐bridge power switch. The noise of the power switch is suppressed by feeding it back to the input of the analog SDM. The interpolation filter removes the unwanted image tones of the PCM input, improving the linearity and power efficiency. The class‐D amplifier is implemented in a 0.13‐μm CMOS process. The maximum output power delivered to the receiver (speaker) is 1.19 mW. The measured total harmonic distortion plus noise is 0.015%, and the dynamic range is 86.0 dB. The class‐D amplifier consumes 304 μW from a 1.2‐V power supply.     

6‐GHz‐to‐18‐GHz AlGaN/GaN Cascaded Nonuniform Distributed Power Amplifier MMIC Using Load Modulation of Increased Series Gate Capacitance

A 6‐GHz‐to‐18‐GHz monolithic nonuniform distributed power amplifier has been designed using the load modulation of increased series gate capacitance. This amplifier was implemented using a 0.25‐μm AlGaN/GaN HEMT process on a SiC substrate. With the proposed load modulation, we enhanced the amplifier's simulated performance by 4.8 dB in output power, and by 13.1% in power‐added efficiency (PAE) at the upper limit of the bandwidth, compared with an amplifier with uniform gate coupling capacitors. Under the pulse‐mode condition of a 100‐μs pulse period and a 10% duty cycle, the fabricated power amplifier showed a saturated output power of 39.5 dBm (9 W) to 40.4 dBm (11 W) with an associated PAE of 17% to 22%, and input/output return losses of more than 10 dB within 6 GHz to 18 GHz.     

Radio Frequency Pulsewidth Modulation

The width of a train of square pulses can be varied to produce a modulated carrier at the pulse repetition frequency. When the pulse train is generated by switching (class D) transistors, highefficiency operation is possible. The efficiency of this type of amplifier can be significantly higher than that of conventional pulsewidth modulation amplifiers, since the switching rate is reduced. In addition, the spectrum of a bipolar pulse train so modulated has the highly desirable property of all spurious products being band limited near the odd harmonics of the carrier.     

应用于4G-LTE无线通信系统的F类高PAE射频功率放大器

为了有效实现高谐波抑制并提高功率附加效率,提出了一种适用于4G-LTE无线通信系统的高效F类功率放大器。该功率放大器使用了低电压p-HEMT晶体管和小型微带抑制单元,能够在低射频输入功率下产生n次谐波抑制和较高的功率附加效率（power added efficiency,PAE）。采用谐波平衡法对提出的功率放大器进行了仿真分析,并对其进行了实际制造。通过实际测量对仿真结果进行了验证。测量结果显示,提出功率放大器的工作频率为1.8 GHz,带宽为100 MHz,平均PAE为76.9％,且具有2V的极低漏极电压。射频输入功率范围分别为0-12 dBm时,最大输出功率和增益分别为23.4和17.5 dBm。