A 77 GHz mHEMT MMIC Chip Set for Automotive Radar Systems

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 µm gate‐length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4‐inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2 mm × 2 mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1 mm × 2 mm. The frequency doubler achieved an output power of –6 dBm at 76.5 GHz with a conversion gain of ?16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2 mm × 1.2 mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W‐band.     

W‐Band MMIC chipset in 0.1‐μm mHEMT technology

We developed a 0.1‐μm metamorphic high electron mobility transistor and fabricated a W‐band monolithic microwave integrated circuit chipset with our in‐house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz–108 GHz band and achieved excellent spurious suppression. A low‐noise amplifier (LNA) with a four‐stage single‐ended architecture using a common‐source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W‐band image‐rejection mixer (IRM) with an external off‐chip coupler was also designed. The IRM provided a conversion gain of 13 dB–17 dB for RF frequencies of 80 GHz–110 GHz and image‐rejection ratios of 17 dB–19 dB for RF frequencies of 93 GHz–100 GHz.     

Design and fabrication of 94 GHz MMIC single balanced resistive mixer without IF balun

In this paper, a 94 GHz microwave monolithic integrated circuit (MMIC) single balanced resistive mixer affording high LO-to-RF isolation was designed without an IF balun. The single balanced resistive mixer, which does not require an external IF balun, was designed using a 0.1 μm InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (HEMT). The designed MMIC single balanced resistive mixer was fabricated using the 0.1 μm MHEMT MMIC process. From the measurement, conversion loss of the single balanced resistive mixer was 14.7 dB at an LO power of 10 dBm. The P_1 dB (1 dB compression point) values of the input and output were 10 dBm and −5.3 dBm, respectively. The LO-to-RF isolation of the single balanced resistive mixer was −35.2 dB at 94.03 GHz. The single balanced resistive mixer in this work provided high LO-to-RF isolation without an IF balun.     

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology

In this paper, a passive down mixer is proposed, which is well suited for short-channel field-effect transistor technologies. The authors believe that this is the first drain-pumped transconductance mixer that requires no dc supply power. The monolithic microwave integrated circuit (MMIC) is fabricated using digital 90-nm silicon-on-insulator CMOS technology. All impedance matching, bias, and filter elements are implemented on the chip, which has a compact size of 0.5 mm/spl times/0.47 mm. The circuit covers a radio frequency range from 30 to 40 GHz. At a RF frequency of 35 GHz, an intermediate frequency of 2.5 GHz and a local-oscillator (LO) power of 7.5 dBm, a conversion loss of 4.6 dB, a single-sideband (SSB) noise figure (NF) of 7.9 dB, an 1-dB input compression point of -6 dBm, and a third-order intercept point at the input of 2 dBm were measured. At lower LO power of 0 dBm, a conversion loss of 6.3 dBm and an SSB NF of 9.7 dB were measured, making the mixer an excellent candidate for low power-consuming wireless local-area networks. All results include the pad parasitics. To the knowledge of the authors, this is the first CMOS mixer operating at millimeter-wave frequencies. The achieved conversion loss is even lower than for passive MMIC mixers using leading edge III/V technologies, showing the excellent suitability of digital CMOS technology for analog circuits at millimeter-wave frequencies.     

E‐Band Wideband MMIC Receiver Using 0.1 µm GaAs pHEMT Process

In this paper, the implementations of a 0.1 µm gallium arsenide (GaAs) pseudomorphic high electron mobility transistor process for a low noise amplifier (LNA), a subharmonically pumped (SHP) mixer, and a single‐chip receiver for 70/80 GHz point‐to‐point communications are presented. To obtain high‐gain performance and good flatness for a 15 GHz (71 GHz to 86 GHz) wideband LNA, a five‐stage input/output port transmission line matching method is used. To decrease the package loss and cost, 2nd and 4th SHP mixers were designed. From the measured results, the five‐stage LNA shows a gain of 23 dB and a noise figure of 4.5 dB. The 2nd and 4th SHP mixers show conversion losses of 12 dB and 17 dB and input P1dB of –1.5 dBm to 1.5 dBm. Finally, a single‐chip receiver based on the 4th SHP mixer shows a gain of 6 dB, a noise figure of 6 dB, and an input P1dB of –21 dBm.     

A 210 GHz Dual-Gate FET Mixer MMIC With ${>}$2 dB Conversion Gain, High LO-to-RF Isolation, and Low LO-Drive Requirements

We demonstrate the first active mixer monolithic microwave integrated circuit (MMIC) with positive conversion gain beyond 200 GHz. The presented dual-gate topology is realized in a 100 nm gate length metamorphic high electron mobility transistor technology. Without any pre- or post-amplification, the down-conversion mixer achieves $>$ 2 dB conversion gain and $>$16 dB local oscillation to radio frequency (LO-to-RF) isolation at 210 GHz, outperforming state-of-the-art resistive MMIC mixers. The conversion gain becomes positive for LO power levels larger than 0 dBm, making the mixer suitable for being driven by an MMIC-based frequency doubler. A comparison to state-of-the-art G-band mixers is given.      

A compact broadband MMIC sub-harmonic mixer using quasi-lumped transmission lines

A compact broadband monolithic microwave integrated circuit (MMIC) sub-harmonic mixer using an OMMIC 70 nm GaAs mHEMT technology is demonstrated for 60 GHz down-converter applications. The present mixer employs an anti-parallel diode pair (APDP) to fulfill a sub-harmonic mixing mechanism. Quasi-lumped components are employed to broaden the operational bandwidth and minimize the chip size to 1.5×0.77 mm². The conversion gain is optimized by a quasi-lumped 90° phase shift stub. Experimental results show that from 50 GHz to 70 GHz, the conversion gain varies between −12.1 dB and −15.2 dB with a LO power level of 10 dBm and 1 GHz IF. The LO-to-RF, LO-to-IF and RF-to-IF isolations are found to be greater than 19.5 dB, 21.3 dB and 25.8 dB, respectively. The second harmonic component of the LO signal is suppressed. The proposed mixer has an input 1 dB compression point of -2 dBm and exhibits outstanding figure-of-merits.     

A CMOS Ku-Band 4x Subharmonic Mixer

In this work, the design and measurement of a new 4x subharmonic mixer circuit is presented using CMOS 0.18 m technology. With an RF input signal at 12.1 GHz, and an LO signal at 3.0 GHz, an intermediate frequency of 100 MHz is produced (f_IF = f_RF - 4f_LO). The mixer uses a modified Gilbert-cell topology with octet-phase LO switching transistors to perform the quadruple subharmonic mixing. Included in the design is an active balun for the RF signal and a circuit that generates an octet-phase LO signals from a differential input. The mixer has a conversion gain of approximately 6 dB, 1-dB compression point of -12 dBm, IIP3 of -2 dBm, and IIP2 of 17 dBm. The circuit also exhibits excellent isolation between its ports (e.g. LO-RF: 71 dB, 4LO-RF: 59 dB).     

基于GaAs PHEMT工艺的60~90GHz功率放大器MMIC

研制了一款60~90 GHz功率放大器单片微波集成电路(MMIC),该MMIC采用平衡式放大结构,在较宽的频带内获得了平坦的增益、较高的输出功率及良好的输入输出驻波比(VSWR)。采用GaAs赝配高电子迁移率晶体管(PHEMT)标准工艺进行了流片,在片测试结果表明,在栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,功率放大器MMIC的小信号增益大于13 dB,在71~76 GHz和81~86 GHz典型应用频段,功率放大器的小信号增益均大于15 dB。载体测试结果表明,栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,该功率放大器MMIC饱和输出功率大于17.5 dBm,在71~76 GHz和81~86 GHz典型应用频段,其饱和输出功率可达到20 dBm。该功率放大器MMIC尺寸为5.25 mm×2.10 mm。     

Broadband single- and double-balanced resistive HEMT monolithicmixers

A double-balanced (DB) 3-18 GHz and a single-balanced (SB) 2-16 GHz resistive HEMT monolithic mixer have been successfully developed. The DB mixer consists of a AlGaAs/InGaAs HEMT quad, an active LO balun, and two passive baluns for RF and IF. At 16 dBm LO power, this mixer achieves the conversion losses of 7.5-9 dB for 4-13 GHz RF and 7.5-11 dB for 3-18 GHz RF. The SB mixer consists of a pair of AlGaAs/InGaAs HEMT's, an active LO balun, a passive IF balun and a passive RF power divider. At 16 dBm LO power, this mixer achieves the conversion losses of 8-10 dB for 4-15 GHz RF and 8-11 dB for 2-16 GHz RF. The simulated conversion losses of both mixers are very much in agreement with the measured results. Also, the DB mixer achieves a third-order input intercept (IP₃) of +19.5 to +27.5 dBm for a 7-18 GHz RF and 1 GHz IF at a LO drive of 16 dBm while the SB mixer achieves an input IP ₃ of +20 to +28.5 dBm for 2 to 16 GHz RF and 1 GHz IF at a 16 dBm LO power. The bandwidth of the RF and LO frequencies are approximately 6:1 for the DB mixer and 8:1 for the SB mixer. The DB mixer of this work is believed to be the first reported DB resistive HEMT MMIC mixer covering such a broad bandwidth     

Coplanar millimeter-wave ICs for W-band applications using 0.15μm pseudomorphic MODFETs

A small signal S-parameter and noise model for the cascode MODFET has been validated up to 120 GHz, allowing predictable monolithic microwave integrated circuit (MMIC) design up to W-band. The potential of coplanar waveguide technology to build compact, high performance system modules is demonstrated by means of passive and active MMIC components. The realized passive structures comprise a Wilkinson combiner/divider and a capacitively loaded ultra miniature branch line coupler. For both building blocks, very good agreement between the measured and modeled data is achieved up to 120 GHz. Based on the accurate design database, two versions of compact integrated amplifiers utilizing cascode devices for application in the 90-120 GHz frequency range were designed and fabricated. The MMICs have 26.3 dB and 20 dB gain at 91 GHz and 110 GHz, respectively. A noise figure of 6.4 dB was measured at 110 GHz. The 90-100 GHz amplifier was integrated with an MMIC tunable oscillator resulting in a W-band source delivering more than 6 dBm output power from 94 to 98 GHz     

An S‐Band Multifunction Chip with a Simple Interface for Active Phased Array Base Station Antennas

An S‐band multifunction chip with a simple interface for an active phased array base station antenna for next‐generation mobile communications is designed and fabricated using commercial 0.5‐μm GaAs pHEMT technology. To reduce the cost of the module assembly and to reduce the number of chip interfaces for a compact transmit/receive module, a digital serial‐to‐parallel converter and an active bias circuit are integrated into the designed chip. The chip can be controlled and driven using only five interfaces. With 6‐bit phase shifting and 6‐bit attenuation, it provides a wideband performance employing a shunt‐feedback technique for amplifiers. With a compact size of 16 mm² (4 mm × 4 mm), the proposed chip exhibits a gain of 26 dB, a P1dB of 12 dBm, and a noise figure of 3.5 dB over a wide frequency range of 1.8 GHz to 3.2 GHz.     

A 0.13 μm CMOS UWB RF Transmitter with an On‐Chip T/R Switch

This paper presents a fully integrated 0.13 μm CMOS MB‐OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low‐pass filter, a variable gain amplifier, a voltage‐to‐current converter, an I/Q up‐mixer, a differential‐to‐single‐ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 μm CMOS technology. The fabricated transmitter shows a ?3 dB bandwidth of 550 MHz at each sub‐band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.     

Monolithic SiGe Up‐/Down‐Conversion Mixers with Active Baluns

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on‐chip 1 to 6 GHz up‐conversion and 1 to 8 GHz down‐conversion mixers using a 0.8 µm SiGe hetero‐junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up‐conversion mixer was implemented on‐chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up‐conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down‐conversion mixer was implemented on‐chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down‐conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.     

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

This paper presents the design and performance characteristics of a 20-40 GHz monolithic double-balanced direct conversion mixer implemented using InGaP/GaAs HBT process. The compact MMIC mixer makes use of a Gilbert-cell multiplier and utilizes a broadband monolithic passive balun that has been developed for MMIC applications. The new balun makes use of multidielectric layer structure to achieve a broadband performance in a simple coplanar configuration. A measured return loss better than 15 dB, with a maximum insertion loss of 4.5 dB including the 3-dB power splitting loss has been achieved over the band from 15 to 45 GHz. Operated as a downconverter mixer, the newly developed direct conversion mixer achieves a measured conversion gain of 16 dB given an RF signal at 30 GHz, LO drive of 5 dBm and a downconverted baseband signal at 10 MHz. The mixer IP3 occurs at an output power of 4 dBm while the IP2 occurs at an output power of 11 dBm.     

K波段单片接收机设计

基于0.15μm GaAs PHEMT工艺,设计了一款K波段MMIC接收机,频率覆盖19～26 GHz。在单个芯片内集成了平衡式低噪声放大器、本振驱动放大器、镜像抑制次谐波混频器等电路。在19～26 GHz射频输入带宽内的转换增益为7 dB;噪声系数典型值为4 dB;输入回波损耗-12 dB;镜像抑制15 dB;本振-射频隔离度55 dB。为了降低了芯片成本,采用电磁场仿真软件对电路面积做优化设计,使得芯片面积仅为2 mm×4 mm。此接收机MMIC具有集成度高、可靠性高、体积小等特点,可广泛应用于各种微波通信系统和雷达系统。     

High‐Gain Double‐Bulk Mixer in 65 nm CMOS with 830 pW Power Consumption

A low‐power down‐sampling mixer in a low‐power digital 65 nm CMOS technology is presented. The mixer consumes only 830 µW at 1.2 V supply voltage by combining an NMOS and a PMOS mixer with cascade transistors at the output. The measured gain is (19 °1 dB) at frequencies between 100 MHz and 3 GHz. An IIP3 of ?5.9 dBm is achieved.     

26.5–30-GHz Resistive Mixer in 90-nm VLSI SOI CMOS Technology With High Linearity for WLAN

A resistive mixer with high linearity for wireless local area networks is presented in this paper. The fully integrated circuit is fabricated with a 90-nm very large scale integration silicon-on-insulator (SOI) CMOS technology and has a very compact size of 0.38 mm$, times,$0.32 mm. Design guidelines are given to optimize the circuit performance. Analytical calculations and simulations with an SOI large-signal Berkeley simulation model show good agreement with measurements. At an RF of 27 GHz, an IF of 2.5 GHz and zero dc power consumption, a conversion loss of 9.7 dB, a single-sideband noise figure of 11.4 dB, and a high third-order intercept point at the input of 20 dBm are measured at a local-oscillator (LO) power of 10 dBm. At lower LO power of 0-dBm LO power, the loss is 10.3 dB. To the knowledge of the author, the circuit has by far the highest operation frequency reported to date for a resistive CMOS mixer. Furthermore, it provides the highest linearity for a CMOS mixer operating at such high frequencies.     

A Ka‐Band 6‐W High Power MMIC Amplifier with High Linearity for VSAT Applications

A Ka‐band 6‐W high power microwave monolithic integrated circuit amplifier for use in a very small aperture terminal system requiring high linearity is designed and fabricated using commercial 0.15‐μm GaAs pHEMT technology. This three‐stage amplifier, with a chip size of 22.1 mm² can achieve a saturated output power of 6 W with a 21% power‐added efficiency and 15‐dB small signal gain over a frequency range of 28.5 GHz to 30.5 GHz. To obtain high linearity, the amplifier employs a class‐A bias and demonstrates an output third‐order intercept point of greater than 43.5 dBm over the above‐mentioned frequency range.