A device architecture for computing with quantum dots

We describe a paradigm for computing with interacting quantum dots, quantum-dot cellular automata (QCA). We show how arrays of quantum-dot cells could be used to perform useful computations. A new adiabatic switching paradigm is developed which permits clocked control, eliminates metastability problems, and enables a pipelined architecture     

Design metal-dot based QCA circuits using SPICE model

This paper proposes a SPICE model development methodology for quantum-dot cellular automata (QCA) cells and presents a SPICE model for QCA cells. The model is validated by simulating the basic logic gates such as inverter and majority voter. The proposed model makes it possible to design and simulate QCA combinational circuits and hybrid circuits of QCA and other NANO devices using SPICE. In the second half part of the paper, SET and QCA co-design methodology is proposed and SET is used as a readout interface of the QCA cell array. The SET and QCA hybrid circuit is a promising nano-scale solution.     

Binary Adders on Quantum-Dot Cellular Automata

This article describes the design of adder units on quantum-dot cellular automata (QCA) nanotechnology, which promises very dense circuits and high operating frequencies, using a single homogeneous layer of the basic cells. We construct pipelined structures without the earlier noise problems, avoided by careful clocking organization, and the modular layouts are verified with the QCADesigner coherence vector simulation. Our designs occupy only a fraction of area compared to the previous noise rejecting design, while having also superior performance, and it is shown that the wiring overhead of the arithmetic circuits on QCA grows with square-law dependence on the operand word length. Power analysis at the fundamental Landauer’s limit shows, that the operating frequencies will indeed be bound by the energy dissipated in information erasure: under irreversible operation, the clock rates of the adder units on molecular QCA are only tens of gigahertz, while the switching speed of the technology is in the terahertz regime.     

Single-bit digital comparator circuit design using quantum-dot cellular automata nanotechnology

The large amount of secondary effects in complementary metal–oxide–semiconductor technology limits its application in the ultra-nanoscale region. Circuit designers explore a new technology for the ultra-nanoscale region, which is the quantum-dot cellular automata (QCA). Low-energy dissipation, high speed, and area efficiency are the key features of the QCA technology. This research proposes a novel, low-complexity, QCA-based one-bit digital comparator circuit for the ultra-nanoscale region. The performance of the proposed comparator circuit is presented in detail in this paper and compared with that of existing designs. The proposed QCA structure for the comparator circuit only consists of 19 QCA cells with two clock phases. QCA Designer-E and QCA Pro tools are applied to estimate the total energy dissipation. The proposed comparator saves 24.00% QCA cells, 25.00% cell area, 37.50% layout cost, and 78.11% energy dissipation compared with the best reported similar design.     

Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking

This paper describes a line-based, quantum-dot cellular automata (QCA) memory cell design that is synchronized by a dual-phase clocking scheme. In line-based QCA memory cells, data bits are stored oscillating along QCA lines. The best known line-based memory cell implementation requires three new clocking zones in addition to the four clocking zones defined by the conventional QCA clocking scheme and utilizes three parallel clocking zones per cell. The proposed memory cell requires only two new clocking zones and utilizes two parallel clock zones per memory cell; permitting less CMOS circuity for clock design and denser QCA system implementations. Furthermore, read throughput is improved to one operation per clock cycle (from one read per two clock cycles). Simulations with the $hbox{tt QCADesigner}$ simulator are performed to verify the functionality of the proposed QCA memory cell.      

Design of reversible parity generator and checker for the implementation of nano-communication systems in quantum-dot cellular automata

Complementary metal-oxide semiconductor (CMOS) technology may face so much problems in future due to the smaller size of transistors and increase in circuits’ volume and chips temperature. A new technology that can be a good alternative to CMOS circuits is quantum-dot cellular automata (QCA). These technologies have features such as a very low power consumption, high speed and small dimensions. In nano-communication system, error detection and correction in a receiver message are major factors. In addition, circuit reversibility in QCA helps designs a lot. In this research, generator and checker circuit of the reversible parity and eventually their nano-communication system are designed reversible using odd parity bit. The proposed circuits and the theoretical values are tested by QCADesigner 2.0.3 simulator to show the correct operation of the circuits. According to the simulation results, the proposed circuits compared with the previous structure improve delay by 90–75–35% in generator and checker structures of parity and their reversibility of nano-communication system, respectively. The proposed circuits are used in nano-transmitters and nano-receivers.

     

Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA

An extensive literature exists on the mathematical characterization of reversible logic. However, the possible technological basis of this computing paradigm still remains unsolved. In this paper, quantum-dot cellular automata (QCA) is investigated for testable implementations of reversible logic. Two new reversible gates (referred to as QCA1 and QCA2) are proposed. These gates are compared (in terms of delay, area and logic synthesis) with other reversible gates (such as Toffoli and Fredkin) for QCA implementation. Due to the expected high error rates in nano-scale manufacturing, testing of nano devices, including QCA, has received considerable attention. The focus of this paper is on the testability of a one-dimensional array made of QCA reversible gates, because the bijective nature of reversible gates significantly facilitates testing of arrays. The investigation of testability relies on a fault model for molecular QCA that is based on a single missing/additional cell assumption. It is shown that C-testability of a 1D reversible QCA gate array can be guaranteed for single fault. Theory and circuit examples show that error masking can occur when multiple faults are considered.     

Design of sequential circuits by quantum-dot cellular automata

This paper proposes a detailed design analysis of sequential circuits for quantum-dot cellular automata (QCA). This analysis encompasses flip-flop (FF) devices as well as circuits. Initially, a novel RS-type FF amenable to a QCA implementation is proposed. This FF extends a previous threshold-based configuration to QCA by taking into account the timing issues associated with the adiabatic switching of this technology. The characterization of a D-type FF as a device consisting of an embedded wire is also presented. Unique timing constraints in QCA sequential logic design are identified and investigated. An algorithm for assigning appropriate clocking zones to a QCA sequential circuit is proposed. A technique referred to as stretching is used in the algorithm to ensure timing and delay matching. This algorithm relies on a topological sorting and enumeration step to consistently traversing only once the edges of the graph representation of the QCA sequential circuit. Examples of QCA sequential circuits are provided.     

Self-assembled In0.5Ga0.5As quantum-dotlasers with doped active region

Self-assembled In_0.5Ga_0.5As quantum-dot lasers with different doping schemes in the active region are investigated. Their lasing wavelength, characteristic temperature, quantum efficiency, and internal loss are characterized and correlated with the size, uniformity, and density of the quantum dots as revealed by atomic force microscopy. Continuous-wave operation of Be-doped quantum-dot lasers has been achieved. Undoped In_0.5Ga_0.5 As quantum-dot lasers with a characteristic temperature as high as 125 K above room temperature have also been demonstrated     

Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability

The quantum-dot cellular automata have emerged as one of the potential computational fabrics for the emerging nanocomputing systems due to their ultra-high speed and integration density. On the other hand, reversible computing promises low power consuming circuits by nullifying the energy dissipation during the computation. This work targets the design of a reversible arithmetic logic unit (RALU) in the quantum-dot cellular automata (QCA) framework. The design is based on the reversible multiplexer (RM) synthesized by compact 2:1 QCA multiplexers introduced in this paper. The proposed reversible multiplexer is able to achieve 100% fault tolerance in the presence of single missing or additional cell defects in QCA layout. Furthermore, the advantage of modular design of reversible multiplexer is shown by its application in synthesizing the RALU with separate reversible arithmetic unit (RAU) and reversible logic unit (RLU). The RALU circuit can be tested for classical unidirectional stuck-at faults using the constant variable used in this design. The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability.     

Single-Bit Comparator in Quantum-Dot Cellular Automata (QCA) Technology Using Novel QCA-XNOR Gates

To fill the continuous needs for faster processing elements with less power consumption causes large pressure on the complementary metal oxide semiconductor (CMOS) technology developers. The scaling scenario is not an option nowadays and other technologies need to be investigated. The quantum-dot cellular automata (QCA) technology is one of the important emerging nanotechnologies that have attracted much researchers’ attention in recent years. This technology has many interesting features, such as high speed, low power consumption, and small size. These features make it an appropriate alternative to the CMOS technique. This paper suggests three novel structures of XNOR gates in the QCA technology. The presented structures do not follow the conventional approaches to the logic gates design but depend on the inherent capabilities of the new technology. The proposed structures are used as the main building blocks for a single-bit comparator. The resulted circuits are simulated for the verification purpose and then compared with existing counterparts in the literature. The comparison results are encouraging to append the proposed structures to the library of QCA gates.     

On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire

Among emerging technologies, Quantum-dot Cellular Automata (QCA) relies on innovative computational paradigms. For nano-scale implementation, the so-called processing-by-wire (PBW) paradigm in QCA is very effective as processing takes place, while signal communication is accomplished. This paper analyzes the defect tolerance properties of PBW for manufacturing tiles by molecular QCA cells. Based on a 3?×?3 grid and various input/output arrangements in QCA cells, different tiles are analyzed and simulated using a coherence vector engine. The functional characterization and polarization level of these tiles for undeposited cell defects are reported and detailed profiles are provided. It is shown that novel features of PBW are possible due to the spatial redundancy of the cells in the tiles that permits to retain at high probability the fault free function in the presence of defects. Moreover, it is shown that QCA tiles are robust and inherently tolerant to cell defects (by logic equivalence, also additional cell defects can be accommodated).     

量子点分布误差对镜像电荷自动元胞机的影响

研究了量子点分布的误差对镜像电荷量子元胞自动机(QCA)的影响. 镜像电荷QCA每个元胞中的四个量子点是被严格限制在正方形元胞的四个角上的，考虑到现有的量子点生长技术，量子点偏离理想位置的情况是不可避免的. 模拟了在正态分布误差存在时镜像电荷QCA的工作情况，并估算了在较小的介电常数下镜像电荷QCA可能达到的最高工作温度. 仿真结果表明正态分布标准差sigma小于0.1时，镜像电荷QCA可以正常工作，同时缩小QCA的元胞尺寸可以使镜像电荷QCA的最高工作温度达到室温以上.     

Slow Light Based on Coherent Population Oscillation in Quantum Dots at Room Temperature

We develop a model for slow light based on the coherent population oscillation of quantum dots at room temperature. With the absorption dip and corresponding variation of the refractive index due to the coherent population beating induced by the pump and probe signal, quantum dots can be used as a slow-light medium. Our theoretical model matches the experimental results very well. We also experimentally and theoretically demonstrate that both the forward-bias injection current and reverse-bias voltage can change the group index in a semiconductor quantum-dot waveguide. Our results indicate that quantum-dot devices can be potentially used as electrically and optically controllable slow light devices     

An enhanced high-speed multi-digit BCD adder using quantum-dot cellular automata

The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata(QCA). Even though many efficient arithmetic circuits were designed using QCA, there is still a challenge to implement high-speed circuits in an optimized manner. Among these circuits, one of the essential structures is a parallel multi-digit decimal adder unit with significant speed which is very attractive for future environments. To achieve high speed, a new correction logic formulation method is proposed for single and multi-digit BCD adder. The proposed enhanced single-digit BCD adder(ESDBA) is 26% faster than the carry flow adder(CFA)-based BCD adder. The multi-digit operations are also performed using the proposed ESDBA, which is cascaded innovatively. The enhanced multi-digit BCD adder(EMDBA) performs two 4-digit and two 8-digit BCD addition 50% faster than the CFA-based BCD adder with the nominal overhead of the area. The EMDBA performs two 4-digit BCD addition 24% faster with 23% decrease in the area, similarly for 8-digit operation the EMDBA achieves 36% increase in speed with 21% less area compared to the existing carry look ahead(CLA)-based BCD adder design. The proposed multi-digit adder produces significantly less delay of(N-1)+3.5 clock cycles compared to the N*One digit BCD adder delay required by the conventional BCD adder method. It is observed that as per our knowledge this is the first innovative proposal for multi-digit BCD addition using QCA.     

Analysis of missing and additional cell defects in sequential quantum-dot cellular automata

The defect characterization of sequential devices and circuits, implemented by molecular quantum-dot cellular automata (QCA), is analyzed in this paper. A RS-type flip–flop is first introduced; this flip–flop takes into account the timing issues associated with the adiabatic switching of this technology and its requirements. It is then shown that a D-type flip–flop can be constructed with an embedded QCA wire which extends over multiple clocking zones. The logic-level characterization of both flip–flop devices is provided. A single additional and missing cell defect model is assumed for molecular implementation. For sequential circuits, defect characterization is pursued. It is shown that defects affect the functionality of basic QCA devices, resulting mostly in unwanted inversion and majority voter acting as a wire at logic level. In this paper, it is shown that a device-level characterization of the defects and faults can be consistently extended to a circuit-level analysis.     

Novel MIS Ge-Si quantum-dot infrared photodetectors

The metal-insulator-semiconductor (MIS) Ge-Si quantum-dot infrared photodetectors (QDIPs) are successfully demonstrated. Using oxynitride as gate dielectric instead of oxide, the operating temperature reaches 140 and 200 K for 3-10 and 2-3 /spl mu/m detection, respectively. From the photoluminescence spectrum, the quantum-dot structures are responsible for the 2-3 /spl mu/m response with high operation temperature, and the wetting layer structures may be responsible for the 3-10 /spl mu/m response. This novel MIS Ge-Si QDIP can increase the functionality of Si chip such as noncontact temperature sensing and is compatible with ultra-large scale integration technology.     

A new quantum-dot cellular automata full-adder

A novel expandable five-input majority gate for quantum-dot cellular automata and a new full-adder cell are presented. Quantum-dot cellular automata (QCA) is an emerging technology and a possible alternative for semiconductor transistor based technologies. A novel QCA majority-logic gate is proposed. This component is suitable for designing QCA circuits. The gate is simple in structure and powerful in terms of implementing digital functions. By applying these kinds of gates, the hardware requirement for a QCA design can be reduced and circuits can be simpler in level, gate counts and clock phases. In order to verify the functionality of the proposed device, some physical proofs are provided. The proper functionality of the FA is checked by means of computer simulations using QCADesigner tool. Both simulation results and physical relations confirm our claims and its usefulness in designing every digital circuit.     

Quantum-Dot Infrared Photodetectors

We present a study of a series of n-i-n InAs quantum-dot infrared photodetectors (QDIPs) with unintentionally doped active regions. Different quantum-dot capping layer materials (GaAs, InGaAs, and AlGaAs) are utilized to tune the operating wavelength and modify the QDIP performance. Normal-incidence operation with high detectivity in the mid (3-5 ) and long (8-12 ) wavelength regimes and the potential for multicolor operation is demonstrated.     

改进型QCA共面交叉电路的可靠性分析

针对量子元胞自动机(QCA)电路中电路单元复杂化能提高电路可靠性的假设,采用概率转移矩阵对一种改进后的QCA共面交叉电路单元及原始电路单元的可靠性进行对比分析,以检验复杂化设计能否提高电路可靠性,并利用四选一数据选择器进行深入研究以验证分析结果。仿真结果表明,该改进方案将共面交叉电路单元应用于单独运行及组合电路中分别使电路的可靠性降低了19.6%和0.84%。改进后的电路单元不但没有提高可靠性,反而由于电路结构的复杂化降低了其可靠性。