基于EDAC的低开销星载迫零检测算法

针对基于传统三模冗余思想设计的星载MIMO检测算法中矩阵乘积运算资源占用率较高的问题,提出一种抗SEU的低开销星载EDAC迫零检测算法。通过在算法的矩阵乘积运算中扩展加入两行(列)"校验和",实现自检错、自纠错功能;采用模块化设计和乘法器核复用的方法,减少资源占用率和系统自恢复时间,整体提高系统的可靠性。仿真与测试结果表明,与基于三模冗余和RPR设计的迫零检测算法相比,该算法以较小的检错纠错延时为代价,提高了抗SEU性能,显著降低了资源占用率。     

改进的基于属性不变量生成和数学归纳法的时序逻辑优化算法

为了在时序逻辑综合中使电路面积和关键路径延迟同时得到快速优化,提出一种改进的基于假设后验证的时序优化算法.在位并行随机模拟提取候选属性不变量之前,利用寄存器共享来降低初始候选不变量数目,以减少SAT程序的频繁调用;然后利用推测化简模型和改进的数学归纳法将基本条件和归纳步骤合并处理,有效地降低了电路规模和关键路径延迟,同时提高了算法运行速度.实验数据表明,文中算法使寄存器和节点规模平均下降41％和48％,关键路径延迟减小30％;与同类方法相比,该算法运行时间平均下降17％.     

高性能数字信号处理器的设计

本文完成了16位的数字信号处理器的设计，该数字信号处理器设计了针对信号处理的指令与体系结构，指令数为88条，综合后数字信号处理器的内核单元数为12799。十六位定点数字信号处理器为单发射系统，采用了多数据和地址总线设计，使四级流水在流水线的四个周期保持正常的数据流动，分散的寄存器形式结构，使多数指令在一周期内得到完成。数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。在中央算术逻辑单元中，完成加／减运算以及逻辑运算，在进位链中采用了选择进位链，对数据溢出采用了饱和处理的方法；在乘法器单元中采用BOOTH算法和先进进位加法器相结合的单元设计；在排序器设计中，按照中断、指令第二指令字、累加器、堆栈等不同的程序排序源设计不同的通路，并按照ZLVC的条件，设计了条件转移指令；在辅助寄存器单元选择一条与正向进位相反方向的进位来实现FFT算法位反序要求；在中断单元中，采用二级中断，大堆栈保存地址，流水“冲刷”技术。     

有效的JPEG2000小波变换VLSI结构设计

基于提升的小波变换算法,提出了一种有效的JPEG2000小波变换的VLSI实现结构。采用了时分复用技术优化结构设计,实现了数据变换的细节分量和近似分量交替输出,以及有效减少了所用乘法器、加法器运算单元和寄存器单元数量,从而有效减少系统占用面积和功耗。该结构实现简单、规则,具有很好的扩展性,非常适合于VLSI设计实现。     

改进的蒙哥马利算法及其模乘法器实现

模乘运算的速度决定了公钥加密系统和众多通信系统的系统性能。通过分析Walter等学者对蒙哥马利算法的研究成果,得到运算精简基2-MMM算法,实现基于运算精简算法的线性脉动阵列模乘法器。在验证改进算法正确性后,对模乘法器进行功能仿真和综合。用TSMC 0.18 μm标准单元库综合,可以工作在200 MHz时钟下,等效单元为42 k门,完成1 024 bit模乘法运算需     

一种新的有效的小波变换VLSI结构

基于提升的小波变换算法,提出了一种新的功率面积有效的5—3和9—7小波变换的VLSI实现结构。采用时分复用和嵌入式并行流水线技术优化设计结构,有效地减少了所用乘法器、加法器运算单元和寄存器单元数量,以及对存储器的访问次数,从而有效地减少系统占用面积和功耗。系统实现了每一个时钟产生一个输出,输入信号的细节分量和近似分量交替输出。该结构具有简单、规则,以及扩展性好的特点,非常适合于VLSI设计实现。     

基于改进4-2压缩结构的32位浮点乘法器设计

本文介绍一种用于高性能DSP的32位浮点乘法器设计,通过采用改进Booth编码的树状4-2压缩器结构,提高了速度,降低了功耗,该乘法器结构规则且适合于VLSI实现,单个周期内完成一次24位整数乘或者32位浮点乘。整个设计采用Verilog HDL语言结构级描述,用0.25um单元库进行逻辑综合.完成一次乘法运算时间为24.30ns.     

FSA乘法器的设计与实现

鉴于有限状态机对于具有逻辑顺序和时序规律的事件能有清晰的描述,对传统乘法器设计进行改进。提出一种快速、低功耗的FSA乘法器设计。该设计使用VHDL语言进行实现,并在QuartusⅡ上通过了仿真。仿真结果表明基于状态机的与基于逻辑电路的设计相比,在运算过程中产生的功耗以及运算速度上有较大的改善。     

基于改进4—2压缩结构的32位浮点乘法器设计

本文介绍一种用于高性能DSP的32位浮点乘法器设计,通过采用改进Booth编码的树状4-2压缩器结构,提高了速度,降低了功耗,该乘法器结构规则且适合于VLSI实现,单个周期内完成一次24位整数乘或者32位浮点乘。整个设计采用Verilog HDL语言结构级描述,用0.25um单元库进行逻辑综合.完成一次乘法运算时间为24.30ns.     

基于改进KOA方法的模2域多项式乘法器的实现

有限域上的多项式乘法器是实现ECC底层运算的关键模块。本文基于Karatsuba-Offman提出的分治思想来简化两个多精度操作数的模乘。通过反复调用一个乘法器进行模乘并将结果逐次累加,减少了单精度操作数乘法的次数,从而降低了运算的复杂度。实验结果显示,这种方法在增加一定路径延时的代价下获得更小的芯片面积和功耗。设计原型改进后适用于无线局域网等要求低功耗、小面积的安全设备中。     

Only connect: teaching, technology and telesis

Abstract This paper describes an approach to the design of interactive multimedia materials being developed in a European Community project. The developmental process is seen as a dialogue between technologists and teachers. This dialogue is often problematic because of the differences in training, experience and culture between them. Conditions needed for fruitful dialogue are described and the generic model for learning design used in the project is explained.     

European Community policy and the market

Abstract This paper starts with some reflections on the policy considerations and priorities which are shaping European Commission (EC) research programmes. Then it attempts to position the current projects which seek to capitalise on information and communications technologies for learning in relation to these priorities and the apparent realities of the marketplace. It concludes that while there are grounds to be optimistic about the contribution EC programmes can make to the efficiency and standard of education and training, they are still too technology driven.     

一种自适应子融合集成多分类器方法

融合集成方法已经广泛应用在模式识别领域,然而一些基分类器实时性能稳定性较差,导致多分类器融合性能差,针对上述问题本文提出了一种新的基于多分类器的子融合集成分类器系统。该方法考虑在度量层融合层次之上通过对各类基多分类器进行动态选择,票数最多的类别作为融合系统中对特征向量识别的类别,构成一种新的自适应子融合集成分类器方法。实验表明,该方法比传统的分类器以及分类融合方法识别准确率明显更高,具有更好的鲁棒性。     

Avoiding semantic and temporal gaps in developing software intensive systems

Development of software intensive systems (systems) in practice involves a series of self-contained phases for the lifecycle of a system. Semantic and temporal gaps, which occur among phases and among developer disciplines within and across phases, hinder the ongoing development of a system because of the interdependencies among phases and among disciplines. Such gaps are magnified among systems that are developed at different times by different development teams, which may limit reuse of artifacts of systems development and interoperability among the systems. This article discusses such gaps and a systems development process for avoiding them.     

Designing economic np control charts: A programmed simulation approach

This paper presents control charts models and the necessary simulation software for the location of economic values of the control parameters. The simulation program is written in FORTRAN, requires only 10K of main storage, and can run on most mini and micro computers. Two models are presented - one describes the process when it is operating at full capacity and the other when the process is operating under capacity. The models allow the product quality to deteriorate to a further level before an existing out-of-control state is detected, and they can also be used in situations where no prior knowledge exists of the out-of-control causes and the resulting proportion defectives.     

The development of robot art

Going through a few examples of robot artists who are recognized worldwide, we try to analyze the deepest meaning of what is called “robot art” and the related art field definition. We also try to highlight its well-marked borders, such as kinetic sculptures, kinetic art, cyber art, and cyberpunk. A brief excursion into the importance of the context, the message, and its semiotics is also provided, case by case, together with a few hints on the history of this discipline in the light of an artistic perspective. Therefore, the aim of this article is to try to summarize the main characteristics that might classify robot art as a unique and innovative discipline, and to track down some of the principles by which a robotic artifact can or cannot be considered an art piece in terms of social, cultural, and strictly artistic interest. This work was presented in part at the 13th International Symposium on Artificial Life and Robotics, Oita, Japan, January 31–February 2, 2008     

Explanation and prediction: an architecture for default and abductive reasoning

Although there are many arguments that logic is an appropriate tool for artificial intelligence, there has been a perceived problem with the monotonicity of classical logic. This paper elaborates on the idea that reasoning should be viewed as theory formation where logic tells us the consequences of our assumptions. The two activities of predicting what is expected to be true and explaining observations are considered in a simple theory formation framework. Properties of each activity are discussed, along with a number of proposals as to what should be predicted or accepted as reasonable explanations. An architecture is proposed to combine explanation and prediction into one coherent framework. Algorithms used to implement the system as well as examples from a running implementation are given.     

Three Process Perspectives: Organizations, Teams, and People

This paper provides the author's personal views and perspectives on software process improvement. Starting with his first work on technology assessment in IBM over 20 years ago, Watts Humphrey describes the process improvement work he has been directly involved in. This includes the development of the early process assessment methods, the original design of the CMM, and the introduction of the Personal Software Process (PSP)^SM and Team Software Process (TSP){^SM}. In addition to describing the original motivation for this work, the author also reviews many of the problems he and his associates encountered and why they solved them the way they did. He also comments on the outstanding issues and likely directions for future work. Finally, this work has built on the experiences and contributions of many people. Mr. Humphrey only describes work that he was personally involved in and he names many of the key contributors. However, so many people have been involved in this work that a full list of the important participants would be impractical.     

基于复小波噪声方差显著修正的SAR图像去噪

提出了一种基于复小波域统计建模与噪声方差估计显著性修正相结合的合成孔径雷达(Synthetic Aperture Radar,SAR)图像斑点噪声滤波方法。该方法首先通过对数变换将乘性噪声模型转化为加性噪声模型,然后对变换后的图像进行双树复小波变换(Dualtree Complex Wavelet Transform,DCWT),并对复数小波系数的统计分布进行建模。在此先验分布的基础上,通过运用贝叶斯估计方法从含噪系数中恢复原始系数,达到滤除噪声的目的。实验结果表明该方法在去除噪声的同时保留了图像的细节信息,取得了很好的降噪效果。     

How do children do mathematics with LOGO?

Abstract  This paper considers some results of a study designed to investigate the kinds of mathematical activity undertaken by children (aged between 8 and 11) as they learned to program in LOGO. A model of learning modes is proposed, which attempts to describe the ways in which children used and acquired understanding of the programming/mathematical concepts involved. The remainder of the paper is concerned with discussing the validity and limitations of the model, and its implications for further research and curriculum development.