Reliability Challenges for CMOS Technology Qualifications With Hafnium Oxide/Titanium Nitride Gate Stacks

It has been demonstrated that the introduction of $hbox{HfO}_{2}/ hbox{TiN}$ gate stacks into CMOS technologies provides the means to continue with traditional device gate length scaling. However, the introduction of $hbox{HfO}_{2}$ as a new gate dielectric and TiN as a metallic gate electrode into the gate stack of FETs brings about new challenges for understanding reliability physics and qualification. This contribution summarizes recent advances in the understanding of charge trapping and defect generation in $hbox{HfO}_{2}/ hbox{TiN}$ gate stacks. This paper relates the electrical properties to the chemical/physical properties of the high-$varepsilon$ dielectric and discusses test procedures specifically tailored to quantify gate stack reliability of $ hbox{HfO}_{2}/hbox{TiN}$ gate stacks.      

Active High Power Conversion Efficiency Rectifier With Built-In Dual-Mode Back Telemetry in Standard CMOS Technology

In this paper, we present an active rectifier with high power conversion efficiency (PCE) implemented in a 0.5-$mu{hbox {m}}$ 5 V standard CMOS technology with two modes of built-in back telemetry; short- and open-circuit. As a rectifier, it ensures a ${rm PCE}>80%$, taking advantage of active synchronous rectification technique in the frequency range of 0.125–1 MHz. The built-in complementary back telemetry feature can be utilized in implantable microelectronic devices (IMD), wireless sensors, and radio frequency identification (RFID) applications to reduce the silicon area, increase the data rate, and improve the reading range and robustness in load shift keying (LSK).      

LCL滤波并网逆变器的控制策略

把LCL滤波器作为电压源型并网逆变器与电网的接口已受到广泛关注。与单电感L滤波器相比,利用电感值较小的LCL滤波器对入网电流的高次谐波具有显著的衰减效果,特别是在低开关频率的大功率并网逆变系统应用中更具明显优势,但是仅采用直接入网电流控制时,LCL滤波器接口的并网逆变器系统存在稳定性问题。该文采用电网侧电感电流和逆变侧电感电流双闭环控制策略对并网电流进行直接控制,电网侧电感电流作为外环更容易抑制并网电流的谐波因素,且可以直接控制入网电流的单位功率因数,采用逆变器侧电感电流作为内环可以增加系统阻尼,从而可抑制系统振荡,增加系统稳定性。对该方案进行系统建模,并深入分析了滤波器参数、控制器参数及系统稳定性之间的精确量化关系。仿真和实验结果表明,该控制策略既可有效抑制入网电流谐振和实现进网电流的高功率因数运行,同时又具有良好的稳态和动态性能。     

GaN-Based Power LEDs With CMOS ESD Protection Circuits

A power light-emitting diode (LED) module has been successfully designed and demonstrated by combining GaN-based power LEDs with CMOS electrostatic discharge (ESD) protection circuits through a flip-chip process. It was found that we could enhance the power LED output intensity by 20% by using the flip-chip technology. Lifetimes of flip-chip power LEDs were also found to be better. It was also found that the use of CMOS ESD protection circuits did not degrade the output intensity and lifetime of flip-chip power LEDs. Furthermore, it was found that we could not only significantly enhance the reverse ESD characteristics but could also enhance the positive ESD characteristics of nitride-based LEDs by using the CMOS ESD protection circuits.     

Adaptive Compensation of Reactive Power With Shunt Active Power Filters

This paper describes an adaptive method for compensating the reactive power with an active power filter (APF), which is initially rated for mitigation of only the harmonic currents given by a nonlinear industrial load. It is proven that, if the harmonic currents do not load the APF at the rated power, the available power can be used to provide a part of the required reactive power. Different indicators for designing such application are given, and it is proven that the proposed adaptive algorithm represents an added value to the APF. The algorithm is practically validated on a laboratory setup with a 7-kVA APF.     

具有双级LC滤波器的恒功率负载系统在大扰动下的稳定性

现代军用多电飞机270V直流供电系统中的功率电子负载和电动机负载不断增加,这种负载因内部闭环控制而呈现恒功率的特性,即呈现出负阻抗特性,该特性与滤波元件间的相互作用会严重危害系统的稳定性。研究具有双级LC滤波器的恒功率负载系统的稳定性,建立基于混合势函数理论的数学模型,推导得到系统在大扰动条件下的稳定性判据。该判据是在考虑恒功率负载负阻抗大小的基础上,给出了滤波器元件参数的约束条件。分析及实验结果表明,该判据能够保障系统在大扰动下的稳定性,且结构简单,便于应用。     

Polarization-Analyzing CMOS Image Sensor With Monolithically Embedded Polarizer for Microchemistry Systems

This paper proposes and demonstrates a polarization-analyzing CMOS sensor based on image sensor architecture. The sensor was designed targeting applications for chiral analysis in a microchemistry system. The sensor features a monolithically embedded polarizer. Embedded polarizers with different angles were implemented to realize a real-time absolute measurement of the incident polarization angle. Although the pixel-level performance was confirmed to be limited, estimation schemes based on the variation of the polarizer angle provided a promising performance for real-time polarization measurements. An estimation scheme using 180 pixels in a 1deg step provided an estimation accuracy of 0.04deg. Polarimetric measurements of chiral solutions were also successfully performed to demonstrate the applicability of the sensor to optical chiral analysis.     

时间校正滤波器的现场可编程门阵列实现技术

研究了用于软件无线电系统中的时间校正滤波器组的实现原理,给出了FIR滤波器分布式算法（DA）的串并行结构,分析了各种结构形式的优缺点,在此基础上提出了串并混合分布式（Mixed-DA）算法结构,给出了DA算法结构的现场可编程门阵列实现技术过程和结果。     

三相四线制非线性负载并联电力有源滤波器的研究

针对采用四桥臂变流器的三相四线制电力有源滤波器,建立了三相四线制并联型有源滤波器的数学模型,在此基础上采用改进的ip、iq检测电路,以及三角波载波触发电路设计了一种三相四线制有源滤波器。对其做了MATLAB仿真分析,仿真结果表明该三相四线制有源滤波器具有很好的谐波抑制性能。     

新型整流变压器及其滤波系统的运行参数特性分析

新型整流变压器及其滤波系统由网侧、阀侧绕组,独立滤波绕组及与之相连的滤波器组构成,其特殊的滤波支路能够在滤波和无功补偿的同时改善变压器的运行特性。首先推导以谐波抑制因子为表达方式的谐波电流抑制模型以考察谐波传递情况;然后构建网侧绕组电流和负载电流之间的数学关系,藉此研究无功补偿特性,并分析相关的运行参数;之后建立阀侧电压与网侧电压的数学关系,以研究滤波器对阀侧电压的影响。理论分析表明,新型整流变压器及其滤波系统可以有效抑制谐波,降低网侧电流和视在功率,提高网侧功率因数并增加负载电压。实际应用在工业直流供电系统中的新型整流变压器的现场实测结果,验证了理论分析的正确性。该文更全面地揭示了新型整流变压器能改善整流系统的运行特性,所推导的数学模型将为新型整流变压器在降噪节能等方面的进一步研究提供理论依据。     

Spectral Properties of Active Racetrack Semiconductor Structures With Intracavity Reflections

The effects of intracavity reflections in active racetrack semiconductor resonator structures are studied. The incorporation of active material facilitates probing into effects stemming from even minute reflections, such as mode mismatching, which are almost undetectable in passive structures. The spectral response of these structures are studied by the transfer matrix method that models the racetrack resonator as a multicavity structure formed by the various optical paths induced by intracavity reflections. The signature of the structural and operational parameters on the spectral response enables the identification of the conditions for the appearance of interesting spectral properties such as mode splitting and Fano resonances.     

基于交流侧LC滤波的近正弦输入电流三相整流器

基于交流侧LC滤波的三相整流器尽管由来已久,但对其原理和特性并没有深入、准确地研究,且缺乏有效的设计方法.根据交流侧电容充电完成时刻的不同,将该整流器分为小、中和大负载电流三种工作模式,详细阐述了其在小负载电流模式下的工作原理;基于拓扑演变论证了该整流器和典型近正弦三相整流器的关联性;此外,提出了一种实用的参数优化设计方案并探讨了该整流器的工作特性,实现了不同模式下输入电流近正弦且与输入电压同相的目的.最后通过三台小功率(250W)样机验证了分析的正确性和设计的可行性.     

NiSi Polysilicon Fuse Reliability in 65-nm Logic CMOS Technology

The programming characteristics and reliability of NiSi polysilicon fuse fabricated using 65-nm logic complimentary metal-oxide-semiconductor technology were studied. Under optimal programming conditions, high postprogram resistance can be achieved. These well-programmed fuses showed good data retention under unbiased temperature stress test. In order to avoid read disturb of unprogrammed fuses, the read current has to be kept below the threshold for silicide electromigration.     

A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection

A micro-power CMOS front-end, consisting of a transimpedance amplifier (TIA) and an ultralow cutoff frequency lowpass filter for the acquisition of photoplethysmographic signal (PPG) is presented. Robust dc photocurrent rejection for the pulsed signal source is achieved through a sample-and-hold stage in the feed-forward signal path and an error amplifier in the feedback path. Ultra-low cutoff frequency of the filter is achieved with a proposed technique that incorporates a pair of current-steering transistors that increases the effective filter capacitance. The design was realized in a 0.35-$mu{hbox {m}}$ CMOS technology. It consumes 600 $mu {hbox {W}}$ at 2.5 V, rejects dc photocurrent ranged from 100 nA to 53.6 $mu{hbox {A}}$, and achieves lower-band and upper-band ${-{hbox { 3-dB}}}$ cutoff frequencies of 0.46 and 2.8 Hz, respectively.      

A Single Photon Avalanche Diode Implemented in 130-nm CMOS Technology

We report on the first implementation of a single photon avalanche diode (SPAD) in 130 nm complementary metal-oxide-semiconductor (CMOS) technology. The SPAD is fabricated as p+/n-well junction with octagonal shape. A guard ring of p-well around the p+ anode is used to prevent premature discharge. To investigate the dynamics of the new device, both active and passive quenching methods have been used. Single photon detection is achieved by sensing the avalanche using a fast comparator. The SPAD exhibits a maximum photon detection probability of 41% and a typical dark count rate of 100 kHz at room temperature. Thanks to its timing resolution of 144 ps full-width at half-maximum (FWHM), the SPAD has several uses in disparate disciplines, including medical imaging, 3D vision, biophotonics, low-light illumination imaging, etc.     

新工艺制备AgZnO电接触材料的组织与性能研究

采用气体雾化-烧结内氧化-热锻(atomization-internal oxidation-foring,缩写为AIOF)工艺制备AgZnO触头材料。用X射线衍射、金相显微镜和扫描电镜等研究了气体雾化法制备AgZn合金粉的粒度、形貌及成分,分析了AIOF工艺制备的AgZnO触头材料的相组成、显微组织和物理性能,并探讨了AgZn合金粉末压坯烧结内氧化的过程。结果表明:气体雾化法制备的AgZn合金粉末中,粒度小于125μm的粉末占总量的82%,颗粒多数为不规则形状;AIOF工艺制备的AgZnO材料组织均匀,电阻率为1.87μΩ.cm,相对密度为98%,硬度HV为102.8,其性能优于传统粉末冶金法制备的材料。AgZn合金粉末压坯烧结内氧化开始在粉末颗粒边界进行,然后逐渐深入颗粒内的晶界和晶粒内部,且ZnO的长大也首先发生在颗粒边界,因此颗粒边界上的ZnO比较粗。     

力科公司推出具备X-Stream技术的串行数据分析仪实时分析复杂而高速的数据

力科公司推出三个型号的串行数据分析仪,分别为SDA6000,SDA5000及SDA3000。SDA6000及SDA5000分别具有6GHz带宽,75ps上升时间及5GHz带宽,90ps上升时间,可测试高达2.7Gb/s的数据,而SDA3000则具备3GHz带宽及150ps上升时间,可测试高达1.25Gb/s的数据。三款产品以数字示波器作为硬件平台,配合创新的软件,以全新的手段,对高速的串行数据作实时测量,使结果更精确及可靠。SDA产品适     

双混沌SVPWM技术及其功率谱密度特性分析

针对单个混沌映射存在有限数字精度导致混沌序列退化的问题,提出了一种新的复合混沌序列,将tent映射和Logistic映射联立,通过交错变化参数,使混沌序列出现周期性的概率变得极小,并且容易实现。混沌调制通常是随机改变载波周期的大小,提出了双混沌调制,在变化载波周期的同时随机改变脉冲的位置。通过计算得到了双混沌输出脉冲的功率谱密度,并用仿真和实验进行了验证。仿真和实验均表明,双混沌调制在消减峰值以及遣散能量谱的性能上,明显好于单混沌调制,因此可以更好的抑制系统的电磁干扰,是解决逆变器EMI问题的一种新的有效途径。     

Compact Modeling and Simulation of Circuit Reliability for 65-nm CMOS Technology

Negative bias temperature instability (NBTI) and channel hot carrier (CHC) are the leading reliability concerns for nanoscale transistors. The de facto modeling method to analyze CHC is based on substrate current I_sub, which becomes increasingly problematic with technology scaling as various leakage components dominate I_sub. In this paper, we present a unified approach that directly predicts the change of key transistor parameters under various process and design conditions for both NBTI and CHC effects. Using the general reaction-diffusion model and the concept of surface potential, the proposed method continuously captures the performance degradation across subthreshold and strong inversion regions. Models are comprehensively verified with an industrial 65-nm technology. By benchmarking the prediction of circuit performance degradation with the measured ring oscillator data and simulations of an amplifier, we demonstrate that the proposed method very well predicts the degradation. For 65-nm technology, NBTI is the dominant reliability concern, and the impact of CHC on circuit performance is relatively small.     

A Retinal Prosthesis Technology Based on CMOS Microelectronics and Microwire Glass Electrodes

A very large format neural stimulator device, to be used in future retinal prosthesis experiments, has been designed, fabricated, and tested. The device was designed to be positioned against a human retina for short periods in an operating room environment. Demonstrating a very large format, parallel interface between a 2-D microelectronic stimulator array and neural tissue would be an important step in proving the feasibility of high resolution retinal prosthesis for the blind. The architecture of the test device combines several novel components, including microwire glass, a microelectronic multiplexer, and a microcable connector. The array format is 80 times 40 array pixels with approximately 20 microwire electrodes per pixel. The custom assembly techniques involve indium bump bonding, ribbon bonding, and encapsulation. The design, fabrication, and testing of the device has resolved several important issues regarding the feasibility of high-resolution retinal prosthesis, namely, that the combination of conventional CMOS electronics and microwire glass provides a viable approach for a high resolution retinal prosthesis device. Temperature change from power dissipation within the device and maximum electrical output current levels suggest that the device is acceptable for acute human tests