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系统芯片 IDDQ 可测试设计规则和方法 总被引:1,自引:0,他引:1
目的:为了使IDDQ测试方法对SOC(系统芯片)IC能继续适用,必须实现SOCIDDQ的可测试性设计,解决因SOC设计的规模增大引起漏电升高的问题。方法:传统的电路分块测试方法存在需要增加引腿代价,因此是不实际的,本文提出了一种通过JTAG边界扫找控制各个内核电源的SOCIDDQ可测试设计方法。结论:实验表明该设计不要求专门的控制引腿,硬件代价是可忽略的,结论:本文提出的方法可有效地用于系统芯片的IDDQ测试。 相似文献
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多信号流图的测试性建模与分析 总被引:3,自引:1,他引:3
随着测试性设计技术的广泛应用,测试性建模与分析技术日益受判产品设计人员的关注。本文介绍了多信号流图建模方法,并以某飞行器配电器为例,运用多信号流图进行建模分析。在模型分析的基础上,对某飞行器配电器的可测试性进行评价。结果表明,多信号流图测试性建模方法在产品的可测试性设计应用中可行、有效。 相似文献
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为解决复杂环境下电源设计繁杂的问题并更好地满足对直流电源的应用需求,提出一种直流可调稳压电源设计方案.本文从该电源的电路原理图出发,分别对电路结构中的变压器降压、单相桥式整流、大电容滤波、LM317稳压的基本原理加以阐述,并结合客观情况给出了电路元件的选择.同时使用软件Multisim进行仿真测试,并根据仿真结果进行了... 相似文献
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使用VHDL语言在Quartus Ⅱ软件平台下实现了对交通灯控制器的设计仿真,并通过Cyclone系列EP1C12Q240C8(QuickSOPC开发板)器件下载模拟实现。教学中在实验室采用EDA技术即可完成较复杂数字电路系统的设计仿真,体现EDA教学的优越性。 相似文献
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现代数字集成电路技术的飞速发展,对计算机辅助测试提出更多更高的要求,可满足性方法(SAT-Satisfiability)作为一种有效的完备测试生成方法,近年来在集成电路测试领域引起广泛的研究兴趣,并取得了一些应用上的成功.对电子数字电路的SAT可满足性算法进行研究,希望能够有助于提升我们对相关问题的认识,以有助于数字电路测试的不断发展和进步. 相似文献
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分体式空调室外机内的配管设计的好坏直接影响到外机的振动和噪声大小,空调管路设计系统由设计分析和实验测试两个子系统组成,设计分析系统基于CAD/CAE集成软件I-deas建立,在进行管路的三维造型的基础上,进行管路系统的固有频率、振动响应及振动应力仿真计算,以确定样机制作方案.在测试系统实验验证的基础上,最终确定空调管路的优化设计方案.空调管路设计系统为企业提供了一基于三维数字化模型的产品开发设计平台,提高了企业的设计手段和设计方法,缩短了产品的开发周期. 相似文献
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张银桥 《中国新技术新产品》2014,(16):79-79
传统的柴油发动机热试工艺设备投资大、试验费用高、试验时间长,因此柴油发动机冷试工艺越来越受到重视,本文主要论述了柴油发动机冷试中的动力驱动及扭矩参数测试的一套设计方案。 相似文献
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Spalding G.R. Jr. VanPeteghem P.M. 《IEEE transactions on instrumentation and measurement》1990,39(6):881-885
A systematic approach to analog design-for-testability is presented. This approach uses behavioral models for fault simulation so that objective comparisons can be made between alternative test configurations. Design tradeoffs involved in circuit positioning are discussed. Its suitability for use with application-specific integrated circuit (ASIC) design strategies is demonstrated. This technique is especially well suited to an ASIC environment because the models can be reused and combined to form a library. The fault models should improve with time as more data is collected for a given block. The behavioral models can also be used to decide what specifications a block will need to function properly in a given system, which is very useful in the design phase for determining how well blocks will fit together or how much linearity or signal swing a given block will need to achieve a certain high-level system specification 相似文献
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Using predeveloped software, a digital safety system is designed that meets the quality standards of a safety system. To demonstrate the quality, the design process and operating history of the product are reviewed along with configuration management practices. The application software of the safety system is developed in accordance with the planned life cycle. Testing, which is a major phase that takes a significant time in the overall life cycle, can be optimized if the testability of the software can be evaluated. The proposed testability measure of the software is based on the entropy of the importance of basic statements and the failure probability from a software fault tree. To calculate testability, a fault tree is used in the analysis of a source code. With a quantitative measure of testability, testing can be optimized. The proposed testability can also be used to demonstrate whether the test cases based on uniform partitions, such as branch coverage criteria, result in homogeneous partitions that is known to be more effective than random testing. In this paper, the testability measure is calculated for the modules of a nuclear power plant's safety software. The module testing with branch coverage criteria required fewer test cases if the module has higher testability. The result shows that the testability measure can be used to evaluate whether partitions have homogeneous characteristics. 相似文献
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设计一种基于斜波式发生器原理可编程数字控制精密延时电路,用恒流源电路充放电和18位的DA转换器分别接入高速比较器的两端,DA转换器预先设定一电压基准,恒流源充电电容达到电压基准,高速比较器开始反转,形成一个触发脉冲信号,然后充电电容通过高速二极管快速放电重新计时。设计成18bit数字控制可编程动态范围2ps的采集时间间隔,提高采集信号的精度和频率。 相似文献
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基于Pspice仿真的数模混合电路故障诊断方法研究 总被引:4,自引:0,他引:4
本文研究了利用Pspice仿真软件进行数模混合电路故障诊断的方法 ,设计了虚拟测试设备以实现对电子线路的测试与诊断 ,并结合一七彩灯控制电路 ,详细说明了故障诊断的具体方法和步骤 ,为电路测试与诊断提供一些新的思路。 相似文献
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Buonanno G. Lombardi F. Sciuto D. Shen Y.-N. 《IEEE transactions on instrumentation and measurement》1991,40(4):703-708
The design of easily testable CMOS combinational circuits is discussed. Two CMOS structured design techniques are presented. The novelty of this approach is the complete fault detection of single- and multiple-line stuck-at, transistor stuck-open, and stuck-on faults for combinational circuits. The test algorithm requires only minimal modifications to detect a large number of bridging faults. These techniques are both based on the addition of two transistors, a P-FET and an N-FET, which are placed in series between the P and N sections. In the first case (dynamic fully CMOS, DFCMOS), the transistors are controlled by a single input; in the other case (testable fully CMOS, TFCMOS), there is one input for each additional transistor. The test procedure is presented, and it is shown that multiple fault detection can be easily achieved 相似文献
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Carlos M. B. A. Correia JosCarlos Martins 《Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment》1990,290(2-3):445-449
A 12-bit analog-to-digital converter (ADC) circuit for nuclear spectroscopy applications was developed using a digital signal processor (DSP) as the central processing element.
The DSP runs a program that builds the distribution function of data collected by the ADC (the multichannel analyzer algorithm) and simultaneously corrects the ADC differential nonlinearity (DNL) by the sliding scale method. The acquisition routine runs in 4 μs.
The conversion time, when the faster versions of the ADC are used, is well below 10 μs. The resulting DNL is better than 0.4% and the integral nonlinearity <0.002%. 相似文献
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轨道不平顺检测中数字补偿滤波器的设计及仿真 总被引:1,自引:0,他引:1
轨道不平顺是影响列车安全舒适的主要因素,轨检车可实时准确的检测出轨道不平顺状态;但车速的变化会使传感器信号发生畸变和衰减,使分析数据失真。为了消除车速的影响,分析了轨检系统中数字补偿滤波器的理论及设计方法,最后进行了CCS5000仿真验证。结果表明,数字补偿滤波器能够消除前端有用信号的衰减,且可达到较高的精度。 相似文献