通信电路LSI／VLSI发展的新领域

本文介绍了通信技术和通信电路的发展情况,论述了通信技术和通信电路与通信LSI/VLSI发展的密切关系以及通信电路技术的特点;并通过实例说明通信LSI/VLSI中典型的电路和技术。     

LSI/VLSI的任意元胞K行安置的算法

本文提出一种适用于LSI/VLSI任意元胞布局的K行安置的算法。当矩形单元的拓朴位置确定后,每个单元有横放、竖放两个态共有2n个态。在K行安置时,从这2n个态中选出包络矩形面积最小的问题,可归结为求n个态中的包络矩形面积最小,所以是很有效的算法。可以和结群法混合使用;在一定条件下,还可以直接用于准BBL布局。     

群法及其在LSI/VLSI自动布图设计中的应用

本文系统、深入地研究了LSI/VLSI自动布图设计中的群法问题.引入了一系列新的概念:如稳定群、稳定群的级、绝对封闭群等.得出并证明了稳定群的一些重要性质.本文认为,历史上群法中一种非常重要的评价参量,群强度,是不可靠的,并成功地用稳定群代替.用本群法得到的结果与历史上典型群法得到的结果进行比较,结论是非常令人满意的.     

LSI／VLSI布线的退火模拟算法的研究与实现

本文研究并提出了优化程度较高的退火模拟门阵列总体布线及平行通道区布线算法。算法已用FORTRAN语言实现并作为自动布图系统的组成部分成功地运行在Dual83/20微机上。     

LSI展示下一代0.25微米CMOS工艺

LSI公司近期在纽约召开的Goldman Sachs & Co.技术会议上向分析家们提前展示了其将于1998年推出的下一代CMOS工艺G11。它采用0.25微米单元结构,具有混合采用性能优化单元和面积优化单元的能力,并且采用层次化的金属布线结构以适应下一代的综合工具,因此这套工艺具有一些特别优秀的内在特     

VLSI低功耗技术研究

功耗已成为超大规模集成电路所面临的最大技术挑战之一.这就需要在不断满足设计要求的同时,不断提出新的方法来降低功耗.文章首先概述了VLSI的功耗问题,进而提出了VLSI功耗的来源,最后提出了降低CMOS集成电路功耗的技术与方法.     

An algorithm ofk-line location for BBL in LSI/VLSI

In this paper, aK-line location algorithm for building block cells in LSI/VLSI is presented. When the relative positions of rectangular cells are given, there are 2 states according to the two orientations of a cell. It is proved that to find the optimum solution from the 2^N states can be reduced to calculate theN states inK-line algorithm. So the algorithm is shown very effective and can be used with association for cluster method in BBL placement. Under certain conditions, this method can also be used to pesudo BBL placement directly.     

AN ALGORITHM OF K-LINE LOCATION FOR BBL IN LSI/VLSI

In this paper,a K-line location algorithm for building block cells in LSI/VLSI ispresented.When the relative positions of rectangular cells are given,there are 2 states accordingto the two orientations of a cell.It is proved that to find the optimum solution from the 2~N statescan be reduced to calculate the N states in K-line algorithm.So the algorithm is shown veryeffective and can be used with association for cluster method in BBL placement.Under certainconditions,this method can also be used to pesudo BBL placement directly.     

RS码译码器综述

ＲＳ码是差错控制领域中一类重要的线性分组码，由于具有很强的纠随机错和突发错的能力，被广泛应用于各种差错控制系统中，本文从ＲＳ译码算法，ＲＳ译码器的ＶＬＳＩ结构和ＲＳ码系统性能三方面论述了ＲＳ译码器的发展现状，并展望了译码器的未来发展方向。     

低功耗CMOS逻辑电路设计综述

分析了ＣＭＯＳ逻辑电路的功耗来源从降低电源电压、减 上负载电容和逻辑电路开关活动几率等方面论述了降国耗的途径。讨论了深亚微米器件中亚同值电流对功耗的影响以及减小亚阈值电流的措施,最后分析了高层次设计对降低功耗的关键作用,说明低功耗设计必须从设计的各个层次加在考虑,实现整体优化设计。     

An inorganic resist technology and its applications to LSI fabrication processes

An Ag/Se-Ge inorganic resist technology is applied to photolithographic processes in LSI fabrication. This paper describes exposure latitude, RIE characteristics, resist fabrication and exposure throughputs, pattern alignment, defocus tolerances and fabrication yields of Al interconnection.Lateral Ag diffusion does not effectively improve the exposure tolerance. The technology exhibits good compatibility with other equipment and technologies, offering satisfactory throughput. Excellent accuracy in pattern alignment is obtained owing to dry-deposition fabrication and the suitable optical properties of the Se-Ge inorganic film, which result in regulated and distinct alignment signals. Defocus tolerance in the resist is larger than that of polymer resist by 2 ∽ 3 μm in the submicron pattern. Al interconnections using this resist demonstrate a short-circuit failure rate of less than 1% and small variation in linewidth having a standard deviation of σ_w = 0.08 μm.In practical processes, the significant advantages of this resist are its bilayer resist structure (doped Ag-Se-Ge and underlying Se-Ge) and its dry deposition, very thin, favorable optical characteristics.     

FPGA器件设计技术发展综述

现场可编程门阵列(Field Programmable Gate Array,FPGA)作为一种可编程逻辑器件,在短短二十多年里从电子设计的外围器件逐渐演变为数字系统的核心,在计算机硬件、通信、航空航天和汽车电子等诸多领域有着广泛的应用。伴随着半导体工艺技术的进步,FPGA器件的设计技术取得了飞跃性突破。该文在回顾FPGA发展历史的同时,对目前主流FPGA器件的前沿技术进行总结,并对新一代FPGA的发展前景进行展望。     

微纳米CMOS VLSI电路可靠性仿真与设计

介绍了CMOS VLSI的可靠性建模和仿真技术的发展历史、相应的仿真工具、失效机理等效电路和算法,重点总结了当前最新的CMOS超大规模集成电路可靠性建模仿真技术,为促进我国集成电路可靠性设计水平起到积极的作用。