A 630-mS/mm GaAs MESFET with Au/WSiN refractory metal gate

GaAs MESFET's with a gate length as low as 0.2 μm have been successfully fabricated with Au/WSiN refractory metal gate n⁺-self-aligned ion-implantation technology. A very thin channel layer with high carrier concentration was realized with 10-keV ion implantation of Si and rapid thermal annealing. Low-energy implantation of the n⁺-contact regions was examined to reduce substrate leakage current. The 0.2-μm gate-length devices exhibited a maximum transconductance of 630 mS/mm and an intrinsic transconductance of 920 mS/mm at a threshold voltage of -0.14 V     

Extremely low-noise performance of GaAs MESFETs with wide-headT-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L_h) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f_T) and a maximum stable gain (MSG) decrease monotonously as L_h increases on account of parasitic capacitance. However, the device with L_h of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's     

Bias dependence of low-frequency gate current noise in GaAs MESFETs

The spectra of gate current noise are investigated in GaAs MESFETs between 10/sup 2/ and 10/sup 4/ Hz. A change in the white-noise behaviour is observed with the increase of the gate current. It is shown that the contribution of an ideal Schottky shot noise is associated with two thermal noise components. The thermal noise sources originate in different leakage conductances.<>     

Temperature dependent study of the microwave performance of0.25-μm gate GaAs MESFETs and GaAs pseudomorphic HEMTs

We report on the noise figure, associated gain, and the current gain cutoff frequency for comparable 0.25-μm gate GaAs MESFETs and GaAs pseudomorphic HEMTs (p-HEMTs) as a function of cryogenic temperature. Contrary to previously published results which suggest that p-HEMTs should have a higher electron velocity and a lower noise figure than MESFETs due to the effects of the two-dimension electron gas (2-DEG), we have experimentally verified that this is not the case. We show clear evidence that the transport properties of the 2-DEG in p-HEMTs do not make a significant contribution to the speed enhancement and noise reduction during high-frequency operation of these devices. It is the fundamental InGaAs material properties, specifically the Γ-L valley separation in the conduction band and associated effective mass of the electron in either GaAs or InGaAs channel, which limits the high-field electron velocity and thus the speed and noise performance of the devices     

Ultra low noise characteristics of AlGaAs/InGaAs/GaAs pseudomorphicHEMT's with wide head T-shaped gate

The fully passivated low noise AlGaAs/InGaAs/GaAs pseudomorphic (PM) HEMT with 0.13 μm T-shaped gate was fabricated using dose split electron beam lithography method (DSM). This device exhibited low noise figures of 0.31 and 0.45 dB at 12 and 18 GHz, respectively. These noise figures are the lowest value ever reported for the GaAs based HEMT's. These results are attributed to the extremely low gate resistance which results from wide head T-shaped gate having the higher ratio more than 10 of gate head length to gate footprint     

High DC and microwave characteristics of subhalf-micrometre gate ion-implanted GaAs MESFETs using trilayer deep UV lithography

Subhalf-micrometre gate length ion-implanted GaAs MESFETs have been fabricated on 3 inch diameter substrates using trilayer deep UV lithography. Implanted MESFETs with 0.3 mu m gate lengths exhibit a maximum extrinsic transconductance of 205 mS/mm at a drain current of 600 mA/mm. From S-parameter measurements, a current gain cutoff frequency f/sub t/ of 56 GHz and a maximum available gain cutoff frequency f/sub max/ greater than 90 GHz are achieved. The gate-to-drain diode characteristics of the devices show a sharp breakdown voltage of 13-15 V. The high drain current-drain voltage and microwave characteristics indicate that ion-implanted technology with trilayer deep UV lithography has potential for the manufacture of power devices and amplifiers for Q-band communication applications. This is the first reported result using trilayer deep UV lithography to demonstrate both f/sub t/ over 56 GHz and 13-15 V gate-to-drain breakdown on 0.3 mu m gate-length ion-implanted GaAs MESFETs.<>     

Performance analysis of sub-micron gate GaAs MESFETs

A novel 2-D numerical model incorporating nonstationary electron dynamics is used to investigate the complex transport phenomena governing the operation of sub-micron gate GaAs MESFET's. A detailed theoretical analysis of different phenomena observed in subhalf micron devices is given. These include velocity overshoot, stationary and travelling domain formation, soft pinch off, excess drain current etc. The small signal parameters g_m, g_d and C_gs and their dependence on bias condition are evaluated. The effects of physical quantities such as mobility and interface barrier on carrier injection and transport and consequently on device performance are presented.     

Modeling of the gate junction in GaAs MESFETs

A low-signal equivalent circuit of a GaAs MESFET is suggested. In this circuit, the gate junction is represented so that a potential variation along the channel can be taken into account. A relationship between the gate current and the gate-source and drain-source voltages is found     

Power gain and noise of InP and GaAs insulated gate microwave FETs

LPE GaAs and InP n-channel depletion mode insulated gate field effect transistors (MISFETs) having 4 μm gate lengths have been fabricated employing pyrolytic Si_xO_yN_z, pyrolytic SiO₂ and an anodic dielectric for gate insulation.The microwave power gain, noise figure, maximum output power and power-added efficiency were measured and compared to those parameters measured on GaAs Schottky barrier gate devices of identical geometry. The results show that, at least at the microwave frequencies measured, power gain and noise are essentially the same in the GaAs Schottky gate FET and anodic MISFET devices while the maximum output power of a typical InP MISFET was greater than that of a representative GaAs Schottky device.     

Calculation of microwave performance of buffer layer gate GaAs MESFET's

The microwave performance of a GaAs MESFET, where a buffer layer of a low carrier concentration is inserted between the gate metal and the channel layer, is calculated and compared with that of a conventional MESFET. It is found that the use of such a high-resistivity buffer layer contributes to a great improvement of the microwave performance of the GaAs MESFET, especially in fTandf_{max}.     

New high power planar gate GaAs MESFETs with improved gate-drainbreakdown voltage

The authors present a new approach to power GaAs MESFETs with planar gate structures, based on the MBE growth technique on an undoped surface GaAs layer on an ion-implanted channel layer. This undoped GaAs layer increases the gate-drain breakdown voltage and serves as both an ideal passivation layer and an ideal annealing cap of ion implanted channels. To realise a good surface condition before MBE growth, the UV-ozone surface treatment is introduced. This new simple structure offers high performance power GaAs MESFETs     

Au/TiN/WSi-gate self-aligned GaAs MESFETs using rapid thermal annealing method

Au/TiN/WSi-gate self-aligned GaAs MESFETs were fabricated using the rapid thermal annealing method to reduce the gate resistance of the FETs. The gate resistance Rg was 4.2 ? (Lg=1.5 ?m, Wg=400 ?m), just 1/20 of that of the WSi-gate FET. The maximum frequency of oscillation fmax of the Au/TiN/WSi-gate FETs was improved to be about twice that of WSi-gate FETs.     

Use of pt gate metallization to reduce gate leakage current in GaAs MESFETs

The use of wet-chemical removal of native oxide in a sealed nitrogen ambient prior to deposition of metal on GaAs is shown to be an effective method of engineering the Schottky barrier height of the metal contacts. Due to its higher metal work function, a barrier height of 0.98 eV for Pt on n-type GaAs is demonstrated. This is considerably higher than the barrier height of conventionally processed TiPtAu contacts (0.78 eV). MES-FETs fabricated using PtAu bilayer contacts show reverse currents an order of magnitude lower than TiPtAu contacted companion devices, higher reverse breakdown voltages and much lower gate leakage. Utilizing this technology of oxide removal and the PtAu bilayer contact provides a much simpler method of enhancing the barrier height on re-type GaAs than other techniques such as counter-doping the near-surface or inserting an interfacial layer.     

Dependence of ionization current on gate bias in GaAs MESFETs

The nonmonotonic behavior of gate current I_g as a function of gate-to-source voltage V_gs is reported for depletion-mode double-implant GaAs MESFETs. Experiments and numerical simulations show that the main contribution to I_g (in the range of drain biases studied) comes from impact-ionization-generated holes collected at the gate electrode, and that the bell shape of the I_g(V_gs) curve is strongly related to the drop of the electric field in the channel of the device as V_gs is moved towards positive values     

High performance ion-implanted low noise GaAs MESFET's

Low noise GaAs MESFET's fabricated by ion-implanting into AsCl3VPE buffer layers have demonstrated not only excellent dc and RF performance, but also a highly reproducible process. The average noise figure and associated gain of four device lots at 12 GHz are 1.6 dB and 10.0 dB, respectively. The standard deviation of noise figure and associated gain from device lot to lot are 0.03 dB and 0.19 dB, respectively. And the standard deviation of noise figure and associated gain from device to device for 35 devices over four lots are 0.13 dB and 0.47dB, respectively. The best device performance includes a 1.25 dB noise figure with 10.46 dB associated gain at 12 GHz for a 0.5 µm × 300 µm FET structure. These results demonstrate the excellent performance and process consistency of ion implanted MESFET's.     

10 GHz bandwidth 20 dB gain low-noise direct-coupled amplifier ICs using Au/WSiN GaAs MESFET

A low-noise direct-coupled amplifier IC with a bandwidth of 10 GHz was developed using a 0.4 mu m gate-length Au/WSiN GaAs MESFET technology. The amplifier achieved a high gain of 20 dB and a minimum noise figure of 3.2 dB with a power consumption of 365 mW.<>     

Degradation mechanism of Ti/Au and Ti/Pd/Au gate metallizations in GaAs MESFET's

Modifications of several dc parameters of GaAs MESFET's induced by accelerated aging at 300 °C have been investigated in a test pattern configuration. Two different gate metallization structures have been examined, namely GaAs/Ti/Au and GaAs/Ti/Pd/Au. The gate diode and the MESFET characteristics of the former degrade noticeably upon annealing, while they are less affected by the thermal treatments for the latter. This different behavior is probably induced by the formation of different compounds at the metal-GaAs interface, which modify the gate diode properties.     

Analytical model of low-frequency diffusion noise in GaAs MESFETs

A simple analytical formula for the low-frequency noise (below 10 kHz) in GaAs MESFETs is derived. This unipolar model describes noise generated in the semi-insulating substrate and involves diffusion, drift, and generation-recombination due to deep-level traps. The derived noise spectrum is diffusion-like and rolls off as f^-3/2 at the high-frequency limit. The results are formally identical to the conventional diffusion/drift noise spectrum except the diffusion/drift constants are replaced by their reduced counterparts. Good qualitative agreement with experiments has been obtained for temperature, length, and field dependences. The derived spectrum can be computed quickly and is suitable for use in circuit simulation of low-frequency performance of MESFETs     

Fully automated on-wafer noise characterization of GaAs MESFETs andHEMTs

A technique is described that permits the rapid determination of all four noise parameters of a MESFET or HEMT at wafer level. The fully automated procedure, which has been implemented in the 2-8 GHz range, uses 16 accurately measured, very repeatable source impedance standards. The standards have been selected for optimum coverage of the input impedance plane to result in stable and rapidly convergent least-squares solutions for the minimum noise figure, optimum source impedance, and noise resistance of practical devices. The resultant system is very stable and produces accurate noise parameters for a wide range of devices     

DC and microwave characteristics of InAlAs/InGaAssingle-quantum-well MODFETs with GaAs gate barriers

The design and performance of In_0.53Ga_0.47As/In_0.52Al_0.48 As modulation-doped field-effect transistors (MODFETs) have been optimized by incorporating a single In_0.53Ga_0.47As quantum-well channel and a thin strained GaAs gate barrier layer. These help to lower the output conductance and gate leakage current of the device, respectively. The DC performance of 1-μm-gate devices is characterized by extrinsic transconductances of 320 mS/mm at 300 K and 450 mS/mm at 77 K and a best value of f_T=35 GHz is derived from S-parameter measurements