Fluxless Bonding of Silicon to Ag–Copper Using In–Ag With Two UBM Designs

A fluxless process of bonding silicon to Ag-cladded copper using electroplated In–Ag multilayer structure is developed. The Ag cladding on the copper substrate is a stress buffer to deal with the large mismatch in coefficient of thermal expansion (CTE) between semiconductors such as Si (3 ${hbox {ppm}}/^{circ}{hbox {C}}$) and Cu (17 ${hbox {ppm}}/^{circ}{hbox {C}}$). To manufacture Ag on copper substrate, two techniques are developed. The first is an electroplating process to fabricate a thick Ag layer. The second technique is a novel laminating process that bonds Ag foil directly on Cu substrate. On Si chips, two underbump metallurgy (UBM) structures are designed, Si/Cr/Au and Si/Cr/Ni/Au. To produce a solder layer, Si chips are electroplated with In followed by thin Ag. The thin Ag cap layer prevents oxidation of the inner In region. To achieve a fluxless feature, the bonding process is performed in a vacuum environment (50 mtorrs) to suppress indium oxidation. Compared to bonding in air, the oxygen content is reduced by a factor of 15 200. Using Cr/Au UBM structure, the silicon chip was detached from Cu substrate. The broken interface lies between Si/Cr and ${hbox {Ag}}_{2}{hbox {In}}$ IMC on Cu substrate. Using a new UBM design of Si/Cr/Ni/Au, high-quality joints are produced that comprise of three distinct layers of ${hbox {In}}_{7}{hbox {Ni}}_{3}$, ${hbox {Ag}}_{2}{hbox {In}}$ , and Ag. Microstructure and composition of the joints are studied using a scanning electron microscope (SEM) with energy dispersive X-ray spectroscopy (EDX).      

An Embrittlement Mechanism of Impact Fracture of Sn–Ag–Cu Solder Joints on BGA Using Electroplated Ni/Au Surface Finishes

The impact toughness evaluation and fracture mechanism analysis in board level of Sn–3mass%Ag–0.5mass%Cu solder joints of ball grid arrays (BGAs) using electrolysis Ni/Au plating were performed. The cause of impact toughness degradation of BGA solder ball joints is the segregation of impurities to the (Cu, Ni)$_{6}$Sn$_{5}$ intermetallic compound grain boundary formed in the solder joints. The impurities, consisting of Cl and organic matters, are taken in the Ni plating film at the time of Ni plating. The organic matter impurities come primarily from the solder mask of the BGA interposer substrates. To improve the impact toughness of the Sn–3mass%Ag–0.5mass%Cu solder joint of the BGA, it is necessary to lower the concentration of these impurities. This, in turn, places importance on solder mask material selection (to minimize Ni plating bath contamination) as well as contamination prevention and plating bath sanitization.      

柔性衬底ITO导电膜的低温制备及特性研究

用真空反应蒸发技术在有机薄膜衬底上制备出ＩＴＯ透明导电薄膜,对薄膜的低温制备、结构和光电特性进行了研究,制备的薄膜为多晶膜,具有纯三氧化二铟的立方铁锰矿结构,最佳取向为（１１１）方向。薄膜在可见光区的最低电阻率为６．６３＊１０＾－４Ω．ｃｍ,透过率达到８２％。     

低温SiGe/SiHBT的研制及性能分析

用MBE(分子束外延,Molecular Beam Epitaxy)生长的材料研制了在低温工作的SiGe/Si HBT(异质结双极型晶体管,Heterojunction Bipolar Transistor).其在液氮下的直流增益h_fe(I_c/I_b)为16000,交流增益β(ΔI_c/ΔI_b)为26000,分别比室温增益提高51和73倍.测试了该HBT直流特性从室温到液氮范围内随温度的变化,并作了分析讨论.解释了极低温度时性能随温度变化与理论值的差异.     

Si-PI低温键合黏合剂的研制与性能测试

根据微机电系统(MEMS)在承压能力与化学稳定性方面的要求,在国外文献的基础上配制得到一种作为Si-聚酰亚胺(PI)低温键合黏合剂的芳香类热固性共聚酯(ATSP)。使用ATSP在不同条件下对Si-PI进行低温键合,确定了适合ATSP键合的温度和压力条件,并对键合面的拉伸强度和化学性能进行测试。测试结果表明,Si-PI键合面的拉伸强度能够达到1.3 MPa以上,完全可以满足MEMS器件在承压能力方面的要求。同时,键合后的ATSP在丙酮、酒精、制冷剂R134a和1-甲基-2-吡咯烷酮等多种试剂中均具有良好的化学稳定性。     

Enhanced Electrical and Thermal Properties of Trench Metal–Oxide–Semiconductor Field-Effect Transistor Built on Copper Substrate

Vertical metal–oxide–semiconductor field-effect transistors (UMOSFETs) were built on silicon substrates thinned to 7 $muhbox{m}$ and plated with 50- $muhbox{m}$ copper as drain electrode and mechanical support. Compared to the same devices on silicon substrates of 200 $muhbox{m}$ thick, the UMOSFET on 7-$muhbox{m}$ silicon demonstrates at least 16% less channel resistance and two times better device ruggedness. The reduced resistance is due to enhanced carrier mobility caused by increasing biaxial compressive thermal stress in silicon perpendicular to the channel, which is confirmed by a 3-D piezoresistance model. The doubling of ruggedness is attributed to a much improved transient thermal conductance.      

金属诱导法低温多晶硅薄膜的制备与研究

利用金属诱导晶化（Metal Induced Crystallization,MIC）的方法研究了a-Si/Ni的低温晶化,MIC晶化温度能降低到440℃.采用XRD、Raman、SEM、XPS等分析手段研究了Ni-MIC多晶硅薄膜的特性,对薄膜结构和组成进行了分析,对晶化过程的机理进行了讨论.     

SiGe/Si HBT发射结的寄生势垒及其对器件室温和低温特性的影响

研究了SiGe/Si HBT基区B杂质的偏析和外扩散对器件的影响.发现用MBE生长的SiGe基区中,在材料生长时B杂质的上述行为会严重破坏器件的室温电流增益并改变器件的低温性能.采用数值计算分析了B杂质的上述行为与在发射结产生的寄生势垒的关系,解释了器件温度特性的实验结果.并根据计算模拟和实验,讨论了SiGe隔离层的作用和优化的厚度.     

SiGe/SiHBT发射结的寄生势垒及其对器件室温和低温特性的影响

研究了SiGe/Si HBT基区B杂质的偏析和外扩散对器件的影响.发现用MBE生长的Si Ge基区中,在材料生长时 B杂质的上述行为会严重破坏器件的室温电流增益并改变器件的低温性能.采用数值计算分析了B杂质的上述行为与在发射结产生的寄生势垒的关系,解释了器件温度特性的实验结果.并根据计算模拟和实验,讨论了SiGe隔离层的作用和优化的厚度     

Very High Efficiency Orange‐Red Light‐Emitting Devices with Low Roll‐Off at High Luminance Based on an Ideal Host–Guest System Consisting of Two Novel Phosphorescent Iridium Complexes with Bipolar Transport

Two phosphorescent iridium complexes with bipolar transporting ability, namely FPPCA (500 nm) and BZQPG (600 nm), are synthesized and employed as an ideal host‐guest system for phosphorescent organic light emitting diodes (PHOLEDs).The devices give very high‐efficiency orange‐red emission from BZQPG with maximum external quantum efficiency (EQE or η_ext) of >27% and maximum power efficiency (PE or η_p) of >75 lm/W, and maintain high levels of 26% and 55 lm/W, 25% and 40 lm/W at high luminance of 1000 and 5000 cd m^?2, respectively, within a range of 8–15 wt% of BZQPG. The realization of such high and stable EL performance results from the coexistence of two parallel paths: i) effective energy transfer from host (FPPCA) to guest (BZQPG) and ii) direct exciton formation on the BZQPG emitter, which can alternately dominate the electrophosphorescent emission. This all‐phosphor doping system removes the charge‐injection barrier from the charge‐transport process to the emissive layer (EML) due to the inherent narrow E_g of both phosphors. Therefore, this ideal host–guest system represents a new design to produce PHOLEDs with high efficiency and low efficiency roll‐off using a simple device configuration.     

Silicon-on-Organic Integration of a 2.4–GHz VCO Using High-Q Copper Inductors and Solder-Bumped Flip Chip Technology

High-Q copper inductors were fabricated on low-cost and low-loss bismaleimide triazine (BT) and glass substrate using electroplating process. A differential LC voltage-controlled oscillator (VCO) circuit was designed using these high-Q inductors at 2.4 GHz. Flip chip and multichip module (MCM) technologies were applied to assemble the active chips on BT and glass substrate. The inductors exhibited Q-factor as high as 25 at 2.4 GHz. VCOs with copper inductors on BT and glass substrate had phase noise of $-$108 dBc/Hz at 600 kHz offset for a 2.4-GHz carrier, which is 6-dB improvement compared with the one with on-chip Al inductors. There was almost no substrate loss for inductors on BT and glass substrates. The effect of fabrication defects and solder joint resistance were also investigated. This technique can be extended to other building blocks, thus realizing integration of the whole RF system.      

A Proposal of Temperature Sensing Using a Thin-Film Bandpass Filter and Dual-Wavelength Push–Pull Reflectometry

A new temperature sensing system, which utilizes a thin-film bandpass filter deposited on an optical fiber end face and dual-wavelength push-pull reflectometry, is proposed. The system has the following advantages over the fiber Bragg grating sensor: it can observe the temperature in a localized small area and it gets rid of microcrack growth caused by stripping of cover coating from a fiber. The feasibility of the system has been verified by simulation.     

Efficient and Flexible Thin Film Amorphous Silicon Solar Cells on Nanotextured Polymer Substrate Using Sol–gel Based Nanoimprinting Method

The mechanical flexibility of substrates and controllable nanostructures are two major considerations in designing high‐performance, flexible thin‐film solar cells. In this work, we proposed an approach to realize highly ordered metal oxide nanopatterns on polyimide (PI) substrate based on the sol‐gel chemistry and soft thermal nanoimprinting lithography. Thin‐film amorphous silicon (a‐Si:H) solar cells were subsequently constructed on the patterned PI flexible substrates. The periodic nanopatterns delivered broadband‐enhanced light absorption and quantum efficiency, as well as the eventual power conversion efficiency (PCE). The nanotextures also benefit for the device yield and mechanical flexibility, which experienced little efficiency drop even after 100,000 bending cycles. In addition, flexible, transparent nanocone films, obtained by a template process, were attached onto the patterned PI solar cells, serving as top anti‐reflection layers. The PCE performance with these dual‐interfacial patterns rose up to 8.17%, that is, it improved by 48.5% over the planar device. Although the work was conducted on a‐Si:H material, our proposed scheme can be extended to a variety of active materials for different optoelectronic applications.     

Low Temperature Bonding of Alumina/Alumina and Alumina/Copper in Air Using Sn3.5Ag4Ti(Ce,Ga) Filler

Sn3.5Ag4Ti(Ce,Ga) active filler was used for joining alumina with alumina and alumina with copper at 250°C in air. The joining process was done without flux and without the need for pre-metallization of alumina or a protective atmosphere. After mechanical activation of the bonding surfaces of alumina and copper, the filler showed good wetting on both alumina and copper and led to a strong bond between alumina and copper. Through tensile testing, a bonding strength of 23.7 MPa was found in the alumina/copper joint region. The shear strengths for alumina/alumina, copper/copper and alumina/copper joints were 13.5, 14.3, and 10.2 MPa, respectively. The affinity of cerium for oxygen protects titanium from oxidation, giving rise to the reaction of titanium with alumina at such a low temperature. Electron probe microanalyzer (EPMA) elemental mapping revealed that titanium segregates effectively at the alumina/solder interfaces. After aging tests at 200°C and 150°C, a double layer of Cu₃Sn and Cu₆Sn₅ intermetallic compound was formed at the solder/copper interfaces. With an increase of aging periods, the amount of brittle compound in the joints increased and resulted in decreases in the shear strengths of the alumina/copper joints.     

硅芯片封接用PbO、ZnO、B2O3三元系易熔玻璃特性与封接工艺的关系

对淬火态及重熔再凝固态两种粉末进行DSC、红外吸收光谱及X射线衍射谱分析,实验表明,淬火态的软化点低,在500～510℃下完全熔化,有利于芯片的低温封接.重熔再凝固态的熔点高(630℃)、热稳定性好,有利于器件的使用.进一步研究表明,淬火态为无序态,再凝固态为结晶态,其中存在Pb2ZnB2O6的晶体相.无论是在无序态中还是在结晶态中,[BO3]3-离子团都不会破裂,均出现其分子振动的特征简正模.     

硅芯片封接用PbO、ZnO、B2O3三元系易熔玻璃特性与封接工艺的关系

对淬火态及重熔再凝固态两种粉末进行DSC、红外吸收光谱及X射线衍射谱分析,实验表明,淬火态的软化点低,在500～510℃下完全熔化,有利于芯片的低温封接.重熔再凝固态的熔点高(630℃)、热稳定性好,有利于器件的使用.进一步研究表明,淬火态为无序态,再凝固态为结晶态,其中存在Pb2ZnB2O6的晶体相.无论是在无序态中还是在结晶态中,[BO3]3-离子团都不会破裂,均出现其分子振动的特征简正模.     

Oxygen Vacancy Creation,Drift, and Aggregation in TiO2‐Based Resistive Switches at Low Temperature and Voltage

Transmission electron microscopy with in situ biasing has been performed on TiN/single‐crystal rutile TiO₂/Pt resistive switching structures. Three elementary processes essential for switching: i) creation of oxygen vacancies by electrochemical reactions at low temperatures (<150 °C), ii) their drift in the electric field, and iii) their coalescence into planar faults (and dissociation from them) have been documented. The faults have a form of vacancy discs in {110} and {121} planes, are bound by partial dislocation loops, and are identical to Wadsley defects observed in nonstoichiometric TiO₂ annealed at high temperatures. The faults can be regarded as a precursor to the formation of oxygen‐deficient Magnéli phases, but 3D secondary phase inclusions have not been detected. Together, the observations shed light on the behavior of oxygen vacancies in relatively low electric fields and temperatures, suggesting that, in addition to the rather accepted notion of oxygen vacancy motion during the writing processes in resistive switching devices, such motion may occur even during reading, and may be accompanied by significant oxygen vacancy creation at modest device excitation levels.     

Landing Posture Control for a Generalized Twin-Body System Using Methods of Input–Output Linearization and Computed Torque

This study aims to examine landing posture control for a generalized twin-body system using methods of input-output linearization and computed torque. The considered system mimics the mechanism of a certain popular cellular phone that is composed of two rigid links and an active joint that not only connects the two links but also offers torques about three orthogonal axes. A standard modeling procedure for robotic dynamics is employed to capture the twin-body dynamics in terms of 312 Euler angles on the basis of the Newton-Euler formulation. Herein, the posture components, i.e., the included angle, the tilt angle, and the first landing body, are employed to represent the landing posture that is particularly designed to prevent the fragile areas of the system from being damaged. Since the three posture components are nonlinear functions of state variables, the standard control strategy cannot be applied. In order to resolve this difficulty, the three posture components are transformed into three control outputs, which are linear functions of state variables. However, the system reveals a nonlinear control problem, and the method of input-output linearization is used to cancel the nonlinear terms. The computed torque method is then utilized to determine the input torques. Finally, the feasibility of the proposed landing posture control is confirmed via MATLAB simulations. This study successfully implemented a standard control strategy to realize landing posture control by establishing transformations from real landing posture components to simulated control outputs, and the controllable regions were defined completely.