Computer model and charge transport studies in short gate charge-coupled devices

A computer model has been developed that simulates charge transport of carriers in a surface channel charge-coupled device. This model is based on the charge continuity and current transport equations with a time dependent surface field. The device structure of the model includes a source diffusion an input gate and transfer gate. The present model is the first real simulation of the input scheme of the surface-channel CCDs. The scooping and spilling techniques associated with the charge injection process are simulated by the input diffusion which is included in the model.As an application to a CCD practical problem the present model has been used to study the linearity of the electrical charge injection into surface channel charge-coupled devices. The generated harmonic components of a sinusoidal input are calculated using the transfer characteristics of the input stage obtained from the computer simulation.Using this model the spatial variations of the self-induced fringing field and total currents under the storage and transfer gates were computed. The charge transfer mechanisms for short-gate (L ≤ 8 μm) CCDs was investigated. It was found that for short gates the charge transfer efficiency is governed mainly by the fringing field and self-induced current mechanisms. The results of this study help to clarify the mechanism by which the signal-charge level and gate length affect the charge transfer efficiency.     

Computer analysis of surface-charge transport between transfer electrodes in a charge-coupled device

A computer program has been developed that simulates two-dimensional dynamics of electrons and holes in a p-channel charge-coupled device. By using this program we have investigated the effects of two-dimensional device structure on surface-charge transfer, particularly a potential-barrier and fringing field. We have obtained the following results: 1) in case of a p-channel CCD negative charges on the SiO2film at a gap reduce the potential-barrier between transfer electrodes. This effect aids transfer of surface-charge in a CCD with wide gaps. 2) In transfer operation of a CCD with wide gaps, the signal charge must be less than a particular value so that a potential-barrier does not emerge. The particular value depends upon the device parameters and the transfer pulses. 3) The fringing field created by the adjacent electrode enhances the speed of surface-charge transfer. This effect increases with decreasing the transfer-electrode length and the signal charge level. 4) The computer results indicate that 100 percent transfer efficiency is obtained from the strong fringing field after the transfer time is equal to the transit time if no surface states exist.     

Numerical methods for the charge transfer analysis of charge-coupled devices

Charge transfer phenomenon in charge-coupled devices is characterized by a nonlinear partial differential equation of the parabolic type, usually coupled with a very undesirable nonlinear boundary condition. In this study, special treatment is made to the boundaries such that the nonlinearity of the boundary condition does not appear in the final calculation. Four possible finite-difference schemes for this problem are described and results compared. Through numerical experimentations, the linearized Crank-Nicolson scheme is proved to exhibit superior quality and is recommended for the exclusive use in studying the charge transfer phenomenon in CCD. Using this scheme, the charge transfer phenomenon of a two phase overlapping gate CCD has been studied and numerical results are presented. Special emphasis is directed toward the relative importance of the self-induced drift, fringing field drift and thermal diffusion currents. Also, the usefulness of approximating a spatial fringing field pattern by a constant value to the charge transfer phenomenon is discussed.     

Charge transfer in overlapping gate charge-coupled devices

A detailed numerical simulation of the free charge transfer in overlapped gate charge-coupled devices is presented. The transport are analyzed in terms of thermal diffusion, self-induced fields, and fringing fields under all the relevant electrodes and interelectrode regions with time-varying gate potentials. The results of the charge transfer with different clocking schemes and clocking waveforms are presented. The dependence of the stages of the charge transfer on the device parameters are discussed in detail. A lumped-circuit model of CCD that could be used to obtain the charge-transfer characteristics with various clocking waveforms is also presented.     

Free charge transfer in charge-coupled devices

The free charge-transfer characteristics of charge-coupled devices (CCD's) are analyzed in terms of the charge motion due to thermal diffusion, self-induced drift, and fringing field drift. The charge-coupled structures considered have separations between the gates equal to the thickness of the channel oxide. The effect of each of the above mechanisms on charge transfer is first considered separately, and a new method is presented for the calculation of the self-induced field. Then the results of a computer simulation of the charge-transfer process that simultaneously considers all three charge-motion mechanisms is presented for three-phase CCD's with gate lengths of 4 and 10 µ. The analysis shows that while the majority of the charge is transferred by means of the self-induced drift that follows a hyperbolic time dependence, the last few percent of the charge decays exponentially under the influence of the fringing field drift or thermal diffusion, depending on the design of the structure. The analysis shows that in CCD's made on relatively high resistivity substrates, the transfer by fringing-field drift can be very fast, such that transfer efficiencies of 99.99 percent are expected at 5- to 10- MHz bit rates for 10-µ gate lengths and at up to 100 MHz for 4-µ gate lengths.     

Charge transfer in charge-coupled devices in the presence of interface states

The transfer of charge from under a gate of a three-phase surface-channel charge-coupled device is analysed in terms of thermal diffusion, charge-gradient induced drift, fringing field drift, and interface state trapping. A method based on a piecewise approximation for the emission rate from interface states is proposed and used to derive the single-transfer characteristics in the presence of interface traps. It is shown that the emission rate exhibits a marked spatial dependence, which is a function of both fringing field profile and interface state density. It is also concluded that trapping effects are a strong limitation on the transfer efficiencies attainable in surface-channel charge-coupled devices at low and moderate frequencies.     

Drift-aiding fringing fields in charge-coupled devices

Transverse electric fields at the Si-SiO/SUB 2/ interface (fringing fields) can aid transfer of charge from one potential well to another in charge- coupled devices (CCD). The magnitudes of these drift-aiding fringing fields are evaluated by an approximate analysis and also by computer. The analytical approach assumes zero space charge in the silicon and agrees with the computer solutions in that limit. When the depletion width becomes less than the gate width the fringing field is reduced considerably. Transit times associated with these fringing fields are evaluated. Trapping of charge in interface states rather than transfer of free charge is expected to be the fundamental limitation on speed and transfer efficiency in appropriately designed CCDs.     

Self-scanned image sensors based on charge transfer by the bucket-brigade method

Solid-state image sensors which are internally scanned by charge transfer offer a potentially usefull alternative to sensors based onx-yaddressing. The application of charge transfer to solid-state scanning introduces sensor design problems which are common to either the "bucket-brigade" or "charge-coupled" approach. Two-dimensional and single-line sensors employing bucket-brigade scanning have been built and evaluated. Problems discussed include transfer efficiency, video signal extraction, vertical scanning, and spurious effects. The use of the bucket-brigade shift register as a scan generator forx-yaddressing is also described.     

Experimental confirmation of an analytical model for charge transfer in charge-coupled devices

An analytical model for the charge loss as a function of transfer time under low charge levels in surface channel charge-coupled devices has been theoretically determined and experimentally confirmed. The model includes the effect of surface states. A new method of measuring charge transfer makes it possible to determine the role that surface states play in the degradation of signal charge transfer.     

A compact threshold voltage model for gate misalignment effect of DG FD SOI nMOS devices considering fringing electric field effects

This paper reports an analysis of gate misalignment effect on the threshold voltage of double-gate ultrathin fully depleted silicon-on-insulator nMOS devices using a compact model considering the fringing electric field effect, biased at zero-bias V/sub DS/. Using the conformal mapping transformation approach, a closed-form compact model considering the fringing electric field effect in the nongate overlap region has been derived to provide an accurate prediction of the threshold voltage behavior as verified by the two-dimensional simulation results.     

Design and optimization of BCCD in CMOS technology

This paper optimizes the buried channel charge-coupled device (BCCD) structure fabricated by complementary metal oxide semiconductor (CMOS) technology. The optimized BCCD has advantages of low noise, high integration and high image quality. The charge transfer process shows that interface traps, weak fringing fields and potential well between adjacent gates all cause the decrease of charge transfer efficiency (CTE). CTE and well capacity are simulated with different operating voltages and gap sizes. CTE can achieve 99.999% and the well capacity reaches up to 25 000 electrons for the gap size of 130 nm and the maximum operating voltage of 3 V.     

The quantitative effects of interface states on the performance of charge-coupled devices

The several effects of interface states in limiting the performance of surface channel charge-coupled devices (CCD's) are described and evaluated. The limitations on transfer efficiency may be minimized by using a background charge in the device at all times. Experimental measurements of transfer inefficiency on three-phase devices and a two-phase device are presented and correlated with the predicted values, although measurements of the density and capture cross sections of interface states after device fabrication are required for accurate quantitative predictions of transfer inefficiencies. It is concluded that trapping effects are a limitation on the transfer efficiencies obtainable in surface channel charge-coupled devices, particularly, for example, at frequencies less than 1 MHz for devices having 10-µm-long transfer electrodes, but are not a direct limitation on the high-frequency performance. The effect of interface states in adding transfer noise onto the charge packets is also described, and is shown to be small, although in some devices it may reduce the signal-to-noise ratios that might otherwise be possible.     

Short-channel effects on the input stage of surface-channel CCD's

A detailed study of transient signal charge injection into surface-channel charge-coupled devices using a two-dimensional computer model including the source diffusion and the self-induced and fringing field effects has been carried out. The total delay time required to inject a packet of charge into CCD's for a range of device structures was determined. It is found that the maximum clock pulse frequency of operation is determined by the input delay time and not by the speed of charge transfer which is normally assumed. The results of this study are compared with results obtained using a one-dimensional simulation model for charge injection into CCD's. Experimental justification of the one-dimensional model is provided. With the aid of this analysis a design expression for the intrinsic input delay (the delay associated with the fill portion) for short gate surface-channel CCD's is derived and presented in this paper. It is also shown that for short gate devices (L < 8µm) the input delay time due to scooping is about two to four times the intrinsic delay.     

Theory and design methodology for an optimum single-phase CCD

The authors present a theory, a design methodology, and a transient simulator for a silicon single-phase CCD. The time-varying distribution of the surface hole charge is derived and an expression for maximum bias transition rate is established. The new design methodology to maximize signal capacity through nonlinear optimization is presented. The optimizer utilizes one-dimensional device models which have been corrected for small-geometry effects. The effect of parameter variation on signal capacity is assessed. A transient simulator for signal transfer is presented which accurately models fringing fields and thermal diffusion. Signal transfer speed variations with device design and geometry are discussed     

Two-dimensional transient analysis of a buried-channel charge-coupled device

An effective method of two-dimensional transient analysis of potential and charge carrier distribution in a buried-channel charge-coupled device (BCCD) operating in storage and transfer modes has been developed with the aid of the finite Fourier transform (FET) technique.The effect of different clocking schemes on charge carrier transfer inefficiency and charge handling capacity are examined and discussed using the method developed. It is also shown that, for a BCCD operating in the storage mode, two-dimensional analysis indicates that the charge handling capacity determined by one-dimensional analysis can result in overestimation, which is misleading.     

Charge-coupled imaging devices: Design considerations

In this paper some of the parameters relevant to the design of charge-coupled imaging devices are considered. Among these are charge storage capability, transfer efficiency, charge conservation, dark current, and the anticipated signal-to-noise ratio. Each is discussed, and the resultant effects on the performance of imaging devices are investigated.     

A backside illuminated 400 × 400 charge-coupled device imager

Large-area backside illuminated charge-coupled device imagers have been fabricated using double level aluminum transfer electrode technology. Devices with 100 × 160 and 400 × 400 resolution elements have been fabricated using buried channel technology for high charge transfer efficiency. Detailed optical characterization has been performed on these imagers over the temperature range -40 to +24°C and at several operating frequencies between 10 kHz and 1 MHz.     

A new accelerated transfer method for the CPD image sensor

A new charge transfer method for the CPD image sensor is proposed. In this method a high transfer speed is achieved with the use of an accelerated charge priming transfer (CPT) coupler, which consists of the array of the conventional CPT's and inverter amplifiers. This constitution strikingly increases the speed as well as the efficiency of the charge transfer from the vertical transport lines with large capacitance to the horizontal buried-channel charge-coupled (BCCD) shift register. Under a high transfer efficiency of more than 98 percent, a short transfer time less than 1 µs has been attained, independently of the signal charge magnitude.