An output queueing analysis of multipath ATM switches

The performance of output buffers in multipath ATM switches is closely related to the output traffic distribution, which characterizes the packet arrival rate at each output link connected to the output buffer of a given output port. Many multipath switches produce nonuniform output traffic distributions even if the input traffic patterns are uniform. Focusing on the nonuniform output traffic distribution, we analyze the output buffer performances of several multipath switches under both uniform and nonuniform input traffic patterns. It is shown that the output traffic distributions are different for the various multipath switches and the output buffer performance measured in terms of packet loss probability and mean waiting time improves as the nonuniformity of the output traffic distribution becomes higher.     

一种基于输入队列的交换机快速会聚调度算法

随着网络带宽需求的增加,高性能交换机的地位日趋重要。交换机包括3个部分:(1)在输入端口保存到达此端口的信元的输入缓冲。(2)在输出端口保存将要发送的信元的输出缓冲。(3)调度输入信元到所需输出端口的调度模块。当由多个输入端口要求输出到同一输出端口的时候由此调度算法来裁决一个输入输出对。一般而言,交换机的性能很大一部分取决于这一调度算法的性能,但并不希望这一调度算法成为交换机性能的瓶颈。该文讨论了许多近年来常用的算法,在此基础上同时提出一种新的的调度算法。通过计算机模拟结果可以看出这种算法具有更高的效率,更快的会聚速度。     

Fast and noniterative scheduling in input-queued switches: Supporting QoS

We report three fast and scalable scheduling algorithms that provide exact bandwidth guarantee, low delay bound, and reasonable jitter in input-queued switches. The three schedulers find a maximum input/output matching in a single iteration. They sustain 100% throughput under both uniform and bursty traffic. They work many times faster than existing scheduling schemes and their speed does not degrade with increased switch size. SRA and SRA+ algorithms are of O(1) time complexity and can be implemented in simple hardware. SRA tends to incur different delays to flows of different classes of service due to their different subscribed portions of the total bandwidth. SRA+, a weighted version of SRA, operates on cells that arrive uniformly and on cells of packets such that the cells of whole packets are switched contiguously. SRA+ improves over SRA in that all flows undergo the same delays regardless of their bandwidth shares. The schedulers operate on queue groups at the crossbar arbiters in a distributed manner.     

Effective cell loss analysis of a nonblocking ATM switch with nonuniform traffic

This paper quantifies a trade-off existing between cell loss and cell delay in an ATM switch with arbitrary input and output buffer sizes. TheEffective Cell Loss is introduced as a cell loss performance measure which combines both the cell loss due to buffer overflow and the cell loss due to excessive delay. ThisEffective Cell Loss measure allows one to design optimal input and output buffer sizes for a given cell loss requirement. Our analysis is versatile enough to easily study the adverse effect due to nonuniform traffic patterns at a switch. Study shows that the nonuniform traffic may jeopardize ATM switches designed under the uniform traffic assumption. For some examples, we have provided both numerical and computer simulation results to show the validity and usefulness of our analysis.     

Packet mode and QoS algorithms for buffered crossbar switches with FIFO queuing

The buffered crossbar switch architecture has recently gained considerable research attention. In such a switch, besides normal input and output queues, a small buffer is associated with each crosspoint. Due to the introduction of crossbar buffers, output and input dependency is eliminated, and the scheduling process is greatly simplified. We analyze the performance of switch policies by means of competitive analysis, where a uniform guarantee is provided for all traffic patterns. We assume that each packet has an intrinsic value designating its priority and the goal of the switch policy is to maximize the weighted throughput of the switch. We consider FIFO queueing buffering policies, which are deployed by the majority of today’s Internet routers. In packet-mode scheduling, a packet is divided into a number of unit length cells and the scheduling policy is constrained to schedule all the cells contiguously, which removes reassembly overhead and improves Quality-of-Service. For the case of variable length packets with uniform value density (Best Effort model), where the packet value is proportional to its size, we present a packet-mode greedy switch policy that is 7-competitive. For the case of unit size packets with variable values (Differentiated Services model), we propose a β-preemptive (β is a preemption factor) greedy switch policy that achieves a competitive ratio of 6 + 4β + β ² + 3/(β − 1). In particular, its competitive ratio is at most 19.95 for the preemption factor of β = 1.67. As far as we know, this is the first constant-competitive FIFO policy for this architecture in the case of variable value packets. In addition, we evaluate performance of β-preemptive greedy switch policy by simulations and show that it outperforms other natural switch policies. The presented policies are simple and thus can be efficiently implemented at high speeds. Moreover, our results hold for any value of the internal switch fabric speedup.     

多门限随机早期丢弃及仿真研究

CIOQ交换结构通常在输入端口侧采用基于VOQ结构的输入排队,为了实现VOQ队列报文的优先级区分丢弃,文章在实验的基础上给出了一种支持DiffServ结构中QoS的多门限随机早期丢弃（MTRED）队列管理机制。并通过大规模业务流量下的仿真对不同丢包门限的设置进行了深入的研究,最后给出了相关结论。     

基于双轮转指针的输入与交叉点联合排队型(CICQ)交换结构调度算法

CICQ交换结构因具有良好的分布式调度特性而成为构建太比特（Tb／s）级以上交换机的一种理想选择．轮转型调度算法因硬件实现的简单性而得到广泛的研究,尽管此类型的调度算法在均匀流量下具有较高的吞吐率,然而在非均匀的流量下其性能则明显下降．指出了已有轮转型算法在非均匀流量下性能下降的原因,提出了一类基于双指针的轮转型调度算法,即每个输入调度器均有两个轮转指针（主指针和辅助指针）．主指针对应的队列具有最高的调度优先级,算法可以根据各个队列的状态动态决定何时更新主指针。当主指针对应的队列被流控机制阻塞时,将根据辅助指针依次公平服务其他队列．实验结果表明,基于双指针的调度算法可以显著提高CICQ交换机在非均匀流量下的性能．     

支持公平服务的CICQ分层混合调度策略

为到达业务提供性能保障是衡量一个交换系统性能的重要参考.针对现有联合输入交叉点排队交换结构(CICQ)调度策略缺乏基于流的服务质量保障,探讨了在CICQ交换结构实施基于"流"调度的可能性,提出了一种能够为到达业务流的提供公平服务的分层混合调度策略(HSFS).HSFS采用分层的混合调度机制,每个输入、输出端口可独立地进行变长分组交换,其复杂度为O(1),具有良好可扩展特性.理论分析结果表明,HSFS无需加速便能为到达业务提供时延上限、速率和公平性保障.最后,基于SPES对HSFS的性能进行了评估.     

Achieving fair service with a hybrid scheduling scheme for CICQ switches

Providing performance guarantees for arriving traffic flows has become an important measure for today’s routing and switching systems. However, none of current scheduling algorithms built on CICQ (combined input and cross-point buffered) switches can provide flow level performance guarantees. Aiming at meeting this requirement, the feasibility of implementing flow level scheduling is discussed thoroughly. Then, based on the discussion, it comes up with a hybrid and stratified fair scheduling (HSFS) scheme, which is hierarchical and hybrid, for CICQ switches. With HSFS, each input port and output port can schedule variable length packets independently with a complexity of O(1). Theoretical analysis show that HSFS can provide delay bound, service rate and fair performance guarantees without speedup. Finally, we implement HSFS in SPES (switch performance evaluation system) to verify the analytical results.     

在CICQ交换结构下实现分布式的输入排队DRR分组公平调度

传统的基于crossbar的输入排队交换结构在提供良好的QoS方面存在很大的不足,而CICQ(combined input and crosspoint buffered queuing)交换结构与传统的交换结构比,不但能在各种输入流下提供接近输出排队的吞吐率,而且能提供良好的QoS支持。基于CICQ结构,提出了在输入排队条件下实现基于流的分布式DRR分组公平调度算法的方案,并通过仿真验证了这一方案的有效性。     

Wavelength converter sharing in a WDM optical packet switch: dimensioning and performance issues

This paper analyses the performance of an optical packet switch making use of fiber delay-lines to resolve output packet contentions and equipped with a set of tunable wavelength converters (TOWCs) shared among the input lines. The wavelength converters can shift optical packets to any wavelength of the output link which they are directed to. An analytical model is developed to evaluate the number of TOWCs needed to satisfy given performance requirements. Moreover, a sensitivity analysis with respect to both the optical packet switch parameters and the traffic load is carried out. The obtained results show that the number of converters needed to maintain the packet loss probability is much lower than that needed by the switches proposed in literature.     

基于流映射的负载均衡调度算法研究

网络管理者需要能够提供可扩展性、吞吐率保证及报文顺序的高性能路由器体系结构.目前基于Crossbar的集中式路由器体系结构难以实现性能和规模的可扩展,基于两级Mesh网络的负载均衡交换结构成为扩展Internet路由器容量的有效的途径.负载均衡路由器存在严重的报文乱序现象,输出端报文重定序复杂度为O(N2).文中提出一种区域均等的负载均衡交换结构,每k个连续的中间级输入端口划分为一个区域,输入端采用基于流映射的负载分配算法UFFS-k(Uniform Fine-grain Frame Spreading,k为聚合粒度,简称UFFS-k),在k个连续的外部时间槽,以细粒度的方式将同一条流的k个信元分派到固定的映射区域,通过理论证明,该调度策略可获得100%吞吐率并能够保证报文的顺序.为避免流量区域集中现象,采用双循环(dual-rotation)方式构建不同输入端口的流到区域的映射关系;为实现负载在中间级输入端口的均衡分布,每个输入端口维护全局统一视图的流量分布矩阵,UFFS-k调度算法根据流量分布矩阵调度单位帧,可以证明,对任意输出端口j,同一区域OQj队列长度相同且不同区域OQj队列长度至多差1,从而实现了100%负载均衡度.UFFS-k调度算法分布于每个输入端口独立执行,根据流到区域的映射关系及负载分布状态分派信元,模拟结果显示,当聚合粒度k=2时,UFFS-k算法在同类维序算法中表现出最优延迟性能.     

Performance of trunk grouping in packet switch design

This paper studies the performance of trunk grouping in packet switch system design, with emphasis on the analysis of maximum throughput, input queue delay and packet loss rate. The trunk grouping technique can be implemented on both sides of the switch. In principle, the output trunk grouping relieves traffic output contentions, while the input trunk grouping, proposed in this paper, prevents individual input links from overloading. The study shows a significant advantage of both input and output trunk groupings in removing local congestions caused by individual links, especially in a highly nonuniform traffic environment. To implement trunk grouping, we suggest not to designate the connection of each virtual circuit to individual links in high speed network protocol design.     

An FEC scheme combined with weighted scheduling to reduce multicast packet loss in IPTV over PON

Congestion is one of the most important challenges in optical networks. In a Passive Optical Network (PON), the Optical Line Terminal (OLT) is a bottleneck and congestion prone. In this paper, a framework is proposed with Forward Error Correction (FEC) at the IP layer combined with Weighted Round Robin (WRR) at the scheduling level to overcome packet-loss due to congestion in the OLT in order to achieve efficient video multicasting over PON. In the FEC scheme, Reed-Solomon (RS(n,k)) with erasure coding is used, where (n−k) erroneous symbols per n symbol blocks can be corrected. In our framework, an Internet Protocol TeleVision (IPTV) service provider uses the mentioned RS coding and generates redundant packets from regular IPTV packets in such a way that an Optical Network Unit (ONU) can recover lost packets from received packets, thus resulting in a better video quality. Simulation results show that using the proposed framework, an ONU can recover many lost packets and achieve better video quality under different traffic loads for its users. For instance, the proposed method can reduce packet loss rate by almost 55% and 10% under traffic load 0.9, respectively, compared with the Round Robin (RR) and WRR methods under symmetric traffic load. When High Receivers Queue (HRQ) traffic (i.e., traffic received by many users) is twice Low Receivers Queue (LRQ) traffic (i.e., traffic received by a small number of users), this reduction is almost 86% and 30% under traffic load 0.9. Finally, when LRQ traffic is twice HRQ traffic, the reduction in packet loss rate is almost 70% and 91% at traffic load 0.5.     

Maximizing throughput in multi-queue switches

We study a basic problem in Multi-Queue switches. A switch connectsm input ports to a single output port. Each input port is equipped with an incoming FIFO queue with bounded capacityB. A switch serves its input queues by transmitting packets arriving at these queues, one packet per time unit. Since the arrival rate can be higher than the transmission rate and each queue has limited capacity, packet loss may occur as a result of insufficient queue space. The goal is to maximize the number of transmitted packets. This general scenario models most current networks (e.g. IP networks) which only support a “best effort” service in which all packet streams are treated equally. A 2-competitive algorithm for this problem was designed in [5] for arbitraryB. Recently, a (17/9 ≈ 1.89)-competitive algorithm was presented forB>1 in [3]. Our main result in this paper shows that forB which is not too small our algorithm can do better than 1.89, and approach a competitive ratio ofe/(e − 1) ≈ 1.58. The research of Yossi Azar was supported in part by the Israeli Ministry of Industry and Trade and by the Israel Science Foundation.     

Simulation of dynamic input buffer space in multistage interconnection networks

This paper presents a simulation study of a new dynamic allocation of input buffer space in multistage interconnection networks (MINs). MINs are composed of an interconnected set of switching elements (SEs), connected in a specific topology. The SEs are composed of input and output buffers which are used to store received and forwarded packets, respectively. The performance of these networks depends on the design of these internal buffers and the clock mechanism in synchronous MINs. Various cycle models exist which include the big cycle, small cycle and the smart cycle, each of which provides a more efficient cycle timing. The smart cycle model achieves a superior performance by using output buffers and acknowledgement. However, it suffers from lost and out-of-order packets at high traffic loads. This paper, presents a variation of the smart cycle model, whereby, the input buffer space of each SE is allocated dynamically as a function of traffic load, in order to overcome the above-mentioned drawbacks. A shared buffer pool is provided, which supplies the required input buffer space as required by each SE. Simulation results are presented, which show the required buffer pool for various network sizes and for different network loads. Also, comparison with a static allocation scheme shows an increased network throughput, and the elimination of lost and out-of-order packets at high traffic loads.     

Probabilistic design of layered neural networks based on theirunified framework

Proposes three ways of designing artificial neural networks based on a unified framework and uses them to develop new models. First, the authors show that artificial neural networks can be understood as probability density functions with parameters. Second, the authors propose three design methods for new models: a method for estimating the occurrence probability of the inputs, a method for estimating the variance of the outputs, and a method for estimating the simultaneous probability of inputs and outputs. Third, the authors design three new models using the proposed methods: a neural network with occurrence probability estimation, a neural network with output variance estimation, and a probability competition neural network. The authors' experimental results show that the proposed neural networks have important abilities in information processing; they can tell how often a given input occurs, how widely the outputs are distributed, and from what kinds of inputs a given output is inferred.     

Queuing analysis of shared-buffer switches with control scheme under bursty traffic

Shared-buffer switches have many advantages such as relatively low cell loss rate and good buffer utilization, and they are increasingly favoured in recent VLSI switch designs for ATM. However, their performance degrades dramatically under nonuniform traffic due to the monopolization of the buffer by some favoured cells. To overcome this, restricted types of sharing and hot-spot pushout (HSPO) have been proposed, and the latter has been shown by simulation to perform better in all situations. In this paper we develop an analytical model for performance evaluation of a shared-buffer asynchronous transfer mode (ATM) switch with HSPO under bursty traffic. This analytical model is an improved version of the first model ever developed for this purpose. We balance the relative queues to approximate the effects of pushout, while keeping only four state-variables, and our model gives a good agreement with simulation, for calculating throughput and cell loss.     

A single-cycle output buffered router with layered switching for Networks-on-Chips

We present a single-cycle output buffered router based on layered switching for networks on chips (NoCs). Different from state-of-the-art NoC routers, the router has three important characteristics: (1) It employs layered switching, which implements wormhole on top of virtual cut-through (VCT) switching; (2) In contrast to input buffered architectures, it adopts an output buffered architecture; (3) It is single cycle, meaning that the router pipeline takes only one cycle for all flits. Experimental results show that the router achieves up to 80% of ideal network throughput under uniform random traffic pattern. Compared with wormhole switching, layered switching achieves up to 36.9% latency reduction for 12-flit packets under uniform random traffic with an injection rate of 0.5 flit/cycle/node. Under 65 nm technology synthesized results show that its critical path has only 20 logic gates, and it reduces 11% area compared to the input virtual-channel router with the same buffer capacity.     

Synchronous versus asynchronous operation of a packet switch with combined input and output queueing

A single-stage non-blocking N × N packet switch with combined input and output queueing is considere. The limited queueing at the output ports partially resolves output port contention. Overflow at the output queues is prevented by employment of a backpressure mechanism and additional queueing at the input ports. This paper investigates the performance of the switch under two different modes of operation: asynchronous and synchronous or slotted. For the purpose of comparison a switch model is developed. Assuming Poisson packet arrivals, several performance measures are obtained analytically. These include the distribution of the delay through the switch, the input queue length distribution, packet losses at the inputs in the case of finite input queues, and the maximum switch throughput. The results obtained demonstrate a slight performance advantage of asynchronous over synchronous operation. However, the maximum switch throughput is the same for both modes of operation.