Study of electrical and microstructure properties of high dielectric hafnium oxide thin film for MOS devices

Hafnium oxide (HfO₂) has emerged as the most promising highkdielectric for MOS devices. As-deposited sputtered HfO₂ thin films have large number of defects resulting in increased oxide charge and leakage current. In this paper the effect of sputtering voltage, bias sputtering and post deposition thermal annealing is investigated. The I–V and C–V characteristics of the dielectric film are studied employing Al–HfO₂–Si MOS capacitor structure. It is found that oxide charge increases with increasing sputtering voltage. Thermal annealing in oxygen reduces the interface/oxide charges and leakage current. It is shown that applying substrate bias during film deposition leakage current is further reduced by an order of magnitude. The microstructure of thin film is examined by AFM. The reduction in surface roughness with bias sputtering is shown. The experimental results are presented and discussed for device application.     

Effect of annealing temperature on electrical and nano-structural properties of sol–gel derived ZnO thin films

Zinc oxide (ZnO) thin films have been prepared on silicon substrates by sol–gel spin coating technique with spinning speed of 3,000 rpm. The films were annealed at different temperatures from 200 to 500 °C and found that ZnO films exhibit different nanostructures at different annealing temperatures. The X-ray diffraction (XRD) results showed that the ZnO films convert from amorphous to polycrystalline phase after annealing at 400 °C. The metal oxide semiconductor (MOS) capacitors were fabricated using ZnO films deposited on pre-cleaned silicon (100) substrates and electrical properties such as current versus voltage (I–V) and capacitance versus voltage (C–V) characteristics were studied. The electrical resistivity decreased with increasing annealing temperature. The oxide capacitance was measured at different annealing temperatures and different signal frequencies. The dielectric constant and the loss factor (tanδ) were increased with increase of annealing temperature.     

Structural and electrical studies of Cd<Subscript>1−x</Subscript>Zn<Subscript>x</Subscript> Te thin film by vacuum evaporation technique

Cd_1−xZn_xTe (where x = 0.02, 0.04, 0.06, 0.08) thin film have been deposited on glass substrate at room temperature by thermal evaporation technique in a vacuum at 2 × 10⁻⁵ torr. The structural analysis of the films has been investigated using X-ray diffraction technique. The scanning electron microscopy has been employed to know the morphology behaviour of the thin films. The temperature dependence of DC electrical conductivity has been studied. In low temperature range the thermal activation energy corresponding to the grain boundary—limited conduction are found to be in the range of 38–48 μeV, but in the high temperature range the activation energy varies between 86 and 1.01 meV. The built in voltage, the width of the depletion region and the operating conduction mechanism have been determined from dark current voltage (I–V) and capacitor-voltage (C–V) characteristics of Cd_1−xZn_xTe thin films.     

MOS capacitors with metal gate/high-k dielectrics on GaAs bulk substrate

This paper investigates the electrical characteristics at low temperatures through C–V, I–V and conductance measurements to understand the interface behavior of HfO₂ and p-type GaAs bulk substrate. Room temperature interface state density, D _it , estimated for as-deposited Ti–Au/HfO₂/GaAs capacitors was found to be 3.68 × 10¹¹ cm⁻² eV⁻¹. Low temperature measurement suggests that only fast interface states contribute to the conduction process. When the characteristics of two different metal gates were compared, the accumulation capacitance density observed to be 1.4 and 8.98 fF/μm² for Be–Au/HfO₂/GaAs and Ti–Au/HfO₂/GaAs, respectively at 1 MHz.     

Growth and characterization of HfO2 high-k gate dielectric films by laser molecular beam epitaxy (LMBE)

The HfO₂ gate dielectric films were fabricated by the laser molecular beam epitaxy (LMBE) technique. High-resolution transmission electron microscopy (HRTEM) observation showed that under optimized condition, there is no detectable SiO₂ interfacial layer in the as-deposited film and a SiO₂ interfacial layer of about 0.4 nm was formed at the Si interface due to the post deposition annealing. Capacitance–voltage (C–V) measurement of the film revealed that the equivalent oxide thickness was about 1.3 nm. Such a film showed very low leakage current density of 1.5 × 10⁻² A cm⁻² at 1 V gate bias from the current–voltage (I–V) analysis. The conduction mechanisms as a function of temperature T and electric field E were also systematically studied.     

Electrical Properties and Leakage Current Mechanisms of Bi<Subscript>3.2</Subscript>Gd<Subscript>0.8</Subscript>Ti<Subscript>3</Subscript>O<Subscript>12</Subscript> Thin Films Prepared by a Sol-Gel Method

Bi_3.2Gd_0.8Ti₃O₁₂ (BGTO) thin films were deposited on Pt(111)/Ti/SiO₂/Si(100) substrates using the sol-gel method and rapid thermal annealing in an oxygen atmosphere. The effects of annealing temperature (500–800°C) on microstructure and electrical properties of thin films were investigated. X-ray diffraction analysis shows that the BGT thin films have a bismuth-layered perovskite structure with preferred (117) orientation. The intensities of (117) peaks increases with increasing annealing temperature. The leakage current density (J) was 3.69×10⁻⁸ A/cm² at 200 kV/cm. It was found that the leakage current was affected not only by the microstructure but also by the interface between the Pt electrode and BGTO thin films. In the low electric field region, the leakage current was controlled by Poole–Frenkel emission. In addition, the mechanism can be explained by Schottky emission from the Pt electrode in the high electric field region.     

HfO2 gate insulator formed by atomic layer deposition for thin-film-transistors

We have investigated the effects of annealing temperature on the physical and electrical properties of the HfO₂ film deposited by an atomic layer deposition (ALD) method for high-k gate oxides in thin-film-transistors (TFTs). The ALD deposition of HfO₂ directly on the Si substrate at 300 °C results in the formation of thin HfSi_xO_y interfacial layer between Si and HfO₂. The subsequent low temperature N₂-annealing of HfO₂ films (i.e., 300 °C) using a rapid thermal processor (RTP) improves the overall electrical characteristics of HfSi_xO_y-HfO₂ films. Based on the current work, we suggest that HfO₂ film deposited by the ALD method is suitable for high-k gate oxides in TFTs, which have to be fabricated at low temperature.     

Effects of annealing temperature on the characteristics of ALD-deposited HfO2 in MIM capacitors

We have investigated the annealing effects of HfO₂ films deposited by an atomic layer deposition (ALD) method on the electrical and physical properties in the Si/SiO₂/Pt/ALD-HfO₂/Pd metal-insulator-metal (MIM) capacitors. If the annealing temperature for HfO₂ films was restricted below 500 °C, an annealing step using a rapid thermal processor (RTP) improves the electrical properties such as the dissipation factor and the dielectric constant. On the other hand, annealing at 700 °C degrades the electrical characteristics in general; the dissipation factor increases over the frequency range of 1∼4 MHz, and the leakage current increases up to 2 orders at the low electric field regions. We found that the degradation of electrical properties is due to the grain growth in the HfO₂ film (i.e., poly-crystallization of the film) by the high temperature annealing processing. We suggested that the annealing temperature must be restricted below 500 °C to obtain the high quality high-k film for the MIM capacitors.     

Effect of annealing temperature on the microstructural and electrical properties of epitaxial Ga-doped ZnO film deposited on c-sapphire substrate

4 wt. % Ga-doped ZnO (GZO) film has been prepared on c (0001)—sapphire (Al₂O₃) substrate by Pulse Laser Deposition method. The effect of annealing temperature on the microstructural and electrical properties of the GZO thin film was investigated. X-ray diffraction and High-Resolution Transmission electron microscopy (HR–TEM) studies showed that the electrical and defects properties of GZO thin film were greatly influenced by annealing temperature. The crystallinity and electrical properties of the film can be improved by annealing at 800 °C. However, at a too high annealing temperature of 1,000 °C, the newly processing defects such as extended dislocations and a new nanoscale stacking fault were formed. Consequently, the crystallinity and electrical properties of the film annealed at 1,000 °C were degraded. The study was useful to acquire optimal annealing conditions to improve the properties of film.     

Sol–gel derived Co<Subscript>3</Subscript>O<Subscript>4</Subscript> thin films: effect of annealing on structural,morphological and optoelectronic properties

Nanocrystalline Co₃O₄ thin films were prepared on glass substrates by using sol–gel spin coating technique. The effect of annealing temperature (400–700 °C) on structural, morphological, electrical and optical properties of Co₃O₄ thin films were studied by X-ray diffraction (XRD), Scanning Electron Microscopy, Electrical conductivity and UV–visible Spectroscopy. XRD measurements show that all the films are nanocrystallized in the cubic spinel structure and present a random orientation. The crystallite size increases with increasing annealing temperature (53–69 nm). These modifications influence the optical properties. The morphology of the sol–gel derived Co₃O₄ shows nanocrystalline grains with some overgrown clusters and it varies with annealing temperature. The optical band gap has been determined from the absorption coefficient. We found that the optical band gap energy decreases from 2.58 to 2.07 eV with increasing annealing temperature between 400 and 700 °C. These mean that the optical quality of Co₃O₄ films is improved by annealing. The dc electrical conductivity of Co₃O₄ thin films were increased from 10⁻⁴ to 10⁻² (Ω cm)⁻¹ with increase in annealing temperature. The electron carrier concentration (n) and mobility (μ) of Co₃O₄ films annealed at 400–700 °C were estimated to be of the order of 2.4–4.5 × 10¹⁹ cm⁻³ and 5.2–7.0 × 10⁻⁵ cm² V⁻¹ s⁻¹ respectively. It is observed that Co₃O₄ thin film annealing at 700 °C after deposition provide a smooth and flat texture suited for optoelectronic applications.     

Damping properties of epoxy-based composite embedded with sol–gel-derived Pb(Zr<Subscript>0.53</Subscript>Ti<Subscript>0.47</Subscript>)O<Subscript>3</Subscript> thin film annealed at different temperatures

Pb(Zr_0.53Ti_0.47)O₃ (PZT) thin films were prepared on Pt/Ti/SiO₂/Si substrate by sol–gel method. The effect of annealing temperature on microstructure, ferroelectric and dielectric properties of PZT films was investigated. When the films were annealed at 550–850 °C, the single-phase PZT films were obtained. PZT films annealed at 650–750 °C had better dielectric and ferroelectric properties. The sandwich composites with epoxy resin/PZT film with substrate/epoxy resin were prepared. The annealing temperature of PZT films influenced their damping properties, and the epoxy-based composites embedded with PZT film annealed at 700 °C had the largest damping loss factor of 0.923.     

Deposition of AgGaS<Subscript>2</Subscript> thin films by double source thermal evaporation technique

In this study, polycrystalline AgGaS₂ thin films were deposited by the sequential evaporation of AgGaS₂ and Ag sources with thermal evaporation technique. Thermal treatment in nitrogen atmosphere for 5 min up to 700 °C was applied to the deposited thin films and that resulted in the mono phase AgGaS₂ thin films without the participation of any other minor phase. Structural and compositional analyses showed the structure of the films completely changes with annealing process. The measurements of transmittance and reflectance allowed us to calculate the band gap of films lying in 2.65 and 2.79 eV depending on annealing temperature. The changes in the structure with annealing process also modify the electrical properties of the films. The resistivity of the samples varied in between 2 × 10³ and 9 × 10⁶ (Ω-cm). The room temperature mobility depending on the increasing annealing temperature was in the range of 6.7–37 (cm² V⁻¹ s⁻¹) with the changes in carrier concentrations lying in 5.7 × 10¹³–2.5 × 10¹⁰ cm⁻³. Mobility-temperature dependence was also analyzed to determine the scattering mechanisms in the studied temperature range with annealing. The variations in the electrical parameters of the films were discussed in terms of their structural changes.     

Influence of low-temperature annealing on the properties of Y1Ba2Cu3O7−δ thin films

The influence of annealing at 180 °C on the structure, critical temperature, and electrical resistivity of Y₁Ba₂Cu₃O_7−δ thin films has been investigated. It is shown that films grown at reduced temperatures are sensitive to this annealing, which can substantially alter these film parameters. Pis’ma Zh. Tekh. Fiz. 24, 55–58 (January 12, 1998)     

Preparation and thermoelectric properties of BP films on SOI and sapphire substrates

The chemical vapor deposited (CVD) BP films on Si(100) (190 nm)/SiO _x (370 nm)/Si(100) (625 μm) (SOI) and sapphire (R-plane) (600 μm) substrates were prepared by the thermal decomposition of the B₂H₆–PH₃–H₂ system in the temperature range of 800–1050 °C for the deposition time of 1.5 h. The BP films were epitaxially grown on the SOI substrate, but a two-step growth method, i.e., a buffer layer at lower temperature and sequent CVD process at 1000 °C for 1.5 h was effective for obtaining a smooth film on the sapphire substrate. The electrical conduction types and electrical properties of these films depended on the growth temperature, gases flow rates and substrates. The thermal conductivity of the film could be replaced by the substrate, so that the calculated thermoelectric figure-of-merit (Z) for the BP films on the SOI substrate was 10⁻⁴–10⁻³/K at 700–1000 K. Those on the sapphire substrate were 10⁻⁶–10⁻⁵/K for the direct growth and 10⁻⁵–10⁻⁴/K for the two-step growth at 700–900 K, indicating that the film on a sapphire by two-step growth would reduce the defect concentrations and promote the electrical conductivity.     

Structural, optical, and electric properties of BNT–BT0.08 thin films processed by sol–gel technique

Thin films with the composition [(Bi_0.5Na_0.5)TiO₃]_0.92–[BaTiO₃]_0.08 (hereafter BNT–BT_0.08) were deposited on Pt–Si by spin-coating from a stable sol precursor. The BNT–BT_0.08 film, crystallized on the Bi_0.5Na_0.5TiO₃ rhombohedral lattice, was obtained after annealing the film-gel at 700 °C. The films have a smooth surface (Rms = 2.76 nm) and grains with ferroelectric domains. The film showed a bandgap of 3.25 eV and a refractive index of 2.20 at a wavelength of 630 nm. The dielectric characteristics of BNT–BT_0.08 thin films were measured at room temperature and 10 kHz the dielectric constant (ε _r) was 243 and the loss tangent (tanδ) was 0.38. The remnant polarization (P _r) was 0.87 μC/cm² and the coercive field (E _c) was 220 kV/cm at 10 kHz and room temperature. The current density was approximately 2.7 × 10⁻⁵ A/cm² at low electric fields (100 kV/cm). BNT–BT_0.08 thin films shown piezoelectric properties (d _33eff = 100 pm/V) comparable to those of PZT thin films.     

Study of electrical and micro-structural properties of high-κ gate dielectric stacks deposited using pulse laser deposition for MOS capacitor applications

The electrical properties of hafnium oxide (HfO₂) gate dielectric as a metal–oxide–semiconductor (MOS) capacitor structure deposited using pulse laser deposition (PLD) technique at optimum substrate temperatures in an oxygen ambient gas are investigated. The film thickness and microstructure are examined using ellipsometer and atomic force microscope (AFM), respectively to see the effect of substrate temperatures on the device properties. The electrical J–V, C–V characteristics of the dielectric films are investigated employing Al–HfO₂–Si MOS capacitor structure. The important parameters like leakage current density, flat-band voltage (V_fb) and oxide-charge density (Q_ox) for MOS capacitors are extracted and investigated for optimum substrate temperature. Further, electrical studies of these MOS capacitors have been carried out by incorporating La₂O₃ into HfO₂ to fabricate HfO₂/La₂O₃ dielectric stacks at an optimized substrate temperature of 800 °C using a PLD deposition technique under oxygen ambient. These Al–HfO₂–La₂O₃–Si dielectric stacks MOS capacitor structure are found to possess better electrical properties than that of HfO₂ based MOS capacitors using the PLD deposition technique.     

Effects of post-deposition annealing temperature and ambient on RF magnetron sputtered Sm<Subscript>2</Subscript>O<Subscript>3</Subscript> gate on n-type silicon substrate

Samarium oxide (Sm₂O₃) thin films with thicknesses in the range of 15–30 nm are deposited on n-type silicon (100) substrate via radio frequency magnetron sputtering. Effects of post-deposition annealing ambient [argon and forming gas (FG) (90% N₂ + 10% H₂)] and temperatures (500, 600, 700, and 800 °C) on the structural and electrical properties of deposited films are investigated and reported. X-ray diffraction revealed that all of the annealed samples possessed polycrystalline structure with C-type cubic phase. Atomic force microscope results indicated root-mean-square surface roughness of the oxide film being annealed in argon ambient are lower than that of FG annealed samples, but they are comparable at the annealing temperature of 700 °C (Argon—0.378 nm, FG—0.395 nm). High frequency capacitance–voltage measurements are carried out to determine effective oxide charge, dielectric constant and semiconductor-oxide interface trap density of the annealed oxide films. Sm₂O₃ thin films annealed in FG have smaller amount of effective oxide charge and semiconductor-oxide interface trap density than those oxide films annealed in argon. Current–voltage measurements are conducted to obtain barrier heights of the annealed oxide films during Fowler–Nordheim tunneling.     

Chemical structure and electrical properties of sputtered HfO2 films on Si substrates annealed by rapid thermal annealing

The chemical structure and electrical properties of HfO₂ thin film grown by rf reactive magnetron sputtering after rapid thermal annealing (RTA) were investigated. The chemical composition of HfO₂ films and interfacial chemical structure of HfO₂/Si in relation to the RTA process were examined by X-ray photoelectron spectroscopy. Hf 4f and O 1s core level spectra suggest that the as-deposited HfO₂ film is nonstoichiometric and the peaks shift towards lower binding energy after RTA. The Hf-Si bonds at the HfO₂/Si interface can be broken after RTA to form Hf-Si-O bonds. The electrical characteristics of HfO₂ films were determined by capacitance-voltage (C-V) and current density-voltage (J-V) measurements. The results showed that the density of fixed charge and leakage current density of HfO₂ film were decreased after the RTA process in N₂ atmosphere.     

Current conduction mechanisms in HfO2 and SrHfON thin films prepared by magnetron sputtering

Metal–oxide–semiconductor (MOS) capacitors incorporating HfO₂ and SrHfON gate dielectrics were fabricated by magnetron sputtering. The interface quality, thermal stability, and electrical properties of the MOS capacitors have been investigated. Compared to HfO₂ dielectric film, SrHfON dielectric film has thin interface layer with Si substrate, good thermal stability, and low leakage current densities. The dominant current conduction mechanisms (CCMs) of HfO₂ film are Schottky emission or Poole–Frenkel emission at low and high electric fields. The main CCMs of SrHfON film are Schottky emission or Poole–Frenkel emission at low electric field, whereas, the CCMs are replaced by space charge limited current at high electric field.     

Electrical and optical properties of InSbSe<Subscript>3</Subscript> amorphous thin films

Electrical conductivity, I–V characteristics and optical properties are investigated for InSbSe₃ amorphous thin films of different thicknesses prepared by thermal evaporation at room temperature. The composition of both the synthesized material and thin films were checked by energy dispersive X-ray spectroscopy (EDX). X-ray analysis indicated that all samples under investigation have amorphous structure. The dc electrical conductivity was measured in the temperature range (303–393 K) and thickness range (149–691 nm). The activation energy ΔE _σ was found to be independent of film thickness in the investigated range. The obtained I–V characteristic curves for the investigated samples are typical for memory switches. The switching voltage increases linearly with film thickness in the range (113–750 nm), while it decreases exponentially with temperature in the range (303–393 K). The switching process can be explained according to an electrothermal process initiated by Joule-heating of the current channel. Measurements of transmittance and reflectance in the spectral range (400–2,500 nm) are used to calculate optical constants (refractive index n and absorption index k). Both n and k are practically independent of film thickness in the investigated range (149–691 nm). By analysis of the refractive index n the high frequency dielectric constant ε_∞ was determined via two procedures and was found to have the values of 9.3 and 9.15. Beyond the absorption edge, the absorption is due to allowed indirect transitions with energy gap of 1.46 eV independent on film thickness in the investigated range.