Multistage decoding of multilevel block M-PSK modulationcodes and its performance analysis

Multistage decoding of multilevel block multilevel phase-shift keying (M-PSK) modulation codes for the additive white Gaussian noise (AWGN) channel is investigated. Several types of multistage decoding, including a suboptimum soft-decision decoding scheme, are devised and analyzed. Upper bounds on the probability of an incorrect decoding of a code are derived for the proposed multistage decoding schemes. Error probabilities of some specific multilevel block 8-PSK modulation codes are evaluated and simulated. The computation and simulation results for these codes show that with multistage decoding, significant coding gains can be achieved with large reduction in decoding complexity. In one example, it is shown that the difference in performance between the proposed suboptimum multistage soft-decision decoding and the single-stage optimum decoding is small, only a fraction of a dB loss in SNR at the block error probability of 10^-6     

线性分组码与时空分组码级联的迭代译码

提出了线性分组码与时空分组码的级联编码方案,推导了时空分组码在比特级上的软输入软输出译码算法,进而给出了在线性分组码和时空分组码之间进行迭代译码的算法。仿真结果表明这种方案与现有方案相比在能够获得最大分集增益的同时还能获得更大的编码增益。     

满速率串行级联空时分组MTCM编码方法研究

该文研究了级联空时编码系统在编码增益,分集增益和传输能量效率的限定下最大化传输速率的问题,提出了一种在保留TCM编码方法校验位冗余的同时,还可获得满速率串行级联空时分组TCM编码方法。新方法通过引入具有不同功率分集因子的正交发射码字矩阵,并给出新的译码算法,从而使得新的编码方法在获得满速率的同时还可以获得满分集增益。分析和MATLAB仿真结果表明,在相同的编码状态数下,新方法在编码增益上比现有的满速率超正交空时分组编码方法提高1dB左右。     

Probabilistic construction of large constraint length trellis codesfor sequential decoding

Probabilistic algorithms are given for constructing good large constraint length trellis codes for use with sequential decoding that can achieve the channel cutoff rate bound at a bit error rate (BER) of 10^-5-10^-6. The algorithms are motivated by the random coding principle that an arbitrary selection of code symbols will produce a good code with high probability. One algorithm begins by choosing a relatively small set of codes randomly. The error performance of each of these codes is evaluated using sequential decoding and the code with the best performance among the chosen set is retained. Another algorithm treats the code construction as a combinatorial optimization problem and uses simulated annealing to direct the code search. Trellis codes for 8 PSK and 16 QAM constellations with constraint lengths v up to 20 are obtained. Simulation results with sequential decoding show that these codes reach the channel cutoff rate bound at a BER of 10^-5-10^-6 and achieve 5.0-6.35 dB real coding gains over uncoded systems with the same spectral efficiency and up to 2.0 dB real coding gains over 64 state trellis codes using Viterbi decoding     

On combined equalization and decoding of multilevel codedmodulation

We describe an approach to combined equalization and decoding of multilevel block-coded modulation. This approach has better performance than conventional, concatenated equalization and decoding. The proposed structure uses a simple iterative scheme to decode and equalize multilevel block-coded modulation based on decision feedback. We show via computer simulation that the combined scheme gives a performance gain of up to 0.8 dB at a bit-error rate of 10^-4     

Low complexity concatenated coding schemes for digital satellite communications

A study of reduced complexity concatenated coding schemes, for commercial digital satellite systems with low-cost earth terminals, is reported. The study explored trade-offs between coding gain, overall rate and decoder complexity, and compared concatenated schemes with single codes. It concentrated on short block and constraint length inner codes, with soft decision decoding, concatenated with a range of Reed-Solomon outer codes. The dimension of the inner code was matched to the outer code symbol size, and appropriate interleaving between the inner and outer codes was used. Very useful coding gains were achieved with relatively high-rate, low-complexity schemes. For example, concatenating the soft decision decoded (9,8) single parity check inner code with the CCSDS recommended standard Reed-Solomon outer code gives a coding gain of 4.8dB at a bit error probability of 10^?5, with an overall rate of 0-78.     

Incremental frequency, amplitude and phase tracker (IFAPT) forcoherent demodulation over fast flat fading channels

The incremental frequency amplitude and phase tracker (IFAPT) is a recursive algorithm that estimates the parameters of piecewise-linear approximation to assumed continuous narrow-band signals. The parameters are amplitude, phase, and their respective slopes. The simple, recursive nature of IFAPT enables its direct interaction with recursive algorithms, such as the Viterbi and the BCJR in the APP SISO module, used for iteratively decoding concatenated codes. An augmented APP (A ²P²)-module, containing IFAPT and BCJR algorithms, is here applied to iterative decoding serial concatenated convolutional codes under Rayleigh fading conditions with diversity reception. The bit-error rate under Rayleigh fading with dual diversity reception at E _bT/N₀=6 dB and f_dT_s=10^-2 is 10^-4, where E _bT is the total mean energy per bit in both diversity branches, f_d is the Doppler frequency, and T_s the symbol time     

Multilevel trellis coded modulations for the Rayleigh fadingchannel

The authors present coded 8-phase-shift-keyed (8-PSK) modulations for the Rayleigh fading channel. The schemes are based on multilevel trellis-coded-modulation constructions and utilize maximum free Hamming distance binary convolutional codes as building blocks. A suboptimal multistage decoder that utilizes interstage interleaving and iterative decoding is proposed and evaluated. Examples are constructed to show that the proposed schemes outperform the best modified codes of the Ungerboeck type due to significantly higher implicit time diversity, yielding seven branches of built-in time diversity, whereas the Ungerboeck code yields four branches of time diversity for a 64-state system. The transmission delay is higher, however. The new schemes can provide three levels of unequal error protection when 8-PSK or 8-differential-phase-shift-keying (8-DPSK) modulations are used. They provide 10-14-dB channel signal-to-noise ratio gain over uncoded 4-DPSK at a bit error rate of 10^-3 for a modest decoding complexity     

On multilevel codes and iterative multistage decoding

This paper develops an approach to iterative multistage decoding of multilevel codes. This involves passing reliability information to previous and subsequent decoders instead of only hard decisions to subsequent decoders. The paper also develops an adaptive version of the suboptimal soft output decoding algorithm of Picart and Pyndiah (1996). This adaptive algorithm provides a gain of approximately 0.24 dB at a bit error rate (BER) of 10^-5 after four iterations and approximately 0.43 dB after ten iterations over the algorithm of Picart et al. If the adaptive algorithm is used in conjunction with iterative multistage decoding then a gain of approximately 0.62 dB is obtained at a BER of 10^-5 after four iterations and approximately 0.9 dB after ten iterations over the algorithm of Picart et al     

Multistage recursive interleaver for turbo codes in DS-CDMA mobileradio

A multistage recursive block interleaver (MIL) is proposed for the turbo code internal interleaver. Unlike conventional block interleavers, the MIL repeats permutations of rows and columns in a recursive manner until reaching the final interleaving length. The bit error rate (BER) and frame error rate (FER) performance with turbo coding and MIL under frequency-selective Rayleigh fading are evaluated by computer simulation for direct-sequence code-division multiple-access mobile radio. The performance of rate-1/3 turbo codes with MIL is compared with pseudorandom and S-random interleavers assuming a spreading chip rate of 4.096 Mcps and an information bit rate of 32 kbps. When the interleaving length is 3068 bits, turbo coding with MIL outperforms the pseudorandom interleaver by 0.4 dB at an average BER of 10^-6 on a fading channel using the ITU-R defined Vehicular-B power-delay profile with the maximum Doppler frequency of f_D = 80 Hz. The results also show that turbo coding with MIL provides superior performance to convolutional and Reed-Solomon concatenated coding; the gain over concatenated coding is as much as 0.6 dB     

一种基于分段CRC码级联Hash极化码的设计

极化码作为一种线性分组码，具有较低的编码复杂度和确定的构造，但当其为中短码长时，性能会有所降低。提出一种基于分段循环冗余校验（cyclic redundancy check，CRC）码级联Hash极化码的设计方法，该方法在原有Hash极化码（Hash-Polar）的基础上，采用CRC分段校验进行双校验，分段CRC码在译码过程中能辅助路径度量，即对译码路径进行修饰，以此提高路径选择的可靠性，提高性能；另外，分段校验是将校验码分散地添加到输入的信息序列中，译码时对于CRC不通过的情况，可提前终止译码路径以省去不必要的译码计算量。最后，译码结束时，Hash校验码对修饰后的L条路径进行校验，选出最佳译码路径。仿真结果表明，所提出的设计方法比 CRC 辅助的 Hash 极化码（Hash-CRC-Polar）误码性能更优异。在高斯信道下，当码长为 128 bit、码率为 1/2、误码率为 10^-3时，所提出的基于分段 CRC 校验码的 Hash 极化码比Hash-CRC-Polar获得了约0.25 dB的增益。     

Bandwidth efficient parallel concatenated coding schemes

The authors propose a solution to the parallel concatenation of trellis codes with multilevel amplitude/phase modulations and a suitable iterative decoding structure. Examples are given for throughputs 2bit/s/Hz with 8PSK and 16QAM signal constellations. For parallel concatenated trellis codes in the examples, rate 2/3 and 4/5, 16-state binary convolutional codes with Gray code mapping are used. The performances of these codes are within 1 dB of the Shannon limit at a bit error probability of 10^-6 for a given throughput. This outperforms all codes reported in the past for the same throughput     

Error-Correcting Codes Against the Worst-Case Partial-Band Jammer

This paper provides performance analyses of a broad spectrum of error-correcting codes in an antijam communication system under worst-case partial-band noise jamming conditions. These analyses demonstrate the coding advantages available for systems operating with and without frequency diversity. Utilizing both the exact approach (where possible) and upper-bounding approaches (Chernoff and union bounds), the decoded bit error rates for typical error-correcting codes (binary andM-ary, block and convolutional) have been obtained, and these codes have been compared according to theE_{b}/N_{0}required to achieve a bit error rate of 10^-5. The best performance is achieved with the use ofM-ary signaling and optimum diversity withM-ary codes, such as Reed-Solomon block codes, dual-kconvolutional codes, convolutional orthogonal codes, or concatenated codes.     

VLSI architectures for turbo codes

A great interest has been gained in recent years by a new error-correcting code technique, known as “turbo coding”, which has been proven to offer performance closer to the Shannon's limit than traditional concatenated codes. In this paper, several very large scale integration (VLSI) architectures suitable for turbo decoder implementation are proposed and compared in terms of complexity and performance; the impact on the VLSI complexity of system parameters like the state number, number of iterations, and code rate are evaluated for the different solutions. The results of this architectural study have then been exploited for the design of a specific decoder, implementing a serial concatenation scheme with 2/3 and 3/4 codes; the designed circuit occupies 35 mm², supports a 2 Mb/s data rate, and for a bit error probability of 10^-6, yields a coding gain larger than 7 dB, with ten iterations     

Experimental Demonstration of Concatenated LDPC and RS Codes by FPGAs Emulation

The concatenation of low-density parity-check and Reed-Solomon codes for forward error correction has been experimentally demonstrated for the first time in this letter. Using a 2-bit soft-decision large-scale integration and high-speed field-programmable gate arrays, a net coding gain of 9.0 dB was achieved with 20.5% redundancy with four iterative decoding for an input bit-error rate of 8.9 times 10^-3 at 31.3 Gb/s.     

A New Concatenated Coding SystemUsing Multilevel Inner Codes

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Multiple serial and parallel concatenated single parity-check codes

Single parity-check (SPC) codes are applied in both parallel and serial concatenated structures to produce high-performance coding schemes. The number of concatenations or stages, M, is increased to improve system performance at moderate-to-low bit-error rates without changing the overall code parameters (namely, code rate and code block length). Analytical bounds are presented to estimate the performance at high signal-to-noise ratios. The SPC concatenated codes are considered with binary phase-shift keying and with 16-quadrature amplitude modulation bit-interleaved coded modulation on the additive white Gaussian noise channel and the independent Rayleigh fading channel. Simulations show that the four-stage serial or parallel concatenated SPC codes can, respectively, outperform or perform as well as 16-state turbo codes. Furthermore, decoding complexity is approximately 9-10 times less complex than that of 16-state turbo codes. The convergence behavior of both serial and parallel concatenated SPC codes is also discussed.     

Efficient soft-in-soft-out sub-optimal decoding rule for singleparity check codes

The authors present an efficient, sub-optimal, soft-in-soft-out decoding rule for single parity check (SPC) codes, which requires only three addition-equivalent-operations per information bit. Its application is demonstrated by the simulation results of a rate 5/6 four-dimensional concatenated SPC code, for which performance of BER=10 ^-5 at E_h/N₀=3.5 dB is observed, which is only ~1.2 dB from the theoretical limit     

A new series of concatenated codes subject to matrix type-Bcodes

Some important aspects of a series of concatenated codes subjected to matrix type-Bcodes are investigated. Concatenated matrix codes and the concatenated quadratic residue codes especially are emphasized. An analysis of the error patterns, which can be corrected with the matrix coding, also is given. These codes are suitable for compound channels with memory (i.e., channels on which burst, cluster, and random errors occur). Explicit formulas are given for the number of bursts, cluster, and random errors that can be corrected with these codes. Decoding schemes and techniques for studying error propagation in the proposed codes are given. In particular a new decoding algorithm for a concatenated matrix code is given. The performance of coding and decoding schemes of the various types of concatenated codes can be tested in practice.     

Channel coding for satellite mobile channels

The deployment of channel coding and interleaving to enhance the bit-error performance of a satellite mobile radio channel is addressed for speech and data transmissions. Different convolutional codes (CC) using Viterbi decoding with soft decision are examined with inter-block interleaving. Reed-Solomon (RS) codes with Berlekamp-Massey hard decision decoding or soft decision trellis decoding combined with block interleaving are also investigated. A concatenated arrangement employing RS and CC coding as the outer and inner coders, respectively, is used for transmissions via minimum shift keying (MSK) over Gaussian and Rayleigh fading channels. For an interblock interleaving period of 2880 bits, a concatenated arrangement of an RS(48,36). over the Galois field GF(256) and punctured PCC(3,1,7) yielding an overall coding rate of 1/2, provides a coding gain of 42dB for a BER of 10^?6, and an uncorrectable error detection probability of 1–10^?9.