Board level solder joint reliability analysis and optimization of pyramidal stacked die BGA packages

Due to requirements of cost-saving and miniaturization, stacked die BGA has recently gained popularity in many applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of wirebond stacked die BGA is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux's approach with non-linear viscoplastic analysis of solder joints. The critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house TFBGA (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyses are performed to study the effects of 16 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, smaller top and bottom dice sizes, thicker top or bottom die, thinner PCB, thicker substrate, higher solder ball standoff, larger solder mask opening size, smaller maximum ball diameter, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. The effect of number of layers of stacked-die is also investigated. Finally, design optimization is performed based on selected critical design variables.     

Thermal cycling analysis of flip-chip solder joint reliability

The reliability concern in flip-chip-on-board (FCOB) technology is the high thermal mismatch deformation between the silicon die and the printed circuit board that results in large solder joint stresses and strains causing fatigue failure. Accelerated thermal cycling (ATC) test is one of the reliability tests performed to evaluate the fatigue strength of the solder interconnects. Finite element analysis (FEA) was employed to simulate thermal cycling loading for solder joint reliability in electronic assemblies. This study investigates different methods of implementing thermal cycling analysis, namely using the "dwell creep" and "full creep" methods based on a phenomenological approach to modeling time independent plastic and time dependent creep deformations. There are significant differences between the "dwell creep" and "full creep" analysis results for the flip chip solder joint strain responses and the predicted fatigue life. Comparison was made with a rate dependent viscoplastic analysis approach. Investigations on thermal cycling analysis of the temperature range, (ΔT) effects on the predicted fatigue lives of solder joints are reported     

Board level investigation of BGA solder joint deformation strength

In this paper we present a method to determine the stress in BGA solder joints on complex, real assembled circuit boards.To be able to investigate the mechanical effects of post-reflow assembly within the solder joints of BGA components, it is necessary to undertake a mechanical investigation at board level by taking into consideration the effect of the adjacent components and the interconnection layer layouts.In our project, we have developed a method of how to investigate the board level deformation strength of BGA joints. The elastic properties of a real assembled circuit board and of a circuit bare board are measured; an FEM model is then created, both of the bare board and of the assembled printed circuit board taking into account the layout of the interconnection layers. The advantage of this PCB FEM model is that the deformation of a PCB of any size and for any load can be calculated quickly using any ordinary computer. In our project, we also have created another detailed FEM model for the BGA solder joints.Using the constructed FEM models, we are able to determine the stress in BGA solder joints on a real electronic product for a typical type of load (i.e. bending of PCB) thereby verifying our method. Since the simulated results correspond well to previous literature written on this topic, we consider that our method is appropriate for calculating stress in the solder joints of multi-lead components on complex, fully assembled circuit boards.     

Random vibration reliability of BGA lead-free solder joint

Solder joint fatigue failure under vibration loading has been a great concern in microelectronic industry. High-cycle fatigue failure of lead-free solder joints has not been adequately addressed, especially under random vibration loading. This study aims to understand the lead-free solder joint behavior of BGA packages under different random vibration loadings. At first, non-contact TV Laser holography technology was adopted to conduct experimental modal analysis of the test vehicle (printed circuit board assembly) in order to understand its dynamic characteristics. Then, its first order natural frequency was used as the center frequency and narrow-band random vibration fatigue tests with different kinds of acceleration power spectral density (PSD) amplitudes were respectively carried out. Electrical continuity through each BGA package is monitored during the vibration event in order to detect the failure of package-to-board interconnects. The typical dynamic voltage histories of failed solder joints were obtained simultaneously. Thirdly, failed solder joints were cross-sectioned and metallurgical analysis was applied to investigate the failure mechanisms of BGA lead-free solder joints under random vibration loading. The results show that the failure mechanisms of BGA lead-free solder joint vary as the acceleration PSD amplitude increases. Solder joint failure locations are changed from the solder bump body of the PCB side to the solder ball neck, finally to the Ni/intermetallic compound (IMC) interface of the package side. The corresponding failure modes are also converted from ductile fracture to brittle fracture with the increase of vibration intensity.     

Experimental and numerical analysis of BGA lead-free solder joint reliability under board-level drop impact

Board-level solder joint reliability is very critical for handheld electronic products during drop impact. In this study, board-level drop test and finite element method (FEM) are adopted to investigate failure modes and failure mechanisms of lead-free solder joint under drop impact. In order to make all ball grid array (BGA) packages on the same test board subject to the uniform stress and strain level during drop impact, a test board in round shape is designed to conduct drop tests. During these drop tests, the round printed circuit board assembly (PCBA) is suffered from a specified half-sine acceleration pulse. The dynamic responses of the PCBA under drop impact loading are measured by strain gauges and accelerometers. Locations of the failed solder joints and failure modes are examined by the dye penetration test and cross section test. While in simulation, FEM in ABAQUS software is used to study transient dynamic responses. The peeling stress which is considered as the dominant factor affecting the solder joint reliability is used to identify location of the failed solder joints. Simulation results show very good correlation with experiment measurement in terms of acceleration response and strain histories in actual drop test. Solder joint failure mechanisms are analyzed based on observation of cross section of packages and dye and pry as well. Crack occurred at intermetallic composite (IMC) interface on the package side with some brittle features. The position of maximum peeling stress in finite element analysis (FEA) coincides with the crack position in the cross section of a failed package, which validated our FEA. The analysis approach combining experiment with simulation is helpful to understand and improve solder joint reliability.     

BGA混合焊点热循环负载下的可靠性研究

焊料从有铅向无铅转换中,不可避免会遇到二者混合使用的情况,有必要对生成的混合焊点进行可靠性研究。通过对不同工艺参数下形成的混合焊点和无铅焊点进行了外观检测、X射线检测和温度循环测试。结果显示,只要工艺参数控制得当,混合焊点是可行的。在焊球合金、焊料合金、峰值温度、液相线以上时间和焊接环境五个关键因素中,前四项对焊点可靠性比较重要,焊接环境对焊点可靠性的影响不很显著。     

Evaluation of solder joint reliability in flip-chip packages during accelerated testing

The microstructural investigation and thermomechanical reliability evaluation of the Sn-3.0Ag-0.5Cu solder bumped flip-chip package were carried out during the thermal shock test of the package. In the initial reaction, the reaction product between the solder and Cu mini bump of chip side was Cu₆Sn₅ intermetallic compound (IMC) layer, while the two phases which were (Cu,Ni)₆Sn₅ and (Ni,Cu)₃Sn₄ were formed between the solder and electroless Ni-P layer of the package side. The cracks occurred at the corner solder joints after the thermal shocks of 400 cycles. The primary failure mechanism of the solder joints in this type of package was confirmed to be thermally-activated solder fatigue failure. The premature brittle interfacial failure sometimes occurred in the package side, but nearly all of the failed packages showed the occurrence of the typical fatigue cracks. The finite-element analyses were conducted to interpret the failure mechanisms of the packages, and revealed that the cracks were induced by the accumulation of the plastic work and viscoplastic shear strains.     

Assessment of acceleration models used for BGA solder joint reliability studies

Solder joint reliability was one of the top priorities when evaluating the reliability of electronic packages. In general, an acceleration model would be used to predict solder joint fatigue life in the use conditions. However, the accuracy of the model was difficult to validate. As a result, the fatigue life of the solder joints could be over-designed with added cost or time, or under-estimated with a compromised reliability performance. It was an important goal for engineers to use valid and accurate life models to predict the field life of the solder joints and reduce development cost and time.Many empirical models including Norris-Landzberg model and its modifications usually considered the effects of temperature range, the cycle frequency, and the maximum temperature. No matter what the package structures were or the materials were used, engineers had been using the same model parameters for many years. Moreover, little was done to validate the models for modern packages structures and materials.In this article, a variety of package was studied and the failure data was analyzed through a reliability engineering approach. The results showed that the available model parameters were not suitable to predict the solder joint life of test samples exclusively. A new set of model parameters might be required for certain cases. Also, the acceleration factor models would depend on the solder joint materials and microstructures. The solder joint fatigue life performance was too complicated to be assumed as a fixed empirical model. One of the reasons was there were too many factors affecting the strain which the solder joints would endure.In the future study, critical factors such as materials or structures could be integrated into the current model format. Additionally, the ramp rate could be a concern especially when dealing with cases under thermal shock conditions. The methodology to develop an acceleration factor model and the demonstration of their weakness would help achieve reliable solder connections in the future.     

Packaging parameter analysis and optimization design on solder joint reliability for twin die stacked packages by variance in strain energy density (SED) of each solder joint

In accordance with vigorous development of the electronic product market as well as the consumers’ preference for smaller scales, the structure of 3D stacked die package rapidly becomes popular. Hereafter the stacked process of the silicon dies always makes the coupling effect among materials more complicated. Such an issue has been seriously paid attention to and becomes a critical problem to be solved for the product reliability. In this paper, the ANSYS software is adopted to analyze a twin die stacked package under a cyclic thermal loading condition. The viscoplastic finite element analysis and the Darveaux theory are applied to investigate the solder joint reliability (SJR) of the stacked die package. This research will verify a significant dependence between the solder joint fatigue life of the stacked die package and the distribution of the accumulated strain energy density (SED) on the solder joints by proposing a viewpoint of the variance of the strain energy density among solder joints for a 3D-Slice model.     

Board level solder joint reliability modeling and testing of TFBGA packages for telecommunication applications

For thin-profile fine-pitch BGA (TFBGA) packages, board level solder joint reliability during the thermal cycling test is a critical issue. In this paper, both global and local parametric 3D FEA fatigue models are established for TFBGA on board with considerations of detailed pad design, realistic shape of solder joint, and nonlinear material properties. They have the capability to predict the fatigue life of solder joint during the thermal cycling test within ±13% error. The fatigue model applied is based on a modified Darveaux’s approach with nonlinear viscoplastic analysis of solder joints. A solder joint damage model is used to establish a connection between the strain energy density (SED) per cycle obtained from the FEA model and the actual characteristic life during the thermal cycling test. For the test vehicles studied, the maximum SED is observed at the top corner of outermost diagonal solder ball. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house BGA thermal cycling test data. Subsequently, design analysis is performed to study the effects of 14 key package dimensions, material properties, and thermal cycling test condition. In general, smaller die size, higher solder ball standoff, smaller maximum solder ball diameter, bigger solder mask opening, thinner board, higher mold compound CTE, smaller thermal cycling temperature range, and depopulated array type of ball layout pattern contribute to longer fatigue life.     

回流焊峰值温度对混装BGA焊点的影响研究

针对当前大量使用有铅焊料焊接无铅BGA的实际现状,通过调控有铅制程回流曲线的峰值温度,研究其对混装BGA焊点坍塌高度、空洞率及微观组织的影响。结果表明,峰值温度从210℃提升至225℃,无铅BGA焊球能够全部充分坍塌且高度保持一致;峰值温度为210℃时,混合焊点内的空洞率最低,随着峰值温度的升高,空洞尺寸和空洞率均有所增加;峰值温度为215℃时的微观组织最细小且尺寸分布最均匀,继续提升峰值温度,微观组织尺寸会随之增大。因此使用有铅焊料焊接无铅BGA的最佳峰值温度为215℃,与有铅制程保持一致。     

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Wafer level packaging (WLP) has many advantages, such as ease of fabrication and reduced fabrication cost. However, solder joint reliability of traditional WLPs is the weakest point of the technology. In this paper, a 0.4 mm pitch Cu post type WLP has been developed for mobile computing application. The Cu post type WLP has 440 I/Os and 12 × 12 mm die size. The initial design WLP has been fabricated and subjected to a thermal cycling (TC) testing. The failure life of the original WLP under TC was 296 cycles. This paper also presents a nonlinear finite element analysis of the board level solder joint reliability and methods for enhancement of the WLP. A viscoplastic constitutive relation is adopted for the solder joints to account for its time and temperature dependence in TC. The fatigue life of the solder joint is estimated by the modified Coffin–Manson equation. The two coefficients in the modified Coffin–Manson equation are also determined. A series of parametric studies are performed by changing the passivation (PI) thickness, redistribution layer (RDL) thickness, polymer height (Cu post height accordingly varies), die thickness, PCB thickness, and PCB CTE. The results obtained from the modeling are useful to formulate design guidelines for board level reliability enhancement of the WLP.     

Interfacial reaction and joint reliability of fine-pitch flip-chip solder bump using stencil printing method

This study was focused on the formation and reliability evaluation of solder joints with different diameters and pitches for flip chip applications. We investigated the interfacial reaction and shear strength between two different solders (Sn-37Pb and Sn-3.0Ag-0.5Cu, in wt.%) and ENIG (Electroless Nickel Immersion Gold) UBM (Under Bump Metallurgy) during multiple reflow. Firstly, we formed the flip chip solder bumps on the Ti/Cu/ENIG metallized Si wafer using a stencil printing method. After reflow, the average solder bump diameters were about 130, 160 and 190 μm, respectively. After multiple reflows, Ni₃Sn₄ intermetallic compound (IMC) layer formed at the Sn-37Pb solder/ENIG UBM interface. On the other hand, in the case of Sn-3.0Ag-0.5Cu solder, (Cu,Ni)₆Sn₅ and (Ni,Cu)₃Sn₄ IMCs were formed at the interface. The shear force of the Pb-free Sn-3.0Ag-0.5Cu flip chip solder bump was higher than that of the conventional Sn-37Pb flip chip solder bump.     

SnAgCu体钎料及BGA焊球焊点纳米级力学性能

为了研究低银Sn-0.3Ag-0.7Cu无铅体钎料、BGA焊料小球和BGA焊点的力学行为,基于物理反分析的方法采用纳米压痕仪对其进行实验。从压痕载荷–深度曲线提取出弹性模量、硬度和蠕变速率敏感指数。结果表明:体钎料的杨氏模量和蠕变速率敏感指数大约是BGA焊料小球和BGA焊点的2.5倍,验证了尺寸效应理论。采用纳米压痕仪测出的体钎料维氏硬度(15.101HV)小于显微硬度计的测量结果(20.660HV)。     

Influence of current density on mechanical reliability of Sn-3.5Ag BGA solder joint

In this study, we investigated the effect of the current density on the interfacial reaction and mechanical reliability of an electroless Ni/immersion Au (ENIG) substrate with Sn-3.5Ag solder. We first evaluated the interfacial reactions of the solder joint under aging for up to 800 h and current stressing with current densities of 3 × 10² A/cm² and 5 × 10³ A/cm². Also, we successfully revealed the correlation between the interfacial reaction behavior and mechanical reliability under current stressing. With increasing aging time, the thickness of the Ni₃Sn₄ layer increased. At both low and high current densities, the thickness of the Ni₃Sn₄ layer increased up to 400 h and decreased thereafter at the cathode, while that of the IMC increased up to 800 h at the anode. After the die shear test, the ductile fracture was observed in the as-reflowed joint without current stressing. The fracture mode changed from ductile fracture to brittle fracture when thermal aging and current flow were simultaneously applied. The combination of the current stressing and isothermal aging at high temperature significantly deteriorated the mechanical reliability of the solder joint.     

热疲劳载荷作用下不同成分BGA互连焊点可靠性研究

本文针对微电子组装中常见的BGA 封装形式,对比采用三种不同成分的BGA焊球和焊膏组合（锡铅共晶焊球和锡铅共晶焊膏、Sn3Ag0.5Cu 焊球和锡铅共晶焊膏、以及Sn3Ag0.5Cu焊球和Sn3Ag0.5Cu焊膏）焊接得到的BGA 互连点,经过不同周期的热疲劳试验后,在金相显微镜和电子背散射衍射下观察,发现Sn3Ag0.5Cu焊球和锡铅共晶焊膏混装形成的BGA焊点中黑色的富锡相均匀弥散分布在焊球内,在热循环载荷作用下极难形成再结晶,抗热疲劳性能最好。     

无铅过渡时期混合焊点可靠性研究进展

在电子产品向无铅化过渡时期,存在前向兼容和后向兼容混合焊点的可靠性问题,对相关的理论和实验研究进行了综述。重点介绍了后向兼容组装中再流温度曲线的设置、焊点合金成分的计算及液相线温度的估算。简要介绍了前向兼容焊点的可靠性,认为一般情况下其可靠性可被接受。     

球栅阵列器件焊接合格率预测及缺陷分析

应用数理统计结合工艺设计、制造工艺控制参数等因素及Surface Evolver软件仿真技术的方法,建立球栅阵列(BGA)器件焊接合格率的预测模型,运用该模型可以找出影响焊接合格率的制约因素。结合仿真技术模拟焊点形态,可以找出造成焊点缺陷时各参数之间的关系并提出相应的解决方案,从而优化工艺设计及制造工艺控制参数。     

倒装焊复合SnPb焊点应变应力分析

近年来,在微电子工业中,轻、薄、短、小是目前电子封装技术发展的趋势。因此,倒装焊技术应用越来越广,而焊点的可靠性在倒装焊技术中变得越来越重要。采用有限元软件,模拟、分析了焊点高度和下填料对焊点在热载荷作用下的应力应变值。     

Dynamic responses and solder joint reliability under board level drop test

Board level solder joint reliability during drop test is a great concern to semiconductor and electronic product manufacturers. In this paper, the comprehensive dynamic responses of printed circuit boards (PCBs) and solder joints, e.g., acceleration, strains, and resistance, are measured and analyzed in detail with a multi-channel real-time electrical monitoring system. Control and monitoring of dynamic responses are very important to ensure consistent test results and understand the mechanical behaviors, as they are closely related to the solder joint failure mechanism. The effects of test variables, such as drop height, number of PCB mounting screws, tightness of screws, and number of felt layer, are studied by comparing and analyzing the dynamic responses. A good repeatability of testing can only be achieved when careful attentions are paid on these factors. The relationships among drop height, peak acceleration, pulse duration, and impact energy are unique for a drop tester, and therefore, it should be characterized prior to the reliability tests. The studies also help to determine the requirements of new impact pulse quickly. The bending mode shapes and frequencies of PCB are extracted from dynamic strains and images token by high-speed camera. A real-time dynamic resistance monitoring method is developed to study the solder joint reliability. The solder joint failure process, i.e. crack initiation, propagation, and opening, is well understood from the behavior of dynamic resistance. It is found experimentally that the mechanical shock causes multiple PCB bending or vibration which induces the solder joint crack failure. Cyclic changes of dynamic resistance indicate that the solder joint crack opens and closes when PCB bends up and down.