基于射频收发芯片nRF403的无线接口电路设计

文章介绍了采用单片射频收发芯片nRF4 0 3和MAX2 32A接口芯片构成的无线接口电路 ,工作频率 315 / 4 33MHz ,发射功率 + 10dBm ,接收灵敏度 - 10 5dBm ,数据速率 2 0kbit/s。     

基于射频收发芯片nRF903的无线数传模块设计

介绍采用单片射频收发器nRF903、MSP430F11221微控制器和75LV4737A接口芯片构成的无线数传模块,工作频率915MHz,发射功率+10dBm,接收灵敏度-100dBm,数据速率76.8kbit/s。     

频率为700MHz～1GHz的FSK收发器芯片MICRF500 的原理与应用

MICRF500是Micrel公司推出的低功耗单片FSK无线电收发芯片。它的工作频率范围为700MHz～1GHz,接收灵敏度为 -104dBm ,RF输出功率为10dBm。该芯片内含接收、发射和控制接口三部分。文中介绍了MICRF500的结构、原理和特性 ,给出了它的具体应用电路     

基于ARM的功率放大器控制系统设计

针对发射机射频链路中功率放大器工作状态不稳定的问题,文中对射频链路的工作原理进行了研究,设计功放的控制系统。系统使用基于ARM架构的STM32F103ZG芯片作为主控芯片,可以通过TTL接口实现功放工作状态的实时采集。采集的功放工作状态经上位机程序分析后,结合发射机的指标参数下发功放的控制指令并调整功放的工作状态。测试结果表明,系统在输入功率为15.9 dBm时,达到1 dB压缩点-11.8 dBm;在25.7 dBm时,达到输出的三阶节点,此时的输入三阶节点为-2.7 dBm。以上结果证明该设计可以满足发射机的指标要求。     

基于A7102C的CAN总线接口微功率数传电台

设计一种由STM32处理器和A7102C无线收发芯片组成的CAN总线接口数传电台。介绍了电台的结构、软硬件的设计原理,并给出了硬件的原理图;实验表明,电台发射功率为14.9dBm,接收灵敏度为-110dBm,实测有效通信距离能达到1.2km,满足小尺寸、低成本、远距离的设计要求。     

测量频率至40GHz的USB接口宽带功率探头

R＆SNRPZ851NR＆SNRP-Z86是两款USB接口的功率探头，通过USB接口连接至PC就可工作，测量频率范围50MHzN40GHZ。这种高效而经济的解决方案可显示的包络功率动态范围为一47dBm至＋20dBm。     

一种多接口电平输出频率综合器设计

针对目前不同芯片和设备之间接口电平标准不一样的问题,设计了一种多接口电平输出频率综合器。通过锁相环芯片产生1.6 GHz^3.2 GHz频段的信号,利用并行转串行芯片将锁相环产生的信号降频到FPGA能处理的频段,FPGA进行相应分频输出目标频率,最后通过电平转换电路调节信号的共差模电压实现目标电平输出。选择LVPECL、LVDS和+7 dBm 3种典型电平进行测试,测试结果表明,系统输出频率稳定,误差达到0.025%,转换电平的电压值误差最大为3.268 mV,满足系统设计要求。     

可编程RF收发器芯片CC1000的原理及应用

CC1000是Chipcon公司新推出的单片可编程RF收发芯片，该芯片集成了射频发射，射频接收，PLL合成，FSK调制／解调，可编程控制等多种功能，其频率范围为300MHz-1000MHz,灵敏度为－109dBm,可编程输出功率为－20－10dBm，数据速率可达19.2kBaud。文中给出了CC1000的结构，原理，特性及应用电路。     

一种FSK数字解调器的结构与芯片设计

设计了一种基于高性能频移键控(FSK)数字解调器的无线鼠标接收方芯片,该芯片整合了无线解调电路和接口控制电路,能够自动识别PS/2和USB接口。解调器采用一种新颖的全数字方案,包括抽取滤波器、数字锁相环(DPLL)、位时钟恢复和自动频率控制(AFC)等部分,可用于频移键控信号的解调。芯片采用SMIC0.35μmCMOS工艺流片,测试结果表明,解调器性能在Eb/No=8dB时,误码率为10-3,接收机灵敏度为-102dBm,同步范围≤±4.9%Rb(Rb为系统数据速率),AFC范围≤±32%Rb,这些特性完全符合无线鼠标接收机的要求。     

单片机软件模拟SPI接口的解决方案

SPI接口是一种同步串行通讯接口，具备SPI接口的外围芯片十分丰富，应用非常广泛。但是，具备SPI接口的单片机种类较少。介绍了一种基于单片机的模拟SPI接口的方法，使没有SPI接口的单片机扩展带有SPI接口的外围芯片成为现实。     

Broadband single- and double-balanced resistive HEMT monolithicmixers

A double-balanced (DB) 3-18 GHz and a single-balanced (SB) 2-16 GHz resistive HEMT monolithic mixer have been successfully developed. The DB mixer consists of a AlGaAs/InGaAs HEMT quad, an active LO balun, and two passive baluns for RF and IF. At 16 dBm LO power, this mixer achieves the conversion losses of 7.5-9 dB for 4-13 GHz RF and 7.5-11 dB for 3-18 GHz RF. The SB mixer consists of a pair of AlGaAs/InGaAs HEMT's, an active LO balun, a passive IF balun and a passive RF power divider. At 16 dBm LO power, this mixer achieves the conversion losses of 8-10 dB for 4-15 GHz RF and 8-11 dB for 2-16 GHz RF. The simulated conversion losses of both mixers are very much in agreement with the measured results. Also, the DB mixer achieves a third-order input intercept (IP₃) of +19.5 to +27.5 dBm for a 7-18 GHz RF and 1 GHz IF at a LO drive of 16 dBm while the SB mixer achieves an input IP ₃ of +20 to +28.5 dBm for 2 to 16 GHz RF and 1 GHz IF at a 16 dBm LO power. The bandwidth of the RF and LO frequencies are approximately 6:1 for the DB mixer and 8:1 for the SB mixer. The DB mixer of this work is believed to be the first reported DB resistive HEMT MMIC mixer covering such a broad bandwidth     

Efficient direct locking of colliding pulse mode-locked lasers on semi-insulating substrate at 1.5 /spl mu/m

Colliding pulse mode-locked (CPM) lasers operating at 1.5 /spl mu/m and 36-GHz repetition frequency were fabricated on semi-insulating substrates. An RF electrical signal at a repetition rate of 36 GHz was injected into the saturable absorber and hybrid CPM was observed for RF powers as low as -9.0 dBm with a phase noise level of < -70 dBc/Hz at 5-kHz offset. Linewidth narrowing and pedestal suppression became pronounced for RF powers as low as 0 dBm. With an injected RF power of +8 dBm, the worst-case timing jitter was reduced from 4.8 to 0.69 ps ( 100 Hz to 10 MHz).     

An Energy-Efficient OOK Transceiver for Wireless Sensor Networks

A 1-Mb/s 916.5-MHz on-off keying (OOK) transceiver for short-range wireless sensor networks has been designed in a 0.18-mum CMOS process. The receiver has an envelope detection based architecture with a highly scalable RF front-end. Untuned RF circuits are leveraged and optimized in the receiver to achieve superior energy efficiency compared to tuned RF circuits. The receiver power consumption scales from 0.5 mW to 2.6 mW, with an associated sensitivity of -37 dBm to -65 dBm at a BER of 10 ^-3. The transmitter consumes 3.8 mW to 9.1 mW with output power from -11.4 dBm to -2.2 dBm. The receiver achieves a startup time of 2.5 mus, allowing for efficient duty cycling     

A 1.75-GHz polar modulated CMOS RF power amplifier for GSM-EDGE

This work presents a fully integrated linearized CMOS RF amplifier, integrated in a 0.18-/spl mu/m CMOS process. The amplifier is implemented on a single chip, requiring no external matching or tuning networks. Peak output power is 27 dBm with a power-added efficiency (PAE) of 34%. The amplitude modulator, implemented on the same chip as the RF amplifier, modulates the supply voltage of the RF amplifier. This results in a power efficient amplification of nonconstant envelope RF signals. The RF power amplifier and amplitude modulator are optimized for the amplification of EDGE signals. The EDGE spectral mask and EVM requirements are met over a wide power range. The maximum EDGE output power is 23.8 dBm and meets the class E3 power requirement of 22 dBm. The corresponding output spectrum at 400 and 600 kHz frequency offset is -59 dB and -70 dB. The EVM has an RMS value of 1.60% and a peak value of 5.87%.     

A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer

Wireless power transfer (WPT) has emerged as a solution for supplying smart sensors for long-term battery-less deployment. Because the amount of power harvested by the smart sensor is limited due to WPT path loss, the optimization objective is twofold: achieving ultra-low-power operation for the sensing task and improving the harvesting efficiency even at low incident power. In this paper, we focus on the use case of a Bluetooth LE-connected motion detection system supplied by 2.45-GHz RF power. The full system (RF energy harvester, power management, sensor transducer and interface, control, data processing and wireless transmission) is implemented using low-power off-the-shelf components. In the sensing sub-system, ultra-low-power operation is achieved by the duty-cycling of the sensor interface and by an event-driven scheme for communication. In the harvesting sub-system, the design of the matching network and rectifier, combined with maximum power point tracking (MPPT), is optimized for increasing the power harvesting efficiency (PHE) at low incident power. Measurements show a total reduction in the power consumption for the sensing sub-system by a factor 20. When using custom WPT waveform with high peak-to-average power ratio, the RF energy harvester is functional with an incident RF power starting from −20 dBm. The smart sensor is able to perform its motion-detection task with an incident power as low as −17.3 dBm.     

A 1.2-V RF front-end with on-chip VCO for PCS 1900 direct conversion receiver in 0.13-/spl mu/m CMOS

In this paper, a 1.2-V RF front-end realized for the personal communications services (PCS) direct conversion receiver is presented. The RF front-end comprises a low-noise amplifier (LNA), quadrature mixers, and active RC low-pass filters with gain control. Quadrature local oscillator (LO) signals are generated on chip by a double-frequency voltage-controlled oscillator (VCO) and frequency divider. A current-mode interface between the downconversion mixer output and analog baseband input together with a dynamic matching technique simultaneously improves the mixer linearity, allows the reduction of flicker noise due to the mixer switches, and minimizes the noise contribution of the analog baseband. The dynamic matching technique is employed to suppress the flicker noise of the common-mode feedback (CMFB) circuit utilized at the mixer output, which otherwise would dominate the low-frequency noise of the mixer. Various low-voltage circuit techniques are employed to enhance both the mixer second- and third-order linearity, and to lower the flicker noise. The RF front-end is fabricated in a 0.13-/spl mu/m CMOS process utilizing only standard process options. The RF front-end achieves a voltage gain of 50 dB, noise figure of 3.9 dB when integrated from 100 Hz to 135 kHz, IIP3 of -9 dBm, and at least IIP2 of +30dBm without calibration. The 4-GHz VCO meets the PCS 1900 phase noise specifications and has a phase noise of -132dBc/Hz at 3-MHz offset.     

应用于GSM/EDGE零中频接收机的CMOS射频前端

介绍了一个零中频接收机CMOS射频前端,适用于双带(900MHz/1800 MHz)GSM/EDGE;E系统.射频前端由两个独立的低噪声放大器和正交混频器组成,并且为了降低闪烁噪声采用了电流模式无源混频器.该电路采用0.13 μm CMOS工艺流片,芯片面积为0.9 mm×1.0 mm.芯片测试结果表明:射频前端在90...     

A 900 MHz Zero‐IF RF Transceiver for IEEE 802.15.4g SUN OFDM Systems

This paper presents a 900 MHz zero‐IF RF transceiver for IEEE 802.15.4g Smart Utility Networks OFDM systems. The proposed RF transceiver comprises an RF front end, a Tx baseband analog circuit, an Rx baseband analog circuit, and a ΔΣ fractional‐N frequency synthesizer. In the RF front end, re‐use of a matching network reduces the chip size of the RF transceiver. Since a T/Rx switch is implemented only at the input of the low‐noise amplifier, the driver amplifier can deliver its output power to an antenna without any signal loss; thus, leading to a low dc power consumption. The proposed current‐driven passive mixer in Rx and voltage‐mode passive mixer in Tx can mitigate the IQ crosstalk problem, while maintaining 50% duty‐cycle in local oscillator clocks. The overall Rx‐baseband circuits can provide a voltage gain of 70 dB with a 1 dB gain control step. The proposed RF transceiver is implemented in a 0.18 μm CMOS technology and consumes 37 mA in Tx mode and 38 mA in Rx mode from a 1.8 V supply voltage. The fabricated chip shows a Tx average power of ?2 dBm, a sensitivity level of ?103 dBm at 100 Kbps with , an Rx input P_1dB of ?11 dBm, and an Rx input IP3 of ?2.3 dBm.     

A Low-Voltage Broadband Feedforward-Linearized BJT Mixer

A low-voltage, feedforward-linearized bipolar mixer realizes an input$hboxIP_3$of$+$14.3 dBm and an input$hboxIP_2$of$+$54.5 dBm at 2.4 GHz. Conversion (power) gain over the 1–6GHz RF input range is 12.4$,pm,$0.35 dB, while the input$hboxIP_3$is 13.6$,pm,$1.8dBm over the same frequency range. The broadband mixer's RF input impedance varies from 60.3-j7.1 at 2.4 GHz to 57.4-j16.6$~Omega$at 5.8GHz. Measured SSB (50$Omega$) noise figure is 18.6 dB at 2.4 GHz. No on-chip inductors are used in the design, and the 0.14$hbox mm^2$(active area) mixer dissipates 7.2 mW from a (minimum) 1.2 V supply.