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1.
In this paper, analysis and design of a new current-mode instrumentation amplifier (CMIA) circuit is presented. The proposed circuit employs two Current Operational Amplifiers (COA) as active building blocks, one resistor and two transistors operating as variable resistors to electronically control the differential-mode gain. The main feature of the proposed CMIA is that unlike most previously reported CMIAs, its CMRR has negligible sensitivity to mismatches. In addition, in the proposed circuit both active building blocks operate in negative feedback loop which results in an overall enhanced performance. SPICE simulation results using 0.18 μm TSMC CMOS parameters and supply voltage of ±0.9 V show a constant CMRR of about 51 dB regardless of mismatches and wide bandwidth ranging from 14.8 MHz to about 3 MHz for differential-mode gains between 3 and 18 dB, respectively. 相似文献
2.
In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique. 相似文献
3.
A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier. 相似文献
4.
In this paper, a new low-power versatile current-mode rectifier is proposed. As a salient feature, the proposed rectifier provides two positive half-wave, two inverting negative half-wave or two full-wave outputs from the same configuration. The proposed circuit employs only a dual-output second-generation current conveyor (DO-CCII) and a core rectifying circuit consisting of twelve MOS transistors. The input and output signals are current. Favorably, by adding two additional transistors, the proposed rectifier can also rectify voltage signals with electronic tuning capability. The simple and MOS only structure of the proposed circuit is highly attractive from integration point of view. In spite of providing multiple outputs at the same time, the proposed rectifier enjoys low power consumption. PSPICE simulations using 0.18 μm CMOS parameters and supply voltage of ±0.9 V demonstrate a precise operation and good temperature stability. 相似文献
5.
The low power instrumentation amplifier (IA) presented in this paper has been designed to be the front-end of an integrated neural recording system, in which common-mode rejection ratio (CMRR), input referred noise and power consumption are critical requirements. The proposed IA topology exploits a differential-difference amplifier (DDA) whose differential output current drives a fully differential, high-resistance, transimpedance stage, with an embedded common-mode feedback loop to increase the CMRR. This stage is followed by a differential-to-single-ended output amplifier. Low-power operation has been achieved by exploiting sub-threshold operation of MOS transistors and adopting a supply voltage of 1 V. Simulation results in a commercial 65 nm CMOS technology show a 1 Hz to 5 kHz bandwidth, a CMRR higher than 120 dB, an input referred noise of 8.1 μVrms and a power consumption of 1.12 μW. 相似文献
6.
This paper presents an alternative implementation of a chopper-modulated current-mode instrumentation amplifier. The structure provides very low-offset voltage at the output due to chopper modulation and residual offset removal path. The residual offset removal path is based on low-pass filtering using grounded capacitances which provides compact design structure compared to various chopper-modulated instrumentation amplifier designs. Rail-to-rail input common-mode range is possible due to transmission gate-based input chopper switching scheme. The design is made using a 0.35-µm CMOS process with ±1.65 V supply voltage. The area of the amplifier is 234µm × 344 µm, including all the filtering elements. The proposed circuit with residual offset removal path provides less than 1 µV input referred offset voltage. The advantage of the proposed instrumentation amplifier is its large bandwidth, simple design scheme and compact area compared to chopper-modulated voltage mode amplifiers. 相似文献
7.
In this paper a new topology for implementing Current-Mode Instrumentation Amplifiers (CMIA) is presented. The proposed CMIA is based on two single input-multiple output (SI-MO) current operational amplifiers (COAs) as basic building blocks and 2 resistors. To electronically control the differential-mode gain, a transistor operating in triode region is used which acts as a variable resistor. The significant feature of the proposed CMIA is that the active building blocks operate in closed loop configuration. Therefore it exhibits numerous remarkable features such as improved frequency performance, low THD and very low input impedance. In addition, it has fully differential output which reduces the output noise and increases its application. The proposed CMIA is analyzed and simulated with SPICE program using parameters of 0.18 µm CMOS technology and supply voltage of ±0.9 V. 相似文献
8.
In this paper, a Current Mode Instrumentation Amplifier (CMIA) is presented. The proposed circuit employs two Extra X Current Controlled Current Conveyors (EX-CCCII) and a single grounded resistor. The circuit offers a wide differential-gain bandwidth, wide CMRR bandwidth, and electronically tunable differential gain. The circuit offers cascadibility feature with input impedance of 2.167 kΩ which is very small in comparison to the output impedance of 2.17 MΩ. Simultaneously, a Transresistance (TR) instrumentation amplifier is also obtained with the features of electronically tunable high differential gain and wide bandwidth. The effect of non-idealities of EX-CCCII on the circuit performance is also analysed. The validity of the proposed circuit is verified through PSPICE simulations using 0.25 µm parameters with a supply voltage of ±1.25 V. Also, the circuit is verified by experimental results. 相似文献
9.
Cesar Augusto Prior Cesar Ramos Rodrigues André Luiz Aita João Baptista dos Santos Martins Filipe Costa Beber Vieira 《Analog Integrated Circuits and Signal Processing》2008,57(1-2):11-17
The objective of this paper is to discuss the advantages and drawbacks of using Trapezoidal Association of Transistors (TAT) in the implementation of a low-power high-CMRR CMOS instrumentation amplifier (IA) aimed for biomedical applications. IAs are well suited for biomedical applications due to its high CMRR. For the sake of comparison, two versions of the circuit were designed, prototyped and characterized. The performance of a version with its current mirrors implemented with TAT, where supposedly higher CMRR could be achievable, is compared to another with single-transistor implementation of current mirrors in order to analyze the CMRR performance. The IA circuit was designed in AMIS 1.5 μm technology and manufactured through the MOSIS Service. In addition to the better performance attained by the classic implementation of the amplifier, with CMRR higher than 120 dB, this version of the IA consumed less than one third of the area from the TAT version. Comparison of both versions from same topology indicates no advantages of using TATs in the current mirrors of this type of IA. 相似文献
10.
This paper presents a new fully differential second generation current controlled conveyor (FDCCCII) based on differential pair topology, which employs floating gate MOS transistors (FG-MOS). It uses floating gate MOSFETs at the input stage and has rail-to-rail structure which performs with both positive and negative signals. This circuit has tunable parasitic resistance at its input port. It operates with low supply voltage (±0.8 V), low power consumption (lower than 3 mW at current bias of 1 mA), and wide range parasitic resistance (R X ). This circuit has less MOSFET than the previous similar circuits and is suitable for integrated circuit design. To demonstrate the application of the proposed circuit, a fully differential current mode LC-ladder filter and a fully differential multifunction biquad filter are designed. Simulation results by HSPICE confirm validity of the proposed circuit and its application. 相似文献
11.
This paper presents an ultra low-voltage, ultra low-power, very compact, dynamic threshold voltage MOS transistor (DTMOS)-based CCII circuit. The proposed circuit is capable of operating under ± 0.2 V symmetric supply voltages. The circuit topology is very compact and consists of only four DTMOS transistors and four ordinary NMOS transistors. The total power consumption of the circuit is found as only 214 nW while all transistors are working in the subthreshold region. The current conveyor has 570 kHz 3 dB-bandwidth from X to Y terminal for the voltage gain and has low, 0.2 % following error between these terminals for inputs not exceeding ± 60 mV. TSMC 0.18 µm process technology parameters are used in the design of the proposed CCII block which is then employed in an audio-frequency, second-order, band-pass filter configuration where real speech signals are fed to the input of the filter to further investigate its characteristics. Close agreement is found between theoretical study and simulated responses. 相似文献
12.
The current-mode instrumentation amplifier (CMIA) based on op-amp power-supply current sensing offers distinct advantages over conventional architecture designs. The CMIA is studied in detail and the CMRR expression is derived in terms of op-amp and transistor parameters. A good CMRR is shown to depend upon several factors, including the power-supply rejection ratio of the op-amps used in the CMIA. The results obtained are shown to compare well with SPICE simulation and provide valuable design insight for development of the next generation of CMIAs. 相似文献
13.
《Microelectronics Journal》2014,45(6):805-814
The paper presents a completely new realization of peak detector/full-wave rectifier of input sinusoidal signals employing four CCCIIs (controlled current conveyors), metal-oxide–semiconductor transistors and a single grounded capacitor, without any external resistors and components matching the requirements. The circuit gives a DC output voltage that is the peak input voltage over a wide frequency range, with a very low ripple voltage and low harmonic distortion. The proposed circuit uses an all-pass filter as a 90° phase shifter of the square value of the processed input signal. The proposed circuit is very appropriate to be further developed into integrated circuits. To verify the theoretical analysis, the circuit HSPICE simulations were also included, showing good agreement with the theory. 相似文献
14.
Hassan Faraji Baghtash Ahmad Ayatollahi 《Analog Integrated Circuits and Signal Processing》2014,78(2):465-477
A true class ‘AB’ fully differential current output stage with very high common mode rejection ratio is presented in this study. The operational principle of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by SPICE simulation in TSMC 0.18 μm CMOS, and Level49 technology. Owing to the elaborately arranged components, the proposed circuit demonstrates very high common-mode rejection ratio (CMRR), high slew rate, high current drive capability, high output compliance, and very low power consumption while operating at power supply of ±0.9 V. The interesting results such as current drive capability of ±100 μA, high output voltage swing of ±0.8 V, low static power consumption of 21 μW, and very high CMRR of 84.5 dB is achieved utilizing standard CMOS technology. The performance of circuit at the presence of process and voltage variations evaluated through corner case and Monte Carlo analysis. The harmonic distortion is evaluated to investigate the circuit’s linearity. The transient stepwise response analysis is also done to verify the stability of proposed class ‘AB’ FDCOS. 相似文献
15.
Hassan Faraji Baghtash Khalil Monfaredi Ahmad Ayatollahi 《Analog Integrated Circuits and Signal Processing》2012,70(1):103-112
A current operational amplifier (COA) with very high current drive capability is presented in this paper. The principle of
operation of this unique structure is discussed, its most important formulas are derived and its outstanding performance is
verified by HSPICE simulation in TSMC 0.18 μm CMOS, BSIM3, and Level49 technology. Owing to the elaborately arranged components,
the proposed circuit demonstrates very high frequency bandwidth, extremely high CMRR, high output impedance, and true rail
to rail output voltage swing range while operating at very low power supply of ±0.5 V. The interesting results such as current
drive capability of ±1 mA, high output impedance of 5 GΩ, wide gain bandwidth of 220 MHz, extremely high output voltage swing
of ±0.45 V, which interestingly provides the highest yet reported output voltage compliance for current mode building blocks
implemented by regular CMOS technology, low static power consumption of 159 μW, and very high CMRR of 155 dB is achieved utilizing
standard CMOS technology. Full process, voltage, and temperature variation analysis of the circuit is also investigated in
order to approve the well robustness of the structure. The transient stepwise and sinusoidal response analysis is also done
to verify the proposed COA stability. 相似文献
16.
Hua-Pin Chen 《International Journal of Electronics》2013,100(7):1010-1031
In this article, a new three-input and three-output versatile current-mode universal biquadratic filter is proposed. The circuit employs three dual-output current conveyors (DO-CCIIs) as active elements together with three grounded resistors and two grounded capacitors. The proposed configuration exhibits low-input impedance and high-output impedance which is important for easy cascading in the current-mode operations. It can be used as either a single-input and three-output or three-input and two-output circuit. In the operation of single-input and three-output circuit, the lowpass, bandpass and bandreject can be realised simultaneously, while the highpass filtering response can be easily obtained by connecting appropriated output current directly without using addition stages. In the operation of three-input and two-output circuit, all five generic filtering functions can be easily realised by selecting different three input current signals. The filter permits orthogonal controllability of the quality factor and resonance angular frequency, and no component matching conditions or inverting-type input current signals are imposed. All the passive and active sensitivities are low. HSPICE simulation results based on using TSMC 0.18?µm 1P6M CMOS process technology and supply voltages ±0.9?V to verify the theoretical analysis. 相似文献
17.
In this study, both current and transimpedance mode instrumentation amplification operations are met through a new active building block proposal, namely Current DifferencingTransresistance Amplifier block, CDTRA. In order to regard CDTRA as an instrumentation amplifier (IA), two grounded passive resistors are needed. Passive resistors together with electronically tunable transresistance parameter of active block, rm, set versatility over gain tunability for instrumentation amplifier. Proposed active block is current input, current/voltage output design. It has low impedance input, high impedance for current output, and low impedance for voltage output respectively. Since this particular IA is based on CDTRA, then it inherits these electrical characteristics fully. Numerous SPICE simulations are performed through the paper to verify validity of the study. TSMC 0.18 µm CMOS technology parameters are utilized through simulations. Experimental work is performed for the proposed IA circuit. 相似文献
18.
In this paper, a very simple topology of a current mode MOSFET-only filter with single-input and multi-output is proposed. It is very important to emphasize that it is possible to obtain five of the filter functions, namely low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) using the proposed topology without using external passive elements. The core circuit of the proposed filter employs only four MOS transistors; therefore, it occupies very small chip area. It is also possible to adjust the filter gain with the biasing voltage. In addition, the circuit exhibits a very low input impedance and also high output impedances which make it possible for cascading. The MOSFET capacitances which determine the transfer functions are all grounded, so physical capacitances can be used instead of MOSFET parasitic capacitances to operate the filter at very low frequencies. Moreover, proposed filter structure has low supply voltage as 1 V in order to be applicable to low voltage operations. Detailed simulation results, including noise and Monte Carlo analysis, are provided using 0.18 µm TSMC technology parameters to verify the feasibility of the filter circuit. 相似文献
19.
Filipe Costa Beber Vieira Cesar Augusto Prior Cesar Ramos Rodrigues Leonardo Perin João Baptista dos Santos Martins 《Analog Integrated Circuits and Signal Processing》2008,57(1-2):29-37
This paper presents the results from an investigation on the implementation of Current Mode Instrumentation Amplifiers (CMIAs) with rail-to-rail operational amplifiers (op amp) with a gm control circuit. The objective of employing rail-to-rail op amps in the implementation of a CMIA is the improvement of the common-mode operation range. The enhancement of the input common mode range (ICMR) is obtained using op amps with a rail-to-rail input stage followed by a cascode-based output stage. A prototype of the CMIA was implemented in standard 0.6 μm XFAB CMOS technology. Test results showed that the CMIA common mode range was extended but with moderated CMRR. To minimize this issue the amplifier was re-designed and sent to fabrication. Simulations with the components variations included were performed and showed the enhancement of the CMRR can be expected. 相似文献
20.
Ali Kircay 《International Journal of Electronics》2013,100(2):212-219
In this article, a new current-mode square-root-domain first-order multifunction filter is designed. The filter circuit has a very simple structure; it uses only the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and a grounded capacitor. All transistors’ aspect ratios are the same. It provides lowpass, highpass and allpass responses simultaneously for a single input signal. It can be electronically tuned by changing an external DC current. The filter operates with a single supply voltage of 2.5 V. The proposed circuit has been simulated with PSPICE electronics circuit simulation program (Cadence OrCAD Capture CIS Version 9.2) simulation programs using TSMC 0.35 μm (Taiwan Semiconductor Manufacturing Company) Complementary Metal-Oxide-Semiconductor (CMOS) process parameters. 相似文献