High ion density dry etching of compound semiconductors

The use of plasma sources that generate high ion densities (> 10¹¹ cm⁻³) enables dry etching of compound semiconductors at high rates with anisotropic sidewalls. In this paper we review the use of several types of electron cyclotron resonance (ECR) plasma sources and contrast the result with those obtained under reactive ion etching conditions. Various problems occurring in dry etching will be discussed, including aspect ratio dependent etch rates, mask erosion, sidewall roughening and damage introduction into the semiconductor. This damage may consist of point and line defect creation, non-stoichiometric surfaces, resputtering of mask materials or deposition of contaminating films. The use of low or high substrate temperatures to control the desorption kinetics of etch products is also discussed; at low temperatures problems can occur with condensation of the etch gases onto the substrate, while at elevated temperatures it is necessary to thermally bond the sample to the r.f. powered electrode to obtain reproducibility. Etch selectivity between the components of heterostructure systems such as GaAs/AlGaAs, GaAs/InGaP, InGaAs/AlInAs and GaN/AlN is usually much worse under high ion density conditions because of the high rates and large physical component.     

Damage-free top-down processes for fabricating two-dimensional arrays of 7 nm GaAs nanodiscs using bio-templates and neutral beam etching

The first damage-free top-down fabrication processes for a two-dimensional array of 7 nm GaAs nanodiscs was developed by using ferritin (a protein which includes a 7 nm diameter iron core) bio-templates and neutral beam etching. The photoluminescence of GaAs etched with a neutral beam clearly revealed that the processes could accomplish defect-free etching for GaAs. In the bio-template process, to remove the ferritin protein shell without thermal damage to the GaAs, we firstly developed an oxygen-radical treatment method with a low temperature of 280?°C. Then, the neutral beam etched the defect-free nanodisc structure of the GaAs using the iron core as an etching mask. As a result, a two-dimensional array of GaAs quantum dots with a diameter of ～ 7 nm, a height of ～ 10 nm, a high taper angle of 88° and a quantum dot density of more than 7 × 10(11) cm(-2) was successfully fabricated without causing any damage to the GaAs.     

Simultaneous Fabrication of Very High Aspect Ratio Positive Nano‐ to Milliscale Structures

A simple and inexpensive technique for the simultaneous fabrication of positive (i.e., protruding), very high aspect (>10) ratio nanostructures together with micro‐ or millistructures is developed. The method involves using residual patterns of thin‐film over‐etching (RPTO) to produce sub‐micro‐/nanoscale features. The residual thin‐film nanopattern is used as an etching mask for Si deep reactive ion etching. The etched Si structures are further reduced in size by Si thermal oxidation to produce amorphous SiO₂, which is subsequently etched away by HF. Two arrays of positive Si nanowalls are demonstrated with this combined RPTO‐SiO₂‐HF technique. One array has a feature size of 150 nm and an aspect ratio of 26.7 and another has a feature size of 50 nm and an aspect ratio of 15. No other parallel reduction technique can achieve such a very high aspect ratio for 50‐nm‐wide nanowalls. As a demonstration of the technique to simultaneously achieve nano‐ and milliscale features, a simple Si nanofluidic master mold with positive features with dimensions varying continuously from 1 mm to 200 nm and a highest aspect ratio of 6.75 is fabricated; the narrow 200‐nm section is 4.5 mm long. This Si master mold is then used as a mold for UV embossing. The embossed open channels are then closed by a cover with glue bonding. A high aspect ratio is necessary to produce unblocked closed channels after the cover bonding process of the nanofluidic chip. The combined method of RPTO, Si thermal oxidation, and HF etching can be used to make complex nanofluidic systems and nano‐/micro‐/millistructures for diverse applications.     

GaAs背面通孔刻蚀技术研究

比较研究了GaAs背面通孔腐蚀中的湿法腐蚀和ICP干法刻蚀技术,并利用感应离子耦合(ICP)干法刻蚀技术,采用CCl2F2／Ar混合气体,对GaAs衬底上的通孔工艺进行了研究。通过优化气压、射频功率、CCl2F2／Ar混合气体组分配比,在CCl2F2流量为200sccm,Ar流量为10sccm,源功率Pa=400W,偏压功率Pb=14W,自偏压Vb=120V,真空度P=43Pa时,得到了表面平滑的通孔形貌和最大的通孔刻蚀速率(4．3μm／min)。     

A systematic study of DRIE process for high aspect ratio microstructuring

Various MEMS devices like Accelerometers, Resonators, RF- Filters, Micropumps, Microvalves, Microdispensers and Microthrusters are produced by removing the bulk of the substrate materials. Fabrications of such Microsystems requires the ability to engineer precise three-dimensional structures in the silicon substrate. Fabrication of MEMS faces multiple technological challenges before it can become a commercially viable technology. One key fabrication process required is the deep silicon etching for forming high aspect ratio structures. There is an increasing interest in the use of dry plasma etching for this application because of its anisotropic etching behavior, high etch speed, good uniformity and profile control, high aspect ratio capabilities without having any undesired secondary effects i.e. RIE lags, Loading, microloading, loosing of anisotropic nature of etching as aspect ratio increases, micro-grass and even etch stalling. Developing a DRIE micro-machining process requires a thorough understanding of all plasma parameters, which can affect a silicon etching process and their use to suppress the secondary effects. In this paper our intention is to investigate the influence of etching gas flow, etching gas pressure, passivation gas pressure, ICP coil power, Platen power and etch and passivation time sequence on etch rate and side wall profile. Parameter ramping is a powerful technique used to achieve the requirements of high aspect ratio microstructures (HARMS) for MEMS applications by having high etch rate with good profile/CD control. The results presented here can be used to rationally vary processing parameters in order to meet the microstructural requirements for a particular application.     

Fabrication of p-type silicon nanowire arrays with a high aspect ratio using electrochemical and alkaline etching

We report on the fabrication of silicon nanostructures with a high aspect ratio that were created using a combination of electrochemical etching and alkaline etching. With this technique, we were able to fabricate nano- and/or micro-wire structures that are perfectly periodic over large areas of 3.14 cm2. After porous silicon was created by electrochemical etching, the effect of post-alkaline etching was investigated to determine how changes in the etching time, solution concentration and temperature of the etchant influenced the silicon morphology. As a result, periodic silicon wire arrays with good vertical alignment were obtained, and these arrays had a width of less than 500 nm and/or a high aspect ratio of more than 20.     

深高宽比微结构的干法刻蚀

介绍了深高宽比微结构在干法刻蚀过程中遇到的刻蚀滞后、刻蚀中止、侧壁弯曲和开槽效应等与传统器件刻蚀不同的现象,讨论了制作高深宽比结构所需的关键技术和检测手段.     

分布反馈量子级联激光器的光栅制备

利用全息曝光方法制备了分布反馈量子级联激光器的光栅掩模,选择和发展了恰当的用于InGaAs/InP材料的光栅腐蚀优化工艺,得到腐蚀规律,讨论了腐蚀机制。在量子级联激光器的InGaAs/InP层上制备光栅得到分布反馈量子级联激光器,其单模特性较好,信噪比大于30dB。     

Metal assisted chemical etching for high aspect ratio nanostructures: A review of characteristics and applications in photovoltaics

Metal assisted chemical etching (MacEtch) is a recently developed anisotropic wet etching method that is capable of producing high aspect ratio semiconductor nanostructures from patterned metal film. In this review article, we highlight the characteristics of MacEtch of silicon (Si) including controllability of the produced sidewall roughness, the inherent high aspect ratio, the weak crystal orientation dependence, impurity doping and solution concentration dependent porosity, as well as the applicability of MacEtch to non-Si based semiconductor materials including III–V compound semiconductors. Also reviewed are applications of MacEtch produced high aspect ratio Si nanostructures in photovoltaics, where the p–n junction can be in the planar Si tray, core–shell, or axial geometry, with nanowire, micropillar, or hole arrays serving as light trapping or carrier collection structures. The prospect of using MacEtch to improve the cost and efficiency of photovoltaic cells is discussed.     

Porosity control in metal-assisted chemical etching of degenerately doped silicon nanowires

We report the fabrication of degenerately doped silicon (Si) nanowires of different aspect ratios using a simple, low-cost and effective technique that involves metal-assisted chemical etching (MacEtch) combined with soft lithography or thermal dewetting metal patterning. We demonstrate sub-micron diameter Si nanowire arrays with aspect ratios as high as 180:1, and present the challenges in producing solid nanowires using MacEtch as the doping level increases in both p- and n-type Si. We report a systematic reduction in the porosity of these nanowires by adjusting the etching solution composition and temperature. We found that the porosity decreases from top to bottom along the axial direction and increases with etching time. With a MacEtch solution that has a high [HF]:[H(2)O(2)] ratio and low temperature, it is possible to form completely solid nanowires with aspect ratios of less than approximately 10:1. However, further etching to produce longer wires renders the top portion of the nanowires porous.     

Nanolithography using spin-coatable ZrO(2) resist and its application to sub-10 nm direct pattern transfer on compound semiconductors

A typical method for sub-micrometer compound semiconductor dry etching utilizes polymethylmethacrylate?(PMMA) to transfer patterns to SiO(2) as intermediate masks, which limits its ability to obtain etching resolutions approaching sub-10?nm. We report a new approach for direct sub-10?nm pattern transfer using sol-gel derived spin-coatable ZrO(2) resist as the mask. The optimal dose of ZrO(2) resist is ～160?mC?cm(-2). The sample InP compound semiconductor etching selectivity to ZrO(2) is over 13:1, with high aspect ratio of 35:1. The smallest etching feature is 9?nm. These results will be very useful for realizing various challenging nanoscale photonic and electronic devices and circuits.     

XeF(2) gas-assisted focused-electron-beam-induced etching of GaAs with 30 nm resolution

We demonstrate the gas-assisted focused-electron-beam (FEB)-induced etching of GaAs with a resolution of 30 nm at room temperature. We use a scanning electron microscope (SEM) in a dual beam focused ion beam together with xenon difluoride (XeF(2)) that can be injected by a needle directly onto the sample surface. We show that the FEB-induced etching with XeF(2) as a precursor gas results in isotropic and smooth etching of GaAs, while the etch rate depends strongly on the beam current and the electron energy. The natural oxide of GaAs at the sample surface inhibits the etching process; hence, oxide removal in combination with chemical surface passivation is necessary as a strategy to enable this high-resolution etching alternative for GaAs.     

Dielectric Metalens by Multilayer Nanoimprint Lithography and Solution Phase Epitaxy

Metasurfaces have ushered in a huge development for their superior ability in manipulating light properties including phase, amplitude, and polarization, which show great potential as alternatives for the refractive optical devices. Recently, many applications of metasurface including metalens have been proposed and investigated, aiming at substituting their refractive counterparts. However, the commonly used fabrication approaches employ electron-beam lithography (EBL) followed by dry etching or atomic layer deposition (ALD) of dielectric materials, which are expensive and inefficient. Besides, dry etching of dielectric materials at sub-100 nm scale with a high aspect ratio is challenging. Herein, a new approach for dielectric metalens fabrication is presented, which combines multilayer nanoimprint lithography and solution phase epitaxy. High aspect ratio ZnO nanopillars with a height-to-diameter ratio of over 7:1 are demonstrated. By using the multilayer nanoimprint lithography, increased aspect ratio nanostructures from shallow imprinting molds are obtained. The highly anisotropic growth characteristic enables nanopillars to grow at a height that exceeds the resist thickness. With this ability, ZnO metalenses are fabricated where the height of nanopillar reaches 1.1 μm, achieving a focusing efficiency of 50%. The process is cost-effective with a high throughput, which can be widely used for many optical applications.     

Fabrication and characterization of plasmonic nanorods with high aspect ratios

Metallic nanostructures with high aspect ratios are important for developing devices in photonics and integrated optics. However, fabricating well-aligned plasmonic arrays is challenging due to the difficulties of etching metals. In this work, we investigate the feasibility of constructing high aspect ratio nanorods with desired shapes and controllable geometric parameters using direct focused ion beam etching. The whole fabrication process only involves a metal-deposition step and a single milling of designed patterns. Detailed characterizations of the fabricated devices are also experimentally demonstrated.     

Preparation of thin GaAs suspended membranes for gas micro-sensors using plasma etching

The GaAs/AlGaAs heterostructure layer system grown by MBE on GaAs substrate was designed to be used for micro-mechanical structure fabrication. In the first step, double-side aligned photolithography is carried out to define the etching masks on both sides of the substrate. After this, highly selective reactive ion etching (SRIE) of GaAs from the front side is used to determine the lateral dimensions of the membrane structure. The vertical dimension is defined by deep backside SRIE through a 300 μm thick GaAs substrate to the AlGaAs etch stop layer, hence the structure thickness is precisely determined by the thickness of MBE-grown GaAs layer over this etch stop layer. The last step is selective etching of the AlGaAs etch stop layer. The thermal resistance value of the membrane structure as high as 21 K/mW is achieved.     

Periodic arrays of deep nanopores made in silicon with reactive ion etching and deep UV lithography

We report on the fabrication of periodic arrays of deep nanopores with high aspect ratios in crystalline silicon. The radii and pitches of the pores were defined in a chromium mask by means of deep UV scan and step technology. The pores were etched with a reactive ion etching process with SF(6), optimized for the formation of deep nanopores. We have realized structures with pitches between 440 and 750?nm, pore diameters between 310 and 515?nm, and depth to diameter aspect ratios up to 16. To the best of our knowledge, this is the highest aspect ratio ever reported for arrays of nanopores in silicon made with a reactive ion etching process. Our experimental results show that the etching rate of the nanopores is aspect-ratio-dependent, and is mostly influenced by the angular distribution of the etching ions. Furthermore we show both experimentally and theoretically that, for sub-micrometer structures, reducing the sidewall erosion is the best way to maximize the aspect ratio of the pores. Our structures have potential applications in chemical sensors, in the control of liquid wetting of surfaces, and as capacitors in high-frequency electronics. We demonstrate by means of optical reflectivity that our high-quality structures are very well suited as photonic crystals. Since the process studied is compatible with existing CMOS semiconductor fabrication, it allows for the incorporation of the etched arrays in silicon chips.     

Fabrication of high aspect ratio silicon micro-tips for field emission devices

The evolution of higher order {221} and {331} crystal planes during corner undercutting in the anisotropic etching of (100) silicon is discussed, and the occurrence of highly vertical (72.5°) {311} planes unique to KOH etches are demonstrated. Using a combined etching technique, very high aspect ratio micro-tips are formed and their distinct advantages for vacuum microelectronics and field-emission devices (FED) are described. This revised version was published online in November 2006 with corrections to the Cover Date.     

Photoelectric properties of planar structures with double Schottky barrier treated in a high-vacuum microwave discharge

The state of the surface of n-GaAs crystals upon high-vacuum microwave plasmachemical (HVMWPC) etching in various gas mixtures and the influence of the semiconductor surface condition on the photoelectric characteristics of related metal-semiconductor-metal structures with double Schottky barrier (MSMDSB structures) are investigated. Dependence of the HVMWPC etching rate of the GaAs surface on the gas mixture composition and substrate temperature is determined. It is shown that the HVMWPC etching regime strongly influences the photoelectric properties of MSMDSB structures: the treatment can lead to either growth or drop in photosensitivity of the samples. Optimum etching regimes are established for which good semiconductor surface quality and high photosensitivity of the MSMDSB structures are retained at a high etching rate.     

Three-dimensional fabrication on GaAs surfaces using electron-beam-induced carbon deposition followed by wet chemical etching

We propose a method for fabricating three-dimensional structures on GaAs surfaces using electron beam (EB) irradiation followed by wet chemical etching. An etch-resistant hydrocarbon layer forms on the GaAs surface with the EB irradiation. Structures can be fabricated after etching using the hydrocarbon layer to block the etching. The height dependence on the irradiation and etching conditions was investigated as a means of controlling the height of the structures. A higher structure was fabricated at higher doses. The etching selectivity changed with the concentration of the etchant. A three-dimensional structure was fabricated based on these results, demonstrating the possible use of this method as a novel three-dimensional fabrication method for GaAs surfaces.     

A novel silicon nanotips antireflection surface for the micro Sun sensor

We have developed a new technique to fabricate an antireflection surface using silicon nanotips for use on a micro Sun sensor for Mars rovers. We have achieved randomly distributed nanotips of radii spanning from 20 to 100 nm and aspect ratio of approximately 200 using a two-step dry etching process. The 30 degrees specular reflectance at the target wavelength of 1 microm is only about 0.09%, nearly 3 orders of magnitude lower than that of bare silicon, and the hemispherical reflectance is approximately 8%. When the density and aspect ratio of these nanotips are changed, a change in reflectance is demonstrated. When surfaces are covered with these nanotips, the critical problem of ghost images that are caused by multiple internal reflections in a micro Sun sensor was solved.