Novel nanotube-on-insulator (NOI) approach toward single-walled carbon nanotube devices

We present a novel nanotube-on-insulator (NOI) approach for producing high-yield nanotube devices based on aligned single-walled carbon nanotubes. First, we managed to grow aligned nanotube arrays with controlled density on crystalline, insulating sapphire substrates, which bear analogy to industry-adopted silicon-on-insulator substrates. On the basis of the nanotube arrays, we demonstrated registration-free fabrication of both top-gated and polymer-electrolyte-gated field-effect transistors with minimized parasitic capacitance. In addition, we have developed a way to transfer these aligned nanotube arrays to flexible substrates successfully. Our approach has great potential for high-density, large-scale integrated systems based on carbon nanotubes for both micro- and flexible electronics.     

Semitransparent passive matrix organic light-emitting displays

There has been an increased interest in developing top emission organic light-emitting diodes (OLEDs) that are able to emit light from both sides of the OLED display. One important application of the top emission device structure is to achieve monolithic integration of a top-emitting OLED on a polycrystalline or amorphous silicon thin film transistors used in active matrix displays. A high performance dual-sided top-emitting polymer OLED developed in this work exhibited a total luminous efficiency of ∼5.0 cd/A at 4.0 V, which is comparable to that observed for a control device having bottom emission structure. A laser ablation technology was developed to define the pixels. The cathode separation was achieved without using the conventional reverse trapezoid type separators that are normally used for pixellated OLED displays. A prototype of semitransparent polymer light-emitting passive matrix display has a matrix of 100 × 32 with a display area of 32.25 mm by 11.15 mm.     

Progress Report on “From Printed Electrolyte‐Gated Metal‐Oxide Devices to Circuits”

Printed electrolyte‐gated oxide electronics is an emerging electronic technology in the low voltage regime (≤1 V). Whereas in the past mainly dielectrics have been used for gating the transistors, many recent approaches employ the advantages of solution processable, solid polymer electrolytes, or ion gels that provide high gate capacitances produced by a Helmholtz double layer, allowing for low‐voltage operation. Herein, with special focus on work performed at KIT recent advances in building electronic circuits based on indium oxide, n‐type electrolyte‐gated field‐effect transistors (EGFETs) are reviewed. When integrated into ring oscillator circuits a digital performance ranging from 250 Hz at 1 V up to 1 kHz is achieved. Sequential circuits such as memory cells are also demonstrated. More complex circuits are feasible but remain challenging also because of the high variability of the printed devices. However, the device inherent variability can be even exploited in security circuits such as physically unclonable functions (PUFs), which output a reliable and unique, device specific, digital response signal. As an overall advantage of the technology all the presented circuits can operate at very low supply voltages (0.6 V), which is crucial for low‐power printed electronics applications.     

Top-gated chemical vapor deposition grown graphene transistors with current saturation

Graphene transistors are of considerable interest for radio frequency (rf) applications. In general, transistors with large transconductance and drain current saturation are desirable for rf performance, which is however nontrivial to achieve in graphene transistors. Here we report high-performance top-gated graphene transistors based on chemical vapor deposition (CVD) grown graphene with large transconductance and drain current saturation. The graphene transistors were fabricated with evaporated high dielectric constant material (HfO(2)) as the top-gate dielectrics. Length scaling studies of the transistors with channel length from 5.6 μm to 100 nm show that complete current saturation can be achieved in 5.6 μm devices and the saturation characteristics degrade as the channel length shrinks down to the 100-300 nm regime. The drain current saturation was primarily attributed to drain bias induced shift of the Dirac points. With the selective deposition of HfO(2) gate dielectrics, we have further demonstrated a simple scheme to realize a 300 nm channel length graphene transistors with self-aligned source-drain electrodes to achieve the highest transconductance of 250 μS/μm reported in CVD graphene to date.     

Separated carbon nanotube macroelectronics for active matrix organic light-emitting diode displays

Active matrix organic light-emitting diode (AMOLED) display holds great potential for the next generation visual technologies due to its high light efficiency, flexibility, lightweight, and low-temperature processing. However, suitable thin-film transistors (TFTs) are required to realize the advantages of AMOLED. Preseparated, semiconducting enriched carbon nanotubes are excellent candidates for this purpose because of their excellent mobility, high percentage of semiconducting nanotubes, and room-temperature processing compatibility. Here we report, for the first time, the demonstration of AMOLED displays driven by separated nanotube thin-film transistors (SN-TFTs) including key technology components, such as large-scale high-yield fabrication of devices with superior performance, carbon nanotube film density optimization, bilayer gate dielectric for improved substrate adhesion to the deposited nanotube film, and the demonstration of monolithically integrated AMOLED display elements with 500 pixels driven by 1000 SN-TFTs. Our approach can serve as the critical foundation for future nanotube-based thin-film display electronics.     

Stretchable,Large‐area Organic Electronics

Stretchability will significantly expand the application scope of electronics, particularly large‐area electronics—displays, sensors, and actuators. If arbitrary surfaces and movable parts could be covered with stretchable electronics, which is impossible with conventional electronics, new classes of applications are expected to emerge. A large hurdle is manufacturing electrical wiring with high conductivity, high stretchability, and large‐area compatibility. This Review describes stretchable, large‐area electronics based on organic field‐effect transistors for applications to sensors and displays. First, novel net‐shaped organic transistors are employed to realize stretchable, large‐area sensor networks that detect distributions of pressure and temperature simultaneously. The whole system is functional even when it is stretched by 25%. In order to further improve stretchability, printable elastic conductors are developed by dispersing single‐walled carbon nanotubes (SWNTs) as dopants uniformly in rubbers. Further, we describe integration of printable elastic conductors with organic transistors to construct a rubber‐like stretchable active matrix for large‐area sensor and display applications. Finally, we will discuss the future prospects of stretchable, large‐area electronics with delineating a picture of the next‐generation human/machine interfaces from the aspect of materials science and electronic engineering.     

Gigahertz Electromagnetic Structures via Direct Ink Writing for Radio‐Frequency Oscillator and Transmitter Applications

Radio‐frequency (RF) electronics, which combine passive electromagnetic devices and active transistors to generate and process gigahertz (GHz) signals, provide a critical basis of ever‐pervasive wireless networks. While transistors are best realized by top‐down fabrication, relatively larger electromagnetic passives are within the reach of printing techniques. Here, direct writing of viscoelastic silver‐nanoparticle inks is used to produce a broad array of RF passives operating up to 45 GHz. These include lumped devices such as inductors and capacitors, and wave‐based devices such as transmission lines, their resonant networks, and antennas. Moreover, to demonstrate the utility of these printed RF passive structures in active RF electronic circuits, they are combined with discrete transistors to fabricate GHz self‐sustained oscillators and synchronized oscillator arrays that provide RF references, and wireless transmitters clocked by the oscillators. This work demonstrates the synergy of direct ink writing and RF electronics for wireless applications.     

High-performance single layered WSe₂ p-FETs with chemically doped contacts

We report high performance p-type field-effect transistors based on single layered (thickness, ～0.7 nm) WSe(2) as the active channel with chemically doped source/drain contacts and high-κ gate dielectrics. The top-gated monolayer transistors exhibit a high effective hole mobility of ～250 cm(2)/(V s), perfect subthreshold swing of ～60 mV/dec, and I(ON)/I(OFF) of >10(6) at room temperature. Special attention is given to lowering the contact resistance for hole injection by using high work function Pd contacts along with degenerate surface doping of the contacts by patterned NO(2) chemisorption on WSe(2). The results here present a promising material system and device architecture for p-type monolayer transistors with excellent characteristics.     

Ink‐Jet Printed CMOS Electronics from Oxide Semiconductors

Complementary metal oxide semiconductor (CMOS) technology with high transconductance and signal gain is mandatory for practicable digital/analog logic electronics. However, high performance all‐oxide CMOS logics are scarcely reported in the literature; specifically, not at all for solution‐processed/printed transistors. As a major step toward solution‐processed all‐oxide electronics, here it is shown that using a highly efficient electrolyte‐gating approach one can obtain printed and low‐voltage operated oxide CMOS logics with high signal gain (≈21 at a supply voltage of only 1.5 V) and low static power dissipation.     

Carrier Transport Regulation of Pixel Graphene Transparent Electrodes for Active-Matrix Organic Light-Emitting Diode Display

Integrating a graphene transparent electrode (TE) matrix with driving circuits is essential for the practical use of graphene in optoelectronics such as active-matrix organic light-emitting diode (OLED) display, however it is disabled by the transport of carriers between graphene pixels after deposition of a semiconductor functional layer caused by the atomic thickness of graphene. Here, the carrier transport regulation of a graphene TE matrix by using an insulating polyethyleneimine (PEIE) layer is reported. The PEIE forms an ultrathin uniform film (≤10 nm) to fill the gap of the graphene matrix, blocking horizontal electron transport between graphene pixels. Meanwhile, it can reduce the work function of graphene, improving the vertical electron injection through electron tunneling. This enables the fabrication of inverted OLED pixels with record high current and power efficiencies of 90.7 cd A⁻¹ and 89.1 lm W⁻¹, respectively. By integrating these inverted OLED pixels with a carbon nanotube-based thin-film transistor (CNT-TFT)-driven circuit, an inch-size flexible active-matrix OLED display is demonstrated, in which all OLED pixels are independently controlled by CNT-TFTs. This research paves a way for the application of graphene-like atomically thin TE pixels in flexible optoelectronics such as displays, smart wearables, and free-form surface lighting.     

Charge Injection in Solution‐Processed Organic Field‐Effect Transistors: Physics,Models and Characterization Methods

A high‐mobility organic semiconductor employed as the active material in a field‐effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll‐to‐roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte‐gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution‐processed and where the most common architectures are adopted, are ～10 kΩ·cm for transistors with a field effect mobility in the 0.1–1 cm²/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case‐by‐case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the field for a long time. Only recently, as the understanding of the rather complex physical processes at the metal/semiconductor interfaces has improved, more general approaches, with a validity that extends to several materials, are being proposed and successfully tested in the literature. Only a combined scientific and technological effort, on the one side to fully understand contact phenomena and on the other to completely master the tailoring of interfaces, will enable the development of advanced organic electronics applications and their widespread adoption in low‐cost, large‐area printed circuits.     

Integrated Circuits Based on Bilayer MoS(2) Transistors

Two-dimensional (2D) materials, such as molybdenum disulfide (MoS(2)), have been shown to exhibit excellent electrical and optical properties. The semiconducting nature of MoS(2) allows it to overcome the shortcomings of zero-bandgap graphene, while still sharing many of graphene's advantages for electronic and optoelectronic applications. Discrete electronic and optoelectronic components, such as field-effect transistors, sensors, and photodetectors made from few-layer MoS(2) show promising performance as potential substitute of Si in conventional electronics and of organic and amorphous Si semiconductors in ubiquitous systems and display applications. An important next step is the fabrication of fully integrated multistage circuits and logic building blocks on MoS(2) to demonstrate its capability for complex digital logic and high-frequency ac applications. This paper demonstrates an inverter, a NAND gate, a static random access memory, and a five-stage ring oscillator based on a direct-coupled transistor logic technology. The circuits comprise between 2 to 12 transistors seamlessly integrated side-by-side on a single sheet of bilayer MoS(2). Both enhancement-mode and depletion-mode transistors were fabricated thanks to the use of gate metals with different work functions.     

Length-sorted semiconducting carbon nanotubes for high-mobility thin film transistors

We have developed a process for chemical purification of carbon nanotubes for solution-processable thin-film transistors (TFTs) having high mobility. Films of the purified carbon nanotubes fabricated by simple drop coating showed carrier mobilities as high as 164 cm²V⁻¹s⁻¹, normalized transconductances of 0.78 Sm⁻¹, and on/off current ratios of 10⁶. Such high performance requires the preparation of a suspension of micrometer-long and highly purified semiconducting single-walled carbon nanotubes (SWCNTs). Our purification process includes length and electronic-type selective trapping of SWCNTs using recycling gel filtration with a mixture of surfactants. The results provide an important milestone toward printed high-speed and large-area electronics with roll-to-roll and ink-jet device fabrication.      

Downscaling of self-aligned, all-printed polymer thin-film transistors

Printing is an emerging approach for low-cost, large-area manufacturing of electronic circuits, but it has the disadvantages of poor resolution, large overlap capacitances, and film thickness limitations, resulting in slow circuit speeds and high operating voltages. Here, we demonstrate a self-aligned printing approach that allows downscaling of printed organic thin-film transistors to channel lengths of 100-400 nm. The use of a crosslinkable polymer gate dielectric with 30-50 nm thickness ensures that basic scaling requirements are fulfilled and that operating voltages are below 5 V. The device architecture minimizes contact resistance effects, enabling clean scaling of transistor current with channel length. A self-aligned gate configuration minimizes parasitic overlap capacitance to values as low as 0.2-0.6 pF mm(-1), and allows transition frequencies of fT = 1.6 MHz to be reached. Our self-aligned process provides a way to improve the performance of printed organic transistor circuits by downscaling, while remaining compatible with the requirements of large-area, flexible electronics manufacturing.     

Measuring the capacitance of individual semiconductor nanowires for carrier mobility assessment

Capacitance-voltage characteristics of individual germanium nanowire field effect transistors were directly measured and used to assess carrier mobility in nanowires for the first time, thereby removing uncertainties in calculated mobility due to device geometries, surface and interface states, and gate dielectric constants and thicknesses. Direct experimental evidence showed that surround-gated nanowire transistors exhibit higher capacitance and better electrostatic gate control than top-gated devices, and are the most promising structure for future high performance nanoelectronics.     

3D Printing of Customized Li‐Ion Batteries with Thick Electrodes

The growing demand for rechargeable lithium‐ion batteries (LIBs) with higher capacity in customized geometries underscores the need for new battery materials, architectures, and assembly strategies. Here, the design, fabrication, and electrochemical performance of fully 3D printed LIBs composed of thick semisolid electrodes that exhibit high areal capacity are reported. Specifically, semisolid cathode and anode inks, as well as UV curable packaging and separator inks for direct writing of LIBs in arbitrary geometries are created. These fully 3D printed and packaged LIBs, which are encased between two glassy carbon current collectors, deliver an areal capacity of 4.45 mAh cm^?2 at a current density of 0.14 mA cm^?2, which is equivalent to 17.3 Ah L^?1. The ability to produce high‐performance LIBs in customized form factors opens new avenues for integrating batteries directly within 3D printed objects.     

High-kappa dielectrics for advanced carbon-nanotube transistors and logic gates

The integration of materials having a high dielectric constant (high-kappa) into carbon-nanotube transistors promises to push the performance limit for molecular electronics. Here, high-kappa (approximately 25) zirconium oxide thin-films (approximately 8 nm) are formed on top of individual single-walled carbon nanotubes by atomic-layer deposition and used as gate dielectrics for nanotube field-effect transistors. The p-type transistors exhibit subthreshold swings of S approximately 70 mV per decade, approaching the room-temperature theoretical limit for field-effect transistors. Key transistor performance parameters, transconductance and carrier mobility reach 6,000 S x m(-1) (12 microS per tube) and 3,000 cm2 x V(-1) x s(-1) respectively. N-type field-effect transistors obtained by annealing the devices in hydrogen exhibit S approximately 90 mV per decade. High voltage gains of up to 60 are obtained for complementary nanotube-based inverters. The atomic-layer deposition process affords gate insulators with high capacitance while being chemically benign to nanotubes, a key to the integration of advanced dielectrics into molecular electronics.     

Transparent active matrix organic light-emitting diode displays driven by nanowire transistor circuitry

Optically transparent, mechanically flexible displays are attractive for next-generation visual technologies and portable electronics. In principle, organic light-emitting diodes (OLEDs) satisfy key requirements for this application-transparency, lightweight, flexibility, and low-temperature fabrication. However, to realize transparent, flexible active-matrix OLED (AMOLED) displays requires suitable thin-film transistor (TFT) drive electronics. Nanowire transistors (NWTs) are ideal candidates for this role due to their outstanding electrical characteristics, potential for compact size, fast switching, low-temperature fabrication, and transparency. Here we report the first demonstration of AMOLED displays driven exclusively by NW electronics and show that such displays can be optically transparent. The displays use pixel dimensions suitable for hand-held applications, exhibit 300 cd/m2 brightness, and are fabricated at temperatures suitable for integration on plastic substrates.     

Controlled deposition of a high-performance small-molecule organic single-crystal transistor array by direct ink-jet printing

Ink-jet printed small-molecule organic single-crystal transistors are realized by using selective surface energy modification, precise control of volume density of ink droplets on spatially patterned areas, and a co-solvent system to control solvent evaporation properties. The single-crystal formation in bottom-contact-structured transistors via direct printing is expected to permit high-density array fabrication in large-area electronics.     

Comparative study of gel-based separated arcdischarge, HiPCO, and CoMoCAT carbon nanotubes for macroelectronic applications

Due to their excellent electrical properties and compatibility with room-temperature deposition/printing processing, high-purity single-walled semiconducting carbon nanotubes hold great potential for macroelectronic applications such as in thin-film transistors and display back-panel electronics. However, the relative advantages and disadvantages of various nanotubes for macroelectronics remains an open issue, despite the great significance. Here in this paper, we report a comparative and systematic study of three kinds of mainstream carbon nanotubes (arc-discharge, HiPCO, CoMoCAT) separated using low-cost gel-based column chromatography for thin-film transistor applications, and high performance transistors-which satisfy the requirements for transistors used in active matrix organic light-emitting diode displays-have been achieved. We observe a trade-off between transistor mobility and on/off ratio depending on the nanotube diameter. While arc-discharge nanotubes with larger diameters lead to high device mobility, HiPCO and CoMoCAT nanotubes with smaller diameters can provide high on/off ratios (> 10⁶) for transistors with comparable dimensions. Furthermore, we have also compared gel-based separated nanotubes with nanotubes separated using the density gradient ultracentrifuge (DGU) method, and find that gel-separated nanotubes can offer purity and thin-film transistor performance as good as DGU-separated nanotubes. Our approach can serve as the critical foundation for future carbon nanotube-based thin-film macroelectronics.