Paris: An approach to integrated high-speed private networks

This paper describes a design of a high-speed packet switching system for integrated voice, video and data communications. The system makes use of a simplified network architecture in order to achieve the low packet delay and high nodal throughput necessary for the transport of voice and video. A prototype of this system has been implemented and is now being tested under a variety of packet traffic loads. We have demonstrated that this system provides a cost-effective solution for private integrated networks.     

以太网Wi—Fi协议包交换桥模块Firmware设计

介绍了以太网Wi—Fi适配器SoC中以太网Wi—Fi协议包交换桥模块Firmware设计,具体包括：802．11到802．3协议包转换Firmware设计以及802．3到802．11协议包转换Firmware设计,文中给出了Firmware程序流程图和部分程序代码,FPGA平台测试结果显示,Firmware成功地实现协议包交换功能。     

Demonstration of 100 Gbps optical packet switching using header processor based on 48-bit longest prefix matching

Wire-rate packet processing and its energy saving for over 100 Gbps speed of line are major issues to be resolved in optical packet switching (OPS) networks. For that purpose, we newly develop a high-speed, deterministic-latency electronic header processor based on longest prefix matching (LPM) for searching optical packet destination addresses (OP-DAs). This paper reports the successful experimental results of electronic header processing based on LPM search of up to 48 bits and optical switching of 100 Gbps optical packets by the use of the header processor. We demonstrate 48-bit LPM-capable optical packet switching. We also demonstrate IP packet transfer and 32-bit LPM-capable optical packet switching. In the latter demonstration, the 32-bit OP-DA of optical packets is directly copied from the 32-bit destination address of Internet Protocol version 4 (IPv4) packets. This result indicates that OPS networks can be deployed with electronic IP networks by the use of integrated network operation between OPS and IP networks.     

SEAL2: An SDN‐enabled all‐Layer2 packet forwarding network architecture for multitenant datacenter networks

This paper presents the design and development of a new network virtualization scheme to support multitenant datacenter networking (MT‐DCN) based on software‐defined networking (SDN) technologies. Effective multitenancy supports are essential and challenging for datacenter networking designs. In this study, we propose a new network virtualization architecture framework for efficient packet forwarding in MT‐DCN. Traditionally, an internet host uses IP addresses for both host identification and location information, which causes mobile IP problems whenever the host is moved from one IP subnet to another. Unfortunately, virtual machine (VM) mobility is inevitable for cloud computing in datacenters for reasons such as server consolidation and network traffic flow optimization. To solve the problems, we decouple VM identification and location information with two independent values neither by IP addresses. We redefine the semantics of Ethernet MAC address to embed tenant ID information to the MAC address field without violating its original functionality. We also replace traditional Layer2/Layer3 two‐stage routing schemes (MAC/IP) with an all‐Layer2 packet forwarding mechanism that combines MAC addresses (for VM identification and forwarding in local server groups under an edge switch gateway) and multiprotocol label switching (MPLS) labels (for packet transportation between edge switch gateways across the core label switching network connecting all the edge gateways). To accommodate conventional IP packet architecture in a multitenant environment, SDN (OpenFlow) technology is used to handle all this complex network traffics. We verified the design concepts by a simple system prototype in which all the major system components were implemented. Based on the prototype system, we evaluated packet forwarding efficiency under the proposed network architecture and compared it with conventional IP subnet routing approaches. We also evaluated the incurred packet processing overhead caused by each of the packet routing components.     

A 200 MHz CMOS broad-band switching chip

The architecture of a 32-channel, 200 MHz Batcher-Banyan fabric chip for broadband ATM packet switching is described, as well as the design methods required to develop a 380 K-transistor CMOS device that operates at these speeds under worst-case conditions. This device routes packets from 32 sources to any 32 destinations, is completely reconfigured each packet period, maintains priorities, supports contention resolution, and is a building block for larger switches     

一种面向100Gbps网络的L7-filter硬件加速方法

L7-filter是当前广泛应用的流量分类系统,其采用基于正则表达式匹配的深包检测方法,通过检测数据包有效载荷中存在的字符串特征对流量进行分类.然而,由于计算复杂度高、存储消耗大等原因,现有L7-filter软硬件方法的处理性能严重不足,不能适应当前40Gbps以及更高性能骨干网络.在对L7-filter的应用层协议规则集进行分析,总结其中广泛存在的特征的基础上,本文提出了一个硬件加速方法,其通过有针对性的数据模型、算法优化、匹配架构设计以提高流量分类系统的处理能力.为了验证方法的可行性,采用了基于Virtex6的FPGA板卡实现原型系统并对其进行评估.实验结果表明,原型系统的数据吞吐率可以达到约115Gbps.     

Circuit emulation services over Ethernet—Part 2: Prototype and experimental results

This paper describes a prototype implementation and experimental results for unstructured circuit emulation service (UCES) of T3 data stream over Ethernet. As explained in Part 1 of this paper,¹ packet‐switched networks such as Ethernet are not designed to transport TDM data and so have no inherent clock distribution and synchronization mechanisms. Thus, to allow the frequency of the source TDM stream to be regenerated at the receiver, the prototype employed the clock synchronization scheme described in Part 1 of this paper. Our experiments showed that the recovered clock conforms to ITU‐T G.824 requirements² even for networks that introduce high jitter and packet loss. Copyright © 2004 John Wiley & Sons, Ltd.     

An MTIDD Based Firewall

This paper explores the use of Multi-Terminal Interval Decision Diagrams (MTIDDs) as the central structure of a firewall packet filtering mechanism. This is done by first relating the packet filtering problem to predicate logic, then implementing a prototype which is used in an empirical evaluation. The main benefits of the MTIDD structure are that it provides access to Boolean algebra over filters, efficient classification time, and a compact representation. Results from the empirical evaluation shows that MTIDDs are scalable in terms of memory usage: a 50,000 rule filter requires only 3MB of memory, and efficient for packet classification: it is able to handle more rules than the schemes it was compared to without causing a degradation in performance.     

多信道自组织分组无线电网的组网算法和实验系统

本文首先提出了一个多信道全分布式控制的自组织算法，接着，给出了采用上术组织算法的一个由八个节点组成的ＭＣＯＳＮ－Ⅱ型多信道自组织分组无线电网络的实验系统，最后，给出系统性能的计算机模拟结果。     

Internet indirection infrastructure

Attempts to generalize the Internet's point-to-point communication abstraction to provide services like multicast, anycast, and mobility have faced challenging technical problems and deployment barriers. To ease the deployment of such services, this paper proposes a general, overlay-based Internet Indirection Infrastructure (i3) that offers a rendezvous-based communication abstraction. Instead of explicitly sending a packet to a destination, each packet is associated with an identifier; this identifier is then used by the receiver to obtain delivery of the packet. This level of indirection decouples the act of sending from the act of receiving, and allows i3 to efficiently support a wide variety of fundamental communication services. To demonstrate the feasibility of this approach, we have designed and built a prototype based on the Chord lookup protocol.     

A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS

This programmable engine is designed to offload TCP inbound processing at wire speed for 10-Gb/s Ethernet, supporting 64-byte minimum packet size. This prototype chip employs a high-speed core and a specialized instruction set. It includes hardware support for dynamically reordering out-of-order packets. In a 90-nm CMOS process, the 8-mm/sup 2/ experimental chip has 460 K transistors. First silicon has been validated to be fully functional and achieves 9.64-Gb/s packet processing performance at 1.72 V and consumes 6.39 W.     

一种基于数据平面可编程的软件定义网络报文转发验证机制

针对软件定义网络(SDN)中OpenFlow协议匹配字段固定且数量有限,数据流转发缺少有效的转发验证机制等问题,该文提出一种基于数据平面可编程的软件定义网络报文转发验证机制。通过为数据报文添加自定义密码标识,将P4转发设备加入基于OpenFlow的软件定义网络,在不影响数据流正常转发的基础上,对网络业务流精确控制和采样。控制器验证采样业务报文完整性,并针对异常报文下发流规则至OpenFlow转发设备,对恶意篡改、伪造等异常数据流进行转发控制。最后,构建基于开源BMv2的P4转发设备和基于OpenFlow的Open vSwitch转发设备的转发验证原型,并构建仿真网络进行实验。实验结果表明,该机制能够有效检测业务报文篡改、伪造等转发异常行为,与同类验证机制相比,在安全验证处理开销保持不变的情况下,能够实现更细粒度的业务流精确控制采样和更低的转发时延。     

基于WinPcap的以太网监听系统的设计与实现

给出了以太网网络监听软件系统的实现原理和技术,就Win 32平台上用于数据包捕获的WinPcap特点进行了分析,探讨了提高数据包捕获效率、减少数据包丢失的方法,实现了对网络底层数据包的捕获。     

一种SCTP报文的NAT穿越方法

流控制传输协议（SCTP）即将成为下一代网络中的传输层协议,在未来互联网和移动网络中发挥重要作用,然而目前网际协议（IP）网络中大多数网络地址转换（NAT）设备对SCTP报文转发缺乏兼容性支持。分析并解决了SCTP在当前IPv4网络实施中所遇到的NAT阻断问题。利用在收发端协议栈上进行功能扩展,提出了一种新的SCTP报文的NAT穿越方法,在不修改当前网络NAT设备的前提下完成NAT穿越,并在原型机上测试验证了解决方案的可行性和有效性。     

Baseband emulators for the protocol testing of multimediacommunication networks

The testing of protocols for survivable computer communications networks that use different propagation media, so that the vulnerability of any one medium is offset by the availability of another, is considered. The design and construction of a prototype testbed that can emulate the effects of a stressed medium at either a packet or bit level is discussed, with particular reference to the Multi-Media Link Emulation currently under development. The design incorporates emulation-service protocols that fit in below the user packet switch network protocol and replace the actual user physical link layer and makes use of a seven-event fault set. The components of the ultimate system and its present implementation status are described     

无比特丢弃的AAL2分组话音系统最优分组长度的研究

该文根据分组话音业务的特点,结合分组话音业务服务质量要求,特别是分组丢弃概率和端到端分组传送时延的要求,研究AAL2分组话音系统中AAL2分组最优长度的确定方法,得出结论:对于无比特丢弃的AAL2分组话音系统,当话音采用32kb/s的编码时,AAL2分组的最优长度大约为31个字节;当话音采用16kb/s的编码时,AAL2分组的最优长度大约为27个字节。此时AAL2分组的分组头开销小,话音分组的丢弃概率和端到端分组传送时延低,所得的分组话音质量高。     

3.5 GHz operation of a superconducting packet switch element

The paper introduces a prototype model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The input buffer and the contention solver enable contention-free distribution of data packets. The total design of the prototype has been completed and the total operation has been numerically simulated and confirmed. A 2×2 switching element which controls the paths of two packets is the key component of the prototype. The basic switching element with 1-b data-width is fabricated by a standard Nb trilayer process. Three-junction SQUIDs driven by a three-phase powering clock are used in the switch. The correct operation up to 3.5 GHz, limited by the measurement setup, is confirmed. The margin evaluation shows there remains enough margin at GHz operations     

A fault-tolerant communications switch prototype

A fault-tolerant communications switch prototype supporting the packet switching communications paradigm has been implemented. The special feature of this switch is that it incorporates a modified version of the grouped adaptive function, found in the Inmos IMS C104 switch, which can logically group both consecutively and non-consecutively numbered links.     

Residual coding in document image compression

Symbolic document image compression relies on the detection of similar patterns in a document image and construction of a prototype library. Compression is achieved by referencing multiple pattern instances ("components") through a single representative prototype. To provide a lossless compression, however, the residual difference between each component and its assigned prototype must be coded. Since the size of the residual can significantly affect the compression ratio, efficient coding is essential. We describe a set of residual coding models for use with symbolic document image compression that exhibit desirable characteristics for compression and rate-distortion and facilitate compressed-domain processing. The first model orders the residual pixels by their distance to the prototype edge. Grouping pixels based on this distance value allows for a more compact coding and lower entropy. This distance model is then extended to a model that defines the structure of the residue and uses it as a basis for continuous and packet reconstruction which provides desired functionality for use in lossy compression and progressive transmission.