Active cooling substrates for thermal management of microelectronics

Heat removal in printed wiring boards (PWB) is primarily accomplished through conduction. This work presents a microelectromechanical system (MEMS) device comprised of an active cooling substrate (ACS) designed and fabricated to add fluidic cooling functionality to the PWB. Thermal management is enhanced through the additional heat convection mode. Synthetic jet technology makes the compact, but easily integrated, MEMS cooling device possible. The fluid control unit, a synthetic jet, has been implemented in an epoxy-glass printed wiring board by multilayer lamination. An air reservoir is drilled through the core of printed wiring board. A flexible polymeric diaphragm and a low profile electromagnetic driver create an active pumping system to produce vibrating air jets downstream of microfluidic channels which transports heat generated by hot microelectronic components. Test heater chips have been directly die attached to the substrate. The integrated packaging system has been characterized mechanically, electrically, and thermally. Peak jet velocities of 14 m/s and average jet velocities of approximately 3 m/s have been achieved at actuator powers of 60 mW. This integrated active cooling substrate has the potential for broad applications in thermal management at the system packaging level.     

Growth of low dimensional structures on patterned substrates

Epitaxial growth of lattice-matched and strained heterostructures by molecular beam epitaxy (MBE) has reached a high level of maturity in terms of the understanding of growth mechanisms, and of the development of high performance and novel electronic and optoelectronic devices. In view of applications to next-generation devices, various approaches for the formation of quantum confinement nanostructures are being intensively studied. An area whose full potential is yet to be exploited is the growth of heterostructures on patterned substrates. In this article some of the latest results obtained in this area of research are presented.     

高导热电封装复合材料界面热传导的扫描热显微镜分析

本文利用扫描热显微镜（SThM),以微米级的空间分辨率,测量了SiC/Cu和SiC/Al电封装复合材料增强相－基体的界面特征和界面导热性能,SThM热图显示出材料界面导热性能的差异,对形貌数据和热数据进行统计分析和转换,确定了复合材料的界面宽度和界面导热率。     

Microstrip bandpass filters on substrates with high permittivities

A new class of compact microstrip bandpass filters, the stepped-impedance resonators of which are located close together at a gap of 0.1–0.2 mm, is described. Basic two- and three-element sections of microstrip filters, which are designed around stepped-impedance impedance resonators used to implement tiny selective devices with overall sizes and characteristics comparable to those of microwave ceramic filters, are proposed. It is justified that the mentioned filters can be equipped with closely neighboring metallic shields whose heights are equal to the substrate thickness. As a consequence, these filters turn out to be thinner. The frequency responses of experimental microstrip filters operating at frequencies of 1.75–2 GHz and manufactured on the 1-mm-thick substrates with the permittivity ɛ _r = 100 have been analyzed. The three-pole microstrip filter with a shield (its operating frequency is 1.96 GHz, and sizes are 5 × 5 × 1.5 mm) has been simulated. It is demonstrated that new microstrip filters can be competitive with low-sized ceramic filters in certain applications.     

RF performance of SiC MESFET's on high resistivity substrates

State-of-the art SiC MESFET's showing a record high f_max of 26 GHz and RF gain of 8.5 dB at 10 GHz are described in this paper. These results were obtained by using high-resistivity SiC substrates for the first time to minimize substrate parasitics. The fabrication and characterization of these devices are discussed     

低温固化银系导电油墨导电性能的影响因素

为了提高低温固化银系导电油墨的导电性,对导电机理进行了研究。通过实验研究了聚合物分子结构,银粉的含量、形貌、粒径,溶剂种类对导电性能的影响。得出:氯化聚乙酸乙烯为主体树脂,以片状与球状混合银粉(质量比为9:1)为导电填料,并以酮和酯组成混合溶剂,调制的导电油墨导电性最好,其Rs达9 mΩ/□。     

Silica waveguide circuits with low polarisation dependencefabricated on silica substrates

Silica waveguide circuits for 1×N and 2×N splitters have been fabricated on silica (quartz glass) substrates. They show very low polarisation dependence and have insertion loss comparable to silica-on-silicon devices     

High-speed monolithic silicon photoreceivers on high resistivityand SOI substrates

We compare monolithic silicon optical receivers fabricated on high resistivity and silicon-on-insulator (SOI) substrates. Each receiver consisted of a lateral p-i-n photodiode and an NMOS transimpedance preamplifier. At a drain voltage (V_DD) of 3.5 V, a photodiode voltage (V_PD) of 30 V, and a wavelength of 850 nm, the high resistivity receiver exhibited sensitivities of -31.9 dBm at 622 Mb/s and -23.2 dBm at the maximum operating speed of 1.0 Gb/s. At V_DD =5 V and V_PD=20 V, the sensitivity of the SOI receiver was -26.1 dBm at 622 Mb/s, -20.2 dBm at 1.0 Gb/s and -12.2 dBm at the maximum speed of 2.0 Gb/s. Single supply operation at 5 V and 3 V was also demonstrated for the SOI receiver. Methods for extending the speed and improving the sensitivity characteristics in more advanced technologies with lower supply voltages are discussed     

以低功耗实现最佳散热性能

设计便携式PC或笔记本电脑的散热系统时,为了有效地利用电池资源,同时确保非散热区能够工作在保持其最大特性的工作温度,必须考虑一系列的散热问题。     

Growth mechanism of AlGaAs on terraced substrates by low pressure MOVPE

AlGaAs layers were grown on recessed GaAs substrates by MOVPE at 5 and 100 Torr. The two mechanisms, the gas phase diffusion through the stagnant layer and the surface migration of the growing species, are responsible for the surface step height after the growth. Since the mean free path in the gas phase at 5 Torr (≈20μm) is longer than the recess height (≈1μm), only the surface migration determines the growth at 5 Torr, while both mechanisms contribute to the growth at 100 Torr. The surface diffusion equation is solved to find out the relation between the growth conditions and the surface step height after the growth. It was found that the surface migration length on the (111)A surface is much longer than that on the (100) plane. The optical waveguide is fabricated by growing a double-heterostructure on the recessed substrate, and light confinement in the channel is verified. On leave from Matsushita Kotobuki Electronics Ltd. Fukutake, Saijo 793, Japan     

Properties of CdTe films brush plated on high temperature substrates

CdTe thin films were brush plated on substrates maintained at temperatures in the range 30–90 °C from the precursors. The films exhibited cubic structure. Optical band gap of 1.45 eV was obtained. XPS measurements indicated the formation of CdTe. AFM studies indicated the formation of fine grains of the order of 50 nm, for the films deposited on room temperature substrates. Hot probe measurements indicated films to be n-type. A mobility in the range of 5–60 cm² V⁻¹ s⁻¹ and a carrier density of 10¹⁵ cm⁻³ was obtained.     

大功率器件的冷却措施

引言 大功率器件、模块或超大规模集成电路在工作过程中有较大的损耗,产生大量的热量使器件或模块的温度升高,若不采取冷却措施,器件的管芯的温度会超过硅片的结温温度（150℃左右）,管芯会因过热而烧毁。因此,大功率器件、模块、超大规模集成电路要根据其发热的情况采取各种不同的冷却措施以保证其安全工作。     

Micromachined inverted F antenna for integration on low resistivity silicon substrates

This letter addresses the integration of a 24-GHz inverted-F antenna on a low resistivity silicon substrate, using micromachining post-processing techniques compatible with commercial Si/SiGe active device processes. By suspending the radiator on a 2.4mm/sup 2/ large polymer membrane an on-chip antenna with -0.7 dBi gain has been realized.     

Effects of high electric fields and temperature on conductivity of a-Si

At high electric fields the Poole-Frenkel effect and thermally-assisted tunneling give rise to an enhanced electric conductivity of amorphous silicon (a-Si). The occupancy of states in the gap, free, and trapped charge carrier concentrations and electric conductivity of a homogenous a-Si in steady-state conditions are calculated on the basis of space-charge neutrality and with time-unchangeable concentrations of charge carriers. Simplifying approximations are introduced, thus enabling easier calculations of carrier concentrations and conductivity. The theory of capture-emission dynamics in a-Si at high fields is further extended by expressing occupancy functions and nonequilibrium quasi-Fermi levels. Effects of the density of states distribution in a-Si and added impurities upon carrier concentrations and conductivity are revealed.     

A novel low temperature integration of hybrid CMOS devices on flexible substrates

In this work we demonstrate a novel integration approach to fabricate CMOS circuits on plastic substrates (poly-ethylene naphthalate, PEN). We use pentacene and amorphous silicon (a-Si:H) thin-film transistors (TFTs) as p-channel and n-channel devices, respectively. The maximum processing temperature for n-channel TFTs is 180 °C and 120 °C for the p-channel TFTs. CMOS circuits demonstrated in this work include inverters, NAND, and NOR gates. Carrier mobilities for nMOS and pMOS after the CMOS integration process flow are 0.75 and 0.05 cm²/V s, respectively. Threshold voltages (V_t) are 1.14 V for nMOS and −1.89 V for pMOS. The voltage transfer curve of the CMOS inverter showed a gain of 16. Correct logic operation of integrated flexible NAND and NOR CMOS gates is also demonstrated. In addition, we show that the pMOS gate dielectric is likely failing after electrical stress.     

低温烧结AlN陶瓷基片

通过添加助烧结剂和改进粉体性能，进行ＡｌＮ陶瓷的低温致密化烧结。研究结果表明，添加以Ｄｙ２Ｏ３为主的助烧结剂系统，在１６５０℃下，无压烧结４ｈ，热导率高达１５６Ｗ／（ｍ·Ｋ）；而对ＡｌＮ粉体进行冲击波处理，可以提高粉体的烧结活性，使烧结温度降低２５℃。讨论了低温烧结ＡｌＮ陶瓷基片及低温共烧多层ＡｌＮ陶瓷基片的制备工艺。两步排胶法可以较好地解决金属Ｗ氧化及ＡｌＮ陶瓷颗粒表面吸附残余碳的问题，是制备ＡｌＮ陶瓷与金属Ｗ共烧多层基片的有效排胶方法。     

Thickness determination of low doped SiC epi-films on highly doped SiC substrates

The room temperature infrared reflectance of low doped SiC epi-films, both 4H and 6H polytypes, deposited by chemical vapor deposition on highly doped SiC substrates has been measured. The epi-film doping levels are in the 10¹⁵ cm⁻³ range while the substrate doping levels are in the 10¹⁸ to 10¹⁹ cm⁻³ range. Interference fringes from the epi-films are often observed in the frequency region below the reststrahl band in SiC (200–600 cm⁻¹) and they can be used to determine the thickness of these epi-films. The fringes arise due to the difference in free carrier concentration between the epi-film and substrate which causes differences in their frequency dependent dielectric functions. The epi-film thickness determinations were made by comparison of the measured infrared reflectance spectra to calculated spectra based on a frequency dependent dielectric function modeled with Lorentz oscillators using only bulk input parameters. The effects of film and substrate anisotropy and off normal incidence are included in the calculation.     

高热导率纳米银胶的可靠性研究

对无压力低温固化纳米银胶的连接强度、导热性和导电性及其可靠性进行了研究,并与Au80Sn20焊料及普通导电胶进行对比。结果表明:纳米银胶连接强度高,平均剪切强度可达28 MPa;导热性能优异,连接层热阻接近Au80Sn20焊料层热阻;在严酷的热应力和机械应力试验后,其连接强度、导热性和导电性保持稳定,没有退化现象产生。因此,无压力低温固化的纳米银胶作为高功率器件连接材料具备较高的可靠性。     

Compliant substrates: A comparative study of the relaxation mechanisms of strained films bonded to high and low viscosity oxides

Relaxation of compressively strained heteroepitaxial Si_0.7Ge_0.3 films bonded to high and low viscosity glass compliant layers was investigated. These structures were formed by transferring Si_0.7Ge_0.3 films to Si substrates covered with thermal SiO₂ and borophosphorosilicate glass (BPSG) films. Relaxation was studied through thermal annealing experiments. For the low viscosity BPSG, relaxation was observed near 800°C and was accompanied by buckling of the Si_0.7Ge_0.3 film. At this temperature, no change in the Si_0.7Ge_0.3 film bonded to thermal SiO₂ was observed, and through this comparison relaxation on BPSG is interpreted as the result of viscous flow of the glass. Finally, film buckling was successfully avoided by patterning the strained films into small areas prior to annealing, and is an indication that film expansion must be considered for elastic strain relaxation on compliant media.