一种紧凑型双圆极化有源接收天线设计

设计了一种S波段紧凑型双圆极化有源接收天线,该有源接收天线将微带贴片天线与90°混合电桥、低噪声放大器集成设计,既实现了有源天线的整体小型化又提高了各器件间的连接效率;并通过背馈玻璃绝缘子和一种半差分的方式馈电,在改善微带贴片天线方向图对称性的同时,简化了传统差分式馈电的复杂结构.仿真和实测结果表明,该有源接收天线在2.2~2.3 GHz内端口驻波比小于1.47,噪声系数小于0.73 dB,主瓣内轴比小于2.4 dB,G/T值大于-13.9 dB/K,与已有公开文献的有源接收单元天线相比,在保持结构紧凑的同时,其G/T值有较大幅度提升.     

一种小型化有源相控阵天线设计与测试

文章设计了一种小型化有源相控阵天线,阵元采用低剖面双馈圆极化技术,轴比性能优异;T/R组件采用片式组件表贴综合网络技术,与常规砖式或瓦式相控阵天线的多次封装和模块连接相比,该天线通过一次封装集成实现了相控阵天线的轻、薄、小目标。通过紧缩场暗室测试和对星测试,结果表明,天线工作稳定可靠,性能优异。     

基于FDTD算法的有源集成天线设计

由于缺乏适合的商业软件对有源集成天线(AIA)进行模拟设计,致使设计周期加长和成本升高.为了克服这一缺点,利用FDTD算法进行了AIA模拟和设计,仿真结果与实测结果吻合良好,证明了FDTD算法在AIA设计中的有效性.     

一种小型化高集成有源天线接口网络的研制

介绍了一种小型化高集成有源天线接口网络的组成原理、设计方法以及实测结果。针对小型化高集成设计的难点进行评估,设计多层印制电路并利用微组装技术实现高集成设计方案。在此基础上,设计并实现一种六通道集成布局,每个通道均包含收发放大电路、波控电路,实现各通道独立收发切换及放大。多层印制电路采用10 层堆叠结构设计,一体化集成内监测及和差网络。根据组件实测结果,幅度带内平坦度优于依0. 3 dB,发射饱和输出功率逸32 dBm,质量为320 g。     

振荡型有源集成天线

研制中心频率为18 GHz的振荡型有源集成天线,包括微带天线设计、单片压控振荡器(MMIC VCO)的设计及微带天线与单片压控振荡器二者的集成。微带天线的芯片面积为4.5 mm×3.5 mm,增益为3.67 dB,中心频率为18.032 GHz,最小输入驻波系数为1.098;单片压控振荡器芯片面积1.1 mm×1.0 mm,调谐范围为15.978～18.247 GHz,输出功率大于6 dBm。振荡型有源集成天线的方向图测试结果与微带天线的特性符合,该振荡型有源集成天线能够正常工作。     

宽带低噪声放大器有源集成天线设计

针对传统有源天线存在的线路损耗问题,提出一款新型宽带低噪声放大器有源集成天线.该设计将天线同时作为辐射元件和有源电路的匹配部分,在不使用任何输入匹配网络的情况下,将低噪放管与天线高度集成,实现有源电路和无源天线一体化.本文设计采用AV-AGO公司的GaAs HEMT低噪放管,通过加载缝隙的倒F天线实现了32％的匹配带宽...     

一种短波有源天线供电转换器的设计

设计了一种短波有源天线供电转换器,利用直流信号和高频信号的频率差异,通过一条传输线路完成射频信号的传输和天线放大器的直流供电,根据射频器件的高频特性实现2路信号的隔离和复用,采用ADS射频仿真软件建立仿真模型。仿真结果显示在工作带宽内射频阻抗特性和直流电压平稳。制作了一台四通道短波有源天线供电转换器,在1．5～30 M Hz的工作频率范围内实测结果和仿真计算结果相吻合,可与宽带接收机实现良好的匹配。同时,供电转换器各通道之间幅度和相位一致性很好,还可满足一些有源阵列天线的需求。     

基于宽带输入阻抗模型的有源集成天线设计

提出了利用微带天线的宽带输入阻抗模型进行有源集成天线的设计方法以预测有源集成天线(AIA)的辐射特性和谐波特性.谐波平衡法被用于得到AIA的谐波特性和阻抗模型的端口电压.然后端口电压作为激励源计算天线特性.实验结果显示该方法可以简单有效进行有源集成天线设计.     

一种新型圆极化接收有源集成天线的设计

提出了一种新型圆极化接收有源集成天线的设计方法,采用有源放大与无源辐射部分一体化设计理念,通过合理改变天线的输出阻抗,直接与低噪声放大器晶体管输入端进行匹配,省去了传统设计中的复杂匹配网络,降低了天线前端的匹配损耗,改善了天线接收系统的噪声和增益。利用此方法设计了一款C波段圆极化接收有源集成天线。测试结果表明:相对于传统设计方法,该方法在方向图和轴比性能基本相同的情况下,阻抗带宽改善了3%,输入端匹配损耗减小了0.3 dB,同时简化了电路结构。证明了该方法的有效性。     

An improved small antenna radiation-efficiency measurement method

An examination of the available literature shows that the accurate measurement of antenna efficiency is a difficult task, and that the available methods have potential for a substantial amount of error. This paper refines a method already presented, and gives detailed results with some newly defined reference antennas. Two methods of determining antenna efficiency are presented. One method may be considered to be a generalization of the “Wheeler cap method.” The two methods presented show excellent agreement with each other, and show excellent agreement with the reference antennas. The reflection method appears to give the better results of the two methods, except under special circumstances     

Dual feeding active integrated antenna

A dual feeding active integrated antenna with high isolation between the Tx and Rx ports of a single triangular patch antenna is presented. The proposed antenna suppresses the third harmonics and isolates the Tx signal at the Rx ports to a high degree. The measured results of the return loss, isolation, and radiation patterns are provided     

FDTD simulation of active integrated antenna

The full wave design of an active integrated antenna using the extended FDTD method is presented. An active circulator using three gain blocks and a short circuited quarter wavelength patch are combined to form a transceiver. The effects of parasitic coupling are identified, and the isolation between transmit-receive is predicted     

A harmonic suppression antenna for an active integrated antenna

An inset-fed antenna with a shorting pin and slots is presented for harmonic suppression of an active integrated antenna. Its fundamental resonant frequency is 5.8 GHz. At fundamental and harmonic frequencies, return loss and radiation characteristics are measured and compared with those of the conventional microstrip patch antenna. The second and third harmonic return losses of the proposed antenna are suppressed to 6.7 dB and 17.7 dB with respect to the conventional patch antenna, respectively.     

Circular active integrated antenna with push-pull oscillator

A new oscillating circular patch antenna with two bipolar transistors operating in push-pull mode is presented. By using a circular instead of a rectangular patch the stability of the operating frequency is increased and second-harmonic radiated power is decreased. High radiated power and very linear frequency tuning are observed. Radiation patterns show no degradation due to patch modifications.     

反激式变压器设计方法的改进

分析了单端反激式开关电源变压器的能量转换过程,提出了一种连续导通模式下反激式变压器的改进设计方法,给出了关键参数的推导过程。该方法简化了反激式变压器的设计步骤,提高了设计效率。大量实践表明该设计方法的可行性与准确性。     

An integrated quasi-planar leaky-wave antenna

A new quasi-planar leaky-wave antenna is presented. It consists of microstrip line on one side of the substrate and uniplanar circuit on the other side placed in a partially opened waveguide. The leakage is produced by the excitation of the first higher order (odd) microstrip mode coupled electromagnetically through a slotline on the opposite side of the substrate. Theoretic results based on rigorous Green's impedance integral equation method show that the new microstrip-slotline-coupled leaky-wave antenna has a broadband tuning range via structure parameters and is insensitive to the microstrip line width variation. Measured relative power absorbed (RPA) results indicate that the useful frequency bandwidth agrees with that predicted by rigorous field theory. The measured antenna radiation patterns also agree very well with the approximate theoretic computations. The theory and experiments show that the proposed leaky-wave antenna can interface to feeding structure easily and directly. The new antenna may become a good candidate for microwave and millimeter-wave integrated antenna design     

一种八木天线前向增益优化的改进处理方法

就文献中八木无线前向增益优化的单元间距微扰迭代法，提出了一种改进的处理方法，它采用Hallen方程和电流分布函数的殆全域多项式展开相结合的方法作为天线分析的基础，使得优化算法的数学表达更为简洁，尤其避免了半波振子作激励单元时繁杂的数学处理，简化了数值计算过程过程，而且矩阵维数增加不多。文中给出了天线分析部分的计算实例和结果比较。     

一种改进的测试芯片的设计方法

集成电路制造技术的不断进步,给缺陷定位带来巨大的挑战。传统的测试芯片和现有的可寻址的方法都无法满足当前缺陷快速准确定位的要求。本文提出了一种改进的可寻址测试芯片的设计方法:每个测试结构采用四端法连接以及单一的NMOS晶体管作为开关电路,以保证电性测量结果精确、电路设计的简洁以及面积利用率的进一步优化;并利用开关电路增加少量测试引脚,以方便物理缺陷定位的进行。该方法在110nm的CMOS工艺中得到应用。经过实际生产验证,实现了金属层断路等缺陷的定位,有效发现了该工艺中失效缺陷的成因,从而帮助实际的成品率实现快速提升。