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1.
This paper investigates the recovery property of p-MOSFETs with an ultra-thin SiON gate dielectric which are degraded by negative bias temperature instability (NBTI). The experimental results indicate that the recovery of the NBTI degradation occurs through an electrical neutralization of the NBTI-induced positive charges at the SiON/Si interface and in the gate dielectric. The neutralization of interface charges was a fast process occurring just after the device returned to the recovery state. The neutralization of positive charges in the gate dielectric was a slow process associated with the electron injection into the gate dielectric. Below the gate voltage for strong accumulation, the amount of recovery increased with an increase of the gate voltage. A further increase of gate voltage did not affect the amount of recovery. These experimental results indicate that the major cause of the recovery is a neutralization of the NBTI-induced positive charges by electrons instead of a hydrogen passivation of the NBTI-induced defect sites.  相似文献   

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The decrease of the threshold voltage Vth of p-channel metal-oxide semiconductor field effect transistors (p-MOSFET) with ultrathin gate dielectric layers under negative bias temperature stress is studied. A degradation model is developed, that accounts for the generation of Si3Si (Pb0) centers and bulk oxide defects, induced by the tunnelling of electrons or holes through the gate dielectric layer during the electrical stress. The model predicts that Vth shifts are mainly due to the tunnelling of holes at low gate bias |VG|, typically below 1.5 V, while electrons are mainly responsible for these shifts at higher |VG|. Consequently, device lifetime at operating voltage, based on Vth shifts, should not be extrapolated from measurements performed at high gate bias. The impact of nitrogen incorporated at the Si/dielectric interface on Vth shifts is next investigated. The acceleration of device degradation when the amount of nitrogen increases is attributed to the increase in local interfacial strain, induced by the increase in bonding constraints, as well as to the increase in the density of Si---N---Si strained bonds, that act as trapping centers of hydrogen species released during the electrical stress. Finally, Vth shifts in p-MOSFET with HfySiOx gate layers and SiO2/HfySiOx gate stacks are simulated, taking into account the generation of Pb0 centers induced by the injection of electrons through the structure. It is found that the transistor lifetime, based on threshold voltage shifts, is improved in SiO2/HfySiOx gate stacks as compared to single HfySiOx layers. This finding is attributed to the beneficial presence of the SiO2 interfacial layer, which allows the relaxation of strain at the Si/dielectric interface.  相似文献   

4.
A new insight into the post-stress interface trap (Nit) generation in hot-electron stressed p-MOSFETs is presented. Nit generation is suppressed for positive oxide field but enhanced for negative oxide field. This observation provides strong support for a two-carrier model, involving the recombination between trapped electrons and inversion holes. While post-stress interface instability has generally been associated with hole trapping and hydrogen transport, our results clearly show the importance of electron traps on the long term stability of the Si-SiO2 interface, and that the two-carrier model provides a consistent explanation for post-stress Nit generation in p-MOSFETs stressed under hot-electron injection  相似文献   

5.
In this work, we report a study of negative bias temperature instability (NBTI) recovery in high-k/metal-gate p-channel field effect transistors (pFETs) with different interfaces. New results on the dependence of recovery on interface, stressing voltage (Vs), stressing temperature and stressing time (ts) are shown.  相似文献   

6.
In this letter, further evidence from atomic modeling is presented to support the proposed nitrogen neighboring effect, which explains the two distinct regimes in the dependence of negative bias temperature instability (NBTI) degradation on the interfacial nitrogen concentration N/sub int/ (i.e., the dependence for N/sub int/>8 at. % is stronger than that for N/sub int/<8at. %). Our calculations clearly show that the enhancement of the NBTI degradation by nitrogen becomes stronger when the number of neighboring N atom increases with increasing the N/sub int/. In addition, the role of nitrogen in NBTI is also examined in terms of the electronegativity and atomic charge distribution. This letter clearly suggests that the N neighboring effect is detrimental to future generations of MOS devices that require higher N/sub int/ for the gate oxide.  相似文献   

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From the detailed analysis of the dependence of threshold voltage shift and positive fixed charge/interface state generation on the stress time/temperature of negative bias temperature instability (NBTI) for various nitrogen concentrations at the oxide/Si interface, the mechanism of nitrogen-enhanced NBTI effect has been studied experimentally. The experimental results can be understood in terms of the reaction energies of the hydrogen trapping reactions at the interface, which are obtained from first-principles calculations. The calculations show that the nitrogen's lone-pair electrons can trap dissociated hydrogen species more easily than oxygen. From the experimental and theoretical studies, one can conclude that the roles of nitrogen in the NBTI are two folds, i.e., it provides more reaction sites, and it can also enhance the NBTI reaction by reducing the reaction energy.  相似文献   

9.
We have examined the impact of NBTI degradation on digital circuits through the stressing of ring oscillator circuits. By subjecting the circuit to pMOS NBTI stress, we have unambiguously determined the circuit reliability impact of NBTI. We demonstrate that the relative frequency degradation of the NBTI stressed ring oscillator increases as the voltage at operation decreases. This behavior can be explained by reduced transistor gate overdrive and reduced voltage headroom at the circuit level. We present evidence that donor interface state generation during NBTI stress is a significant component of the transistor degradation. Further, we show that the static noise margin of a SRAM memory cell is degraded by NBTI and the relative degradation increases as the operating voltage decreases.  相似文献   

10.
This article describes several deficiencies with traditional assessments of negative bias temperature instability (NBTI) in pMOS transistors and proposes methods for handling them. These effects include: (a) a decrease in the rate of degradation over time, (b) a deviation of the stress bias dependence of NBTI lifetime from simple analytical models, (c) partial dynamic recovery of apparent NBTI degradation after interruption of stress, and (d) errors well beyond what might naively be expected in lifetime extrapolation due to uncertainties in measurement and modeling of NBTI. These errors can even be several orders of magnitude. If these effects are not adequately considered in NBTI characterization, assessment, benchmarking, and optimization, they could lead excessive expense in product reliability evaluation or, worse, to unanticipated, costly field reliability problems.  相似文献   

11.
Negative bias temperature instability (NBTI) lifetime prediction of thin gate insulator films based on hole injection without gate voltage acceleration is described and lifetime comparison between SiO2 film and SiON film is made based on the prediction method. The acceleration parameters are most important for the accurate lifetime prediction. The proposed acceleration parameter is not the applied voltage to the gate insulator film and the temperature but quantity of the hole injection to the gate insulator film that directly relates with the quantity of holes in the inversion layer. The degradation mechanism under the excessive voltage and excessive temperature stresses are different from that in the operation conditions. Using the hole injection method, the NBTI lifetime of SiON is less than that of SiO2. This result agrees with the reported results measured by conventional high gate fields and temperatures. By the introduction of effective stress time (=Qhole/Jinj0), accurate lifetime prediction in terms of the Vth shift is realized, and by analyzing of relationship between ID reduction and Vth shift, accurate lifetime prediction in terms of the ID reduction and the degradation prediction in the circuit level are realized. These results are essential for the accurate NBTI lifetime prediction for further more integrated LSI such as very thin gate insulator films around 1 nm.  相似文献   

12.
Negative bias temperature instability (NBTI), in which interface traps and positive oxide charge are generated in metal–oxide–silicon (MOS) structures under negative gate bias, in particular at elevated temperature, has come to the forefront of critical reliability phenomena in advanced CMOS technology. The purpose of this review is to bring together much of the latest experimental information and recent developments in theoretical understanding of NBTI. The review includes comprehensive summaries of the basic phenomenology, including time- and frequency-dependent effects (relaxation), and process dependences; theory, including drift–diffusion models and microscopic models for interface states and fixed charge, and the role of nitrogen; and the practical implications for circuit performance and new gate-stack materials. Some open questions are highlighted.  相似文献   

13.
Water-enhanced degradation of p-type low temperature polycrystalline silicon thin film transistors under negative bias temperature (NBT) condition is studied. H2O penetration into gate oxide network and the role of H2O during NBT stress are confirmed and clarified respectively. To prevent H2O diffusion, a combination of a layer of PECVD SiO2 and a layer of PECVD Si3N4 as passivation layers are investigated, revealing that 100 nm SiO2 and 300 nm Si3N4 can effectively block H2O diffusion and improve device NBT reliability.  相似文献   

14.
The temperature bias instability of high-voltage oxides is analyzed. For the investigation of negative bias temperature instability (NBTI) we present an enhanced reaction–diffusion model including trap-controlled transport, the amphoteric nature of the Pb centers at the Si/SiO2 interface, Fermi-level dependent interface charges, and fully self-consistent coupling to the semiconductor device equations. Comparison to measurement data for a stress/relaxation cycle and a wide range of temperatures shows excellent agreement.  相似文献   

15.
The effects of negative bias temperature instability (NBTI) on the performance of a CMOS inverter have been investigated by means of both simulation and experimental methods. The simulation of NBTI effects on CMOS inverter has been done by shifting the pFET Vtho BSIM parameter. The results show that NBTI shifts the inverter transfer curve, reduces the low noise margin and current consumption but increases the high noise margin. A good agreement between simulation and experimental results has been obtained. Therefore, it can be assumed that the effect of NBTI on CMOS circuits can be mainly predicted by shifting the Vtho pFET parameter.  相似文献   

16.
The roles of electron trapping and of acceptor-type interface state generation (ΔDit) in the off-state gate-induced drain leakage (GIDL) current in p-MOSFETs are studied. It is found that both trapped electrons and negatively charged acceptor-type interface states reduce the GIDL current at the high-surface-field region, in which GIDL is still governed by the band-to-band tunneling process. However, the neutral acceptor-type ΔDit increases the GIDL current significantly at the low-surface-field region  相似文献   

17.
Hole trapping is often considered a parasitic component clouding the real degradation mechanism that is responsible for the negative bias temperature instability (NBTI). As such, it is often dealt with in a rather sketchy way that lacks physical rigor. We review hole trapping mechanisms that go beyond the conventional elastic tunneling mechanism by including structural relaxation and field effects. Contrary to some previous studies, it is shown that the rich spectrum of experimentally observed features of the most commonly observed defect in amorphous oxides, the E′ center, is consistent with experimental data available for NBTI. In particular, we show that a full model that includes the creation of E′ centers from their neutral oxygen vacancy precursors and their ability to be repeatedly charged and discharged prior to total annealing is consistent with a first stage of degradation. In a second stage, positively charged E′ centers can trigger the depassivation of Pb centers at the Si/ SiO2 interface or KN centers in oxynitrides to create an unpassivated silicon dangling bond. We formulate a complete model and evaluate it against experimental data.  相似文献   

18.
This paper proposes a fast and accurate method to extract parameters of the power law for nano-scale SiON pMOSFETs under negative bias temperature instability (NBTI), which is useful for an accurate estimation of NBTI lifetime. Experimental results show that accurate extraction of the time exponent n of the power law was obstructed by either fast trapping of minority carriers or damage recovery during measurement of threshold voltage Vth. These obstructing effects were eliminated using ΔVths obtained from fast and slow measurement-stress-measurement (MSM) procedures. The experimental SiON pMOSFETs had n ≈ 1/4, an activation energy Ea = 0.04 eV for the fast recoverable degradation, and Ea = 0.2 eV for the slow permanent degradation. Based on these experimental observations, a method to estimate NBTI lifetime is proposed.  相似文献   

19.
This paper presents the time-dependence of the negative bias temperature instability (NBTI) degradation of p-MOSFETs with an ultra-thin silicon oxynitride gate dielectric. The concentrations of nitrogen in the gate dielectric were approximately 3% and 10%. The device with 10% nitrogen concentration had unique time-dependent degradation characteristics due to the nitrogen enhanced NBTI effect. It degraded significantly just after application of an NBTI stress. After this initial degradation, a fast and slow degradation followed in sequence. The initial, fast, and slow degradations appear to be associated with the deep donor effect of nitrogen, the diffusion of ionic and neutral hydrogen combined with Si-H bond breaking, and the diffusion of neutral hydrogen combined with O-H bond breaking, respectively. Owing to the slow down of the NBTI degradation after the initial and fast degradations, the lifetime for the device with 10% nitrogen concentration was three times longer than that with 3% nitrogen concentration.  相似文献   

20.
Negative bias temperature instability (NBTI) of pMOSFETs with direct-tunneling SiON gate dielectrics was studied in detail. By investigating the effects of applying positive gate bias on pMOSFETs after exposure to NBT stress, the generation of bulk charge traps in the gate dielectrics during NBTI was clearly demonstrated. In particular, it was found that a positive charge generated by negative bias temperature stress (NBT stress) can be neutralized and that the neutralized site can return to the positive state. We consider that the bulk trap is due to hydrogen atoms released from the interface between the SiON gate dielectric and the Si substrate (and this is what has conventionally been considered a positive fixed charge). Moreover, the bulk trap generation was shown to give rise to stress-induced leakage current.  相似文献   

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